[Intel-gfx] [v2] drm/i915/gen11: Moving WAs to icl_gt_workarounds_init()

2021-12-03 Thread ravitejax . goud . talla
From: Raviteja Goud Talla Bspec page says "Reset: BUS", Accordingly moving w/a's: Wa_1407352427,Wa_1406680159 to proper function icl_gt_workarounds_init() Which will resolve guc enabling error v2: - Previous patch rev2 was created by email client which caused the Build failure, This v2 is

[Intel-gfx] [v2] drm/i915/adl_p: Fix ddc pin mapping

2021-12-02 Thread ravitejax . goud . talla
From: Tejas Upadhyay >From VBT, ddc pin info suggests the following mapping: VBTDRIVER DDI TC1->ddc_pin=3 should translate to PORT_TC1->0x9 DDI TC2->ddc_pin=4 should translate to PORT_TC2->0xa DDI TC3->ddc_pin=5 should translate to

[Intel-gfx] [PATCH] drm/i915/adl_p: Add adl-p ddc pin mapping

2021-12-01 Thread ravitejax . goud . talla
From: raviteja goud talla >From VBT, ddc pin info suggests the following mapping: VBTDRIVER DDI TC1->ddc_pin=3 should translate to PORT_TC1->0x9 DDI TC2->ddc_pin=4 should translate to PORT_TC2->0xa DDI TC3->ddc_pin=5 should translate to

[Intel-gfx] [PATCH] drm/i915/gen11: Moving WAs to icl_gt_workarounds_init()

2021-11-23 Thread ravitejax . goud . talla
From: raviteja goud talla Bspec page says "Reset: BUS", Accordingly moving w/a's: Wa_1407352427,Wa_1406680159 to proper function icl_gt_workarounds_init() Which will resolve guc enabling error Cc: John Harrison Signed-off-by: raviteja goud talla ---