Re: [Intel-gfx] [PATCH] drm/i915/icl: Add pre_pll_enable hook for ICL and set DFLEXDPMLE in this hook

2018-08-13 Thread Manasi Navare
On Mon, Aug 13, 2018 at 12:38:00PM -0700, Souza, Jose wrote: > On Tue, 2018-07-31 at 17:30 -0700, Manasi Navare wrote: > > In case of Legacy DP connector on TypeC port (C, D, E or F), the > > Legacy DP connector(DisplayPort Alternative Mode) Ok will reword this as DisplayPort Alternative Mode >

Re: [Intel-gfx] [PATCH] drm/i915/icl: Add pre_pll_enable hook for ICL and set DFLEXDPMLE in this hook

2018-08-13 Thread Souza, Jose
On Tue, 2018-07-31 at 17:30 -0700, Manasi Navare wrote: > In case of Legacy DP connector on TypeC port (C, D, E or F), the Legacy DP connector(DisplayPort Alternative Mode) > flex IO DPMLE register is set to maximum number of lanes since > there is no muxing with other controllers in this case.

[Intel-gfx] [PATCH] drm/i915/icl: Add pre_pll_enable hook for ICL and set DFLEXDPMLE in this hook

2018-07-31 Thread Manasi Navare
In case of Legacy DP connector on TypeC port (C, D, E or F), the flex IO DPMLE register is set to maximum number of lanes since there is no muxing with other controllers in this case. While in case of the TypeC connector, it is set to the lane count obained from DFLEXDPSP register. This needs to