On 2019-09-26 16:44:33 [+0100], Chris Wilson wrote:
> > It's all edge interrupts -- although for gen2/3 my memory is hazy. But
> > the GPU (circa gen6) can generate more than enough interrupts to saturate
> > a CPU.
>
> So everything older than gen5 has MSI disabled it appears and needs
>
Quoting Chris Wilson (2019-09-26 15:25:38)
> Moving our primary irq handler to a RT thread incurs an extra 1us delay
> in process interrupts. This is most notice in waking up client threads,
> where it adds about 20% of extra latency. It also imposes a delay in
> feeding the GPU, an extra 1us
Quoting Brian Welty (2019-09-26 19:57:17)
>
> On 9/26/2019 7:25 AM, Chris Wilson wrote:
> > Moving our primary irq handler to a RT thread incurs an extra 1us delay
> > in process interrupts. This is most notice in waking up client threads,
> > where it adds about 20% of extra latency. It also
On 9/26/2019 7:25 AM, Chris Wilson wrote:
> Moving our primary irq handler to a RT thread incurs an extra 1us delay
> in process interrupts. This is most notice in waking up client threads,
> where it adds about 20% of extra latency. It also imposes a delay in
> feeding the GPU, an extra 1us
On 2019-09-26 16:40:34 [+0100], Chris Wilson wrote:
>
> It's all edge interrupts -- although for gen2/3 my memory is hazy. But
> the GPU (circa gen6) can generate more than enough interrupts to saturate
> a CPU.
:)
> -Chris
Sebastian
___
Intel-gfx
Quoting Chris Wilson (2019-09-26 16:40:34)
> Quoting Sebastian Andrzej Siewior (2019-09-26 16:32:52)
> > On 2019-09-26 16:24:59 [+0100], Chris Wilson wrote:
> > > > > diff --git a/drivers/gpu/drm/i915/i915_irq.c
> > > > > b/drivers/gpu/drm/i915/i915_irq.c
> > > > > index
Quoting Sebastian Andrzej Siewior (2019-09-26 16:32:52)
> On 2019-09-26 16:24:59 [+0100], Chris Wilson wrote:
> > > > diff --git a/drivers/gpu/drm/i915/i915_irq.c
> > > > b/drivers/gpu/drm/i915/i915_irq.c
> > > > index bc83f094065a..f3df7714a3f3 100644
> > > > ---
On 2019-09-26 16:24:59 [+0100], Chris Wilson wrote:
> > > diff --git a/drivers/gpu/drm/i915/i915_irq.c
> > > b/drivers/gpu/drm/i915/i915_irq.c
> > > index bc83f094065a..f3df7714a3f3 100644
> > > --- a/drivers/gpu/drm/i915/i915_irq.c
> > > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > > @@ -4491,8
Quoting Sebastian Andrzej Siewior (2019-09-26 16:13:08)
> On 2019-09-26 15:25:38 [+0100], Chris Wilson wrote:
> > Moving our primary irq handler to a RT thread incurs an extra 1us delay
> > in process interrupts. This is most notice in waking up client threads,
> > where it adds about 20% of extra
On 2019-09-26 15:57:07 [+0100], Tvrtko Ursulin wrote:
> 2. What about our tasklets - with threaded irqs we don't need them any more,
> right? So in this case they just add additional latency.
If you enqueue / schedule tasklets from your threaded handler then this
will wake up ksoftirqd and
On 2019-09-26 15:25:38 [+0100], Chris Wilson wrote:
> Moving our primary irq handler to a RT thread incurs an extra 1us delay
> in process interrupts. This is most notice in waking up client threads,
> where it adds about 20% of extra latency. It also imposes a delay in
> feeding the GPU, an extra
Quoting Tvrtko Ursulin (2019-09-26 15:57:07)
>
> On 26/09/2019 15:25, Chris Wilson wrote:
> > Moving our primary irq handler to a RT thread incurs an extra 1us delay
> > in process interrupts. This is most notice in waking up client threads,
> > where it adds about 20% of extra latency. It also
On 26/09/2019 15:25, Chris Wilson wrote:
Moving our primary irq handler to a RT thread incurs an extra 1us delay
in process interrupts. This is most notice in waking up client threads,
where it adds about 20% of extra latency. It also imposes a delay in
feeding the GPU, an extra 1us before
Moving our primary irq handler to a RT thread incurs an extra 1us delay
in process interrupts. This is most notice in waking up client threads,
where it adds about 20% of extra latency. It also imposes a delay in
feeding the GPU, an extra 1us before signaling secondary engines and
extra latency in
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