Re: [Intel-gfx] [PATCH] drm/i915: GEN7_MSG_CONTROL is ivb-only

2014-01-26 Thread Runyan, Arthur J
-Original Message- From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] Sent: Wednesday, January 22, 2014 2:40 PM To: Intel Graphics Development Cc: Daniel Vetter; Chris Wilson; Runyan, Arthur J; Dave Airlie Subject: [PATCH] drm/i915: GEN7_MSG_CONTROL is ivb-only At least I couldn't find

Re: [Intel-gfx] [PATCH] drm/i915: GEN7_MSG_CONTROL is ivb-only

2014-01-26 Thread Daniel Vetter
On Sun, Jan 26, 2014 at 08:43:53PM +, Runyan, Arthur J wrote: -Original Message- From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] Sent: Wednesday, January 22, 2014 2:40 PM To: Intel Graphics Development Cc: Daniel Vetter; Chris Wilson; Runyan, Arthur J; Dave Airlie

[Intel-gfx] [PATCH] drm/i915: GEN7_MSG_CONTROL is ivb-only

2014-01-22 Thread Daniel Vetter
At least I couldn't find it in the Haswell Bspec any more and we've tried to test-boot a Haswell machine with num_pipes forced to 0 (i.e. hit the PCH_NOP path) and the unclaimed register logic complained. So restrict this dance to just ivb platforms. Cc: Arthur Ranyan arthur.j.run...@intel.com

Re: [Intel-gfx] [PATCH] drm/i915: GEN7_MSG_CONTROL is ivb-only

2014-01-22 Thread Runyan, Arthur J
The equivalent function moved to register NDE_RSTWRN_OPT bit 4 RST PCH Handshake En on Haswell. You'll need to convert the WAIT_FOR_PCH_*_ACK programming over to that new location. -Original Message- From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] Sent: Wednesday, January 22,

[Intel-gfx] [PATCH] drm/i915: GEN7_MSG_CONTROL is ivb-only

2014-01-22 Thread Daniel Vetter
At least I couldn't find it in the Haswell Bspec any more and we've tried to test-boot a Haswell machine with num_pipes forced to 0 (i.e. hit the PCH_NOP path) and the unclaimed register logic complained. So restrict this dance to just ivb platforms. v2: Art pointed out that the bits simply

Re: [Intel-gfx] [PATCH] drm/i915: GEN7_MSG_CONTROL is ivb-only

2014-01-22 Thread Chris Wilson
On Wed, Jan 22, 2014 at 10:32:04PM +0100, Daniel Vetter wrote: At least I couldn't find it in the Haswell Bspec any more and we've tried to test-boot a Haswell machine with num_pipes forced to 0 (i.e. hit the PCH_NOP path) and the unclaimed register logic complained. So restrict this dance

[Intel-gfx] [PATCH] drm/i915: GEN7_MSG_CONTROL is ivb-only

2014-01-22 Thread Daniel Vetter
At least I couldn't find it in the Haswell Bspec any more and we've tried to test-boot a Haswell machine with num_pipes forced to 0 (i.e. hit the PCH_NOP path) and the unclaimed register logic complained. So restrict this dance to just ivb platforms. v2: Art pointed out that the bits simply

[Intel-gfx] [PATCH] drm/i915: GEN7_MSG_CONTROL is ivb-only

2014-01-22 Thread Daniel Vetter
At least I couldn't find it in the Haswell Bspec any more and we've tried to test-boot a Haswell machine with num_pipes forced to 0 (i.e. hit the PCH_NOP path) and the unclaimed register logic complained. So restrict this dance to just ivb platforms. v2: Art pointed out that the bits simply