[Intel-gfx] [PATCH] drm/i915: HWS must be in the mappable region for g33

2014-05-20 Thread Chris Wilson
On g33, the documentation states HWS_PGA: Format = Bits 28:12 of graphics memory address (bits 31:29 MBZ). which translates to that the address of the HWS must be below 256MiB, which is conveniently the mappable aperture. This also appears to be true (but not documented as so) for gen4 and

[Intel-gfx] [PATCH] drm/i915: HWS must be in the mappable region for g33

2014-05-19 Thread Chris Wilson
This also appears to be true (but not documented as so) for gen4 and gen5. To generalise we force it into the low mappable region for all non-LLC platforms. If we locate the HWS at the top of the GTT the machine will hard hang during boot (fails on pnv, gm45, ilk and byt, but works on snb, ivb,

Re: [Intel-gfx] [PATCH] drm/i915: HWS must be in the mappable region for g33

2014-05-19 Thread Ville Syrjälä
On Mon, May 19, 2014 at 07:56:11AM +0100, Chris Wilson wrote: This also appears to be true (but not documented as so) for gen4 and gen5. To generalise we force it into the low mappable region for all non-LLC platforms. If we locate the HWS at the top of the GTT the machine will hard hang