We want to disable the (unused) VGA plane on the intel hardware, which
should be a simple matter of writing the vga control register. However,
in 2009 (commit 24f119c769bacac5729297b682fec7811a983cc6), that simple
code was changed to also smash the SR01 VGA register to fix random
crash and
On Tue, Dec 17, 2013 at 09:12:10AM -0800, Keith Packard wrote:
We want to disable the (unused) VGA plane on the intel hardware, which
should be a simple matter of writing the vga control register. However,
in 2009 (commit 24f119c769bacac5729297b682fec7811a983cc6), that simple
code was changed
Chris Wilson ch...@chris-wilson.co.uk writes:
The bspec still says we must assert SR01 bit5 prior to disabling the VGA
plane.
Perhaps the test should be whether (vga_reg VGA_DISP_DISABLE) == 0 and
do nothing if the plane is already off.
The problem is that for some reason we're smashing
On Tue, Dec 17, 2013 at 10:17:24AM -0800, Keith Packard wrote:
Chris Wilson ch...@chris-wilson.co.uk writes:
The bspec still says we must assert SR01 bit5 prior to disabling the VGA
plane.
Perhaps the test should be whether (vga_reg VGA_DISP_DISABLE) == 0 and
do nothing if the plane
Chris Wilson ch...@chris-wilson.co.uk writes:
Ok, so as no vgaarb_clients have yet been registered and so the call to
grab the IO resource does not actually disable VGA IO routing to the
nvidia card.
Yikes! This explains a lot.
If you care to update the changelog to explain the problem is
