Re: [Intel-gfx] [PATCH 07/14] drm/i915: add PLL sharing support to handle 3 pipes

2011-10-21 Thread Keith Packard
On Wed, 19 Oct 2011 08:12:08 -0700, Jesse Barnes jbar...@virtuousgeek.org wrote: /* PCH eDP needs FDI, but CPU eDP does not */ - if (!has_edp_encoder || intel_encoder_is_pch_edp(has_edp_encoder-base)) { + if (!intel_crtc-no_pll + (!has_edp_encoder || +

Re: [Intel-gfx] [PATCH 07/14] drm/i915: add PLL sharing support to handle 3 pipes

2011-10-21 Thread Jesse Barnes
On Thu, 20 Oct 2011 23:18:06 -0700 Keith Packard kei...@keithp.com wrote: On Wed, 19 Oct 2011 08:12:08 -0700, Jesse Barnes jbar...@virtuousgeek.org wrote: /* PCH eDP needs FDI, but CPU eDP does not */ - if (!has_edp_encoder || intel_encoder_is_pch_edp(has_edp_encoder-base)) {

Re: [Intel-gfx] [PATCH 07/14] drm/i915: add PLL sharing support to handle 3 pipes

2011-10-21 Thread Keith Packard
On Fri, 21 Oct 2011 12:00:26 -0700, Jesse Barnes jbar...@virtuousgeek.org wrote: Yeah works much better with this applied. Makes me want to change the PLL sharing code a bit though; this should be factored out into a separate function and I should probably just add a tiny PLL allocator for

[Intel-gfx] [PATCH 07/14] drm/i915: add PLL sharing support to handle 3 pipes

2011-10-19 Thread Jesse Barnes
Add two new fields to the intel_crtc struct for 3 pipe support: no_pll and use_pll_a. The no_pll field is only set on the 3rd pipe to indicate that it doesn't have a PLL of its own and so shouldn't try to write the main PLL regs. The use_pll_a field controls which PLL pipe 3 will share, A or B.