On Thu, Oct 29, 2015 at 12:39:53PM -0700, Jesse Barnes wrote:
> On 10/29/2015 12:25 PM, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > We get underruns on the other pipe when enabling the CPU eDP PLL and
> > port on ILK.
> >
> > Bspec knows about the PLL issue, and recommen
On 10/29/2015 12:25 PM, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> We get underruns on the other pipe when enabling the CPU eDP PLL and
> port on ILK.
>
> Bspec knows about the PLL issue, and recommends doing a vblank wait just
> prior to enabling the PLL. That does seem to h
From: Ville Syrjälä
We get underruns on the other pipe when enabling the CPU eDP PLL and
port on ILK.
Bspec knows about the PLL issue, and recommends doing a vblank wait just
prior to enabling the PLL. That does seem to help, but unfortunately we
get another underrun when actually enabling the C
