On Fri, Nov 09, 2018 at 05:04:40PM +0200, Ville Syrjälä wrote:
> On Fri, Nov 09, 2018 at 04:58:20PM +0200, Imre Deak wrote:
> > A DMC bug on GEN9 big core machines fails to restore the driver's
> > request bits for the PW1 and MISC_IO power wells after a DC5/6
> > entry->exit sequence. As a
On Fri, Nov 09, 2018 at 04:58:20PM +0200, Imre Deak wrote:
> A DMC bug on GEN9 big core machines fails to restore the driver's
> request bits for the PW1 and MISC_IO power wells after a DC5/6
> entry->exit sequence. As a consequence the driver's subsequent check for
> the enabled status of these
A DMC bug on GEN9 big core machines fails to restore the driver's
request bits for the PW1 and MISC_IO power wells after a DC5/6
entry->exit sequence. As a consequence the driver's subsequent check for
the enabled status of these power wells will fail, as the check
considers the power wells being
