On Tue, Mar 5, 2013 at 8:08 PM, Daniel Vetter dan...@ffwll.ch wrote:
On Fri, Feb 22, 2013 at 05:05:28PM -0300, Paulo Zanoni wrote:
From: Paulo Zanoni paulo.r.zan...@intel.com
From the docs:
IIR can queue up to two interrupt events. When the IIR is cleared,
it will set itself again after
2014-05-23 5:13 GMT-03:00 Daniel Vetter dan...@ffwll.ch:
On Tue, Mar 5, 2013 at 8:08 PM, Daniel Vetter dan...@ffwll.ch wrote:
On Fri, Feb 22, 2013 at 05:05:28PM -0300, Paulo Zanoni wrote:
From: Paulo Zanoni paulo.r.zan...@intel.com
From the docs:
IIR can queue up to two interrupt events.
On Fri, May 23, 2014 at 08:25:59AM -0300, Paulo Zanoni wrote:
2014-05-23 5:13 GMT-03:00 Daniel Vetter dan...@ffwll.ch:
On Tue, Mar 5, 2013 at 8:08 PM, Daniel Vetter dan...@ffwll.ch wrote:
On Fri, Feb 22, 2013 at 05:05:28PM -0300, Paulo Zanoni wrote:
From: Paulo Zanoni
On Fri, Feb 22, 2013 at 05:05:28PM -0300, Paulo Zanoni wrote:
From: Paulo Zanoni paulo.r.zan...@intel.com
From the docs:
IIR can queue up to two interrupt events. When the IIR is cleared,
it will set itself again after one clock if a second event was
stored.
Only the rising
From: Paulo Zanoni paulo.r.zan...@intel.com
From the docs:
IIR can queue up to two interrupt events. When the IIR is cleared,
it will set itself again after one clock if a second event was
stored.
Only the rising edge of the PCH Display interrupt will cause the
North Display IIR
