Re: [Intel-gfx] [PATCH 14/27] drm/i915/icl: Set graphics mode register for gen11

On 09/01/18 15:28, Paulo Zanoni wrote: From: kgardine This patch clears a single bit. The bit is 0 by default but expected not to be set. Explicitly clearing the bit in this patch is intended to indicate some thinking has occurred, and that we want this bit cleared

Re: [Intel-gfx] [PATCH 14/27] drm/i915/icl: Set graphics mode register for gen11

On Tue, Jan 09, 2018 at 09:28:22PM -0200, Paulo Zanoni wrote: > From: kgardine Please fix this to use Kelvin's full name when pushing. Both here and in the s-o-b line. It may trigger this rule causing a rejection somewhere up the merge chain:

[Intel-gfx] [PATCH 14/27] drm/i915/icl: Set graphics mode register for gen11

From: kgardine This patch clears a single bit. The bit is 0 by default but expected not to be set. Explicitly clearing the bit in this patch is intended to indicate some thinking has occurred, and that we want this bit cleared and we are not just excepting the default