If the fb format is YUV, enable the plane CSC mode bits
for the conversion.
v2: Addressed review comments from Shashank Sharma
Alignment issue fixed in i915_reg.h
v3: Adding Reviewed By from Shashank Sharma
Reviewed-by: Shashank Sharma
Signed-off-by: Vidya Srinivas
My previous review comment for alignment is not addressed in this patch.
Regards
Shashank
On 2/14/2018 10:27 AM, Vidya Srinivas wrote:
If the fb format is YUV, enable the plane CSC mode bits
for the conversion.
Signed-off-by: Vidya Srinivas
---
My previous review comment for alignment has not been addressed in this
series
Regards
Shashank
On 2/14/2018 10:27 AM, Vidya Srinivas wrote:
If the fb format is YUV, enable the plane CSC mode bits
for the conversion.
Signed-off-by: Vidya Srinivas
---
If the fb format is YUV, enable the plane CSC mode bits
for the conversion.
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/i915_reg.h | 6 ++
drivers/gpu/drm/i915/intel_display.c | 2 ++
2 files changed, 8 insertions(+)
diff --git
If the fb format is YUV, enable the plane CSC mode bits
for the conversion.
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/i915_reg.h | 6 ++
drivers/gpu/drm/i915/intel_display.c | 2 ++
2 files changed, 8 insertions(+)
diff --git
If the fb format is YUV, enable the plane CSC mode bits
for the conversion.
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/i915_reg.h | 6 ++
drivers/gpu/drm/i915/intel_display.c | 2 ++
2 files changed, 8 insertions(+)
diff --git
Regards
Shashank
On 2/6/2018 6:28 PM, Vidya Srinivas wrote:
If the fb format is YUV, enable the plane CSC mode bits
for the conversion.
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/i915_reg.h | 6 ++
drivers/gpu/drm/i915/intel_display.c | 2 ++
If the fb format is YUV, enable the plane CSC mode bits
for the conversion.
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/i915_reg.h | 6 ++
drivers/gpu/drm/i915/intel_display.c | 2 ++
2 files changed, 8 insertions(+)
diff --git
If the fb format is YUV, enable the plane CSC mode bits
for the conversion.
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/i915_reg.h | 6 ++
drivers/gpu/drm/i915/intel_display.c | 2 ++
2 files changed, 8 insertions(+)
diff --git
If the fb format is YUV, enable the plane CSC mode bits
for the conversion.
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/i915_reg.h | 6 ++
drivers/gpu/drm/i915/intel_display.c | 2 ++
2 files changed, 8 insertions(+)
diff --git
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