On Wed, Apr 16, 2014 at 12:32 AM, Jeff McGee jeff.mc...@intel.com wrote:
Reflecting on my initial confusion, would it be clearer to provide names
for
each dword position in the context image, rather than using an unnamed
offset
like CTX_R_PWR_CLK_STATE+1? Example:
On Thu, Mar 27, 2014 at 05:59:48PM +, oscar.ma...@intel.com wrote:
From: Ben Widawsky benjamin.widaw...@intel.com
For the most part, logical rinf context objects are similar to hardware
contexts in that the backing object is meant to be opaque. There are
some exceptions where we need to
On Tue, Apr 15, 2014 at 11:00:33AM -0500, Jeff McGee wrote:
On Thu, Mar 27, 2014 at 05:59:48PM +, oscar.ma...@intel.com wrote:
From: Ben Widawsky benjamin.widaw...@intel.com
For the most part, logical rinf context objects are similar to hardware
contexts in that the backing object is
On Tue, Apr 15, 2014 at 11:10:34AM -0500, Jeff McGee wrote:
Oh, nevermind. I understand now.
Quickly explaining your understanding for everyone else's benefit would be
nice ... In general be explicit and verbose on mailing lists to make sure
you don't miss some important bit of context people
On Tue, Apr 15, 2014 at 11:10:34AM -0500, Jeff McGee wrote:
On Tue, Apr 15, 2014 at 11:00:33AM -0500, Jeff McGee wrote:
On Thu, Mar 27, 2014 at 05:59:48PM +, oscar.ma...@intel.com wrote:
From: Ben Widawsky benjamin.widaw...@intel.com
For the most part, logical rinf context objects
On Tue, Apr 15, 2014 at 03:43:23PM -0500, Jeff McGee wrote:
On Tue, Apr 15, 2014 at 11:10:34AM -0500, Jeff McGee wrote:
On Tue, Apr 15, 2014 at 11:00:33AM -0500, Jeff McGee wrote:
On Thu, Mar 27, 2014 at 05:59:48PM +, oscar.ma...@intel.com wrote:
From: Ben Widawsky
On Tue, Apr 15, 2014 at 11:08:02PM +0200, Daniel Vetter wrote:
On Tue, Apr 15, 2014 at 03:43:23PM -0500, Jeff McGee wrote:
On Tue, Apr 15, 2014 at 11:10:34AM -0500, Jeff McGee wrote:
On Tue, Apr 15, 2014 at 11:00:33AM -0500, Jeff McGee wrote:
On Thu, Mar 27, 2014 at 05:59:48PM +,
Widawsky; Widawsky, Benjamin
Subject: Re: [Intel-gfx] [PATCH 19/49] drm/i915/bdw: Populate LR contexts
(somewhat)
On Thu, Mar 27, 2014 at 05:59:48PM +, oscar.ma...@intel.com wrote:
+ if (ring-id == RCS)
+ reg_state[CTX_LRI_HEADER_0] =
MI_LOAD_REGISTER_IMM(14);
+ else
On Thu, Mar 27, 2014 at 05:59:48PM +, oscar.ma...@intel.com wrote:
+ if (ring-id == RCS)
+ reg_state[CTX_LRI_HEADER_0] = MI_LOAD_REGISTER_IMM(14);
+ else
+ reg_state[CTX_LRI_HEADER_0] = MI_LOAD_REGISTER_IMM(11);
In the Register State Context, this header is
From: Ben Widawsky benjamin.widaw...@intel.com
For the most part, logical rinf context objects are similar to hardware
contexts in that the backing object is meant to be opaque. There are
some exceptions where we need to poke certain offsets of the object for
initialization, updating the tail
10 matches
Mail list logo
