[Intel-gfx] [PATCH 2/7] drm/i915: Keep a count of requests waiting for a slot on GPU

2018-06-06 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Keep a per-engine number of runnable (waiting for GPU time) requests. We choose to mange the runnable counter at the backend level instead of at the request submit_notify callback. The latter would be more consolidated and less code, but it would require making the counter e

Re: [Intel-gfx] [PATCH 2/7] drm/i915: Keep a count of requests waiting for a slot on GPU

2018-04-06 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-04-05 13:39:18) > From: Tvrtko Ursulin > > Keep a per-engine number of runnable (waiting for GPU time) requests. > > v2: > * Move queued increment from insert_request to execlist_submit_request to >avoid bumping when re-ordering for priority. > * Support the co

[Intel-gfx] [PATCH 2/7] drm/i915: Keep a count of requests waiting for a slot on GPU

2018-04-05 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Keep a per-engine number of runnable (waiting for GPU time) requests. v2: * Move queued increment from insert_request to execlist_submit_request to avoid bumping when re-ordering for priority. * Support the counter on the ringbuffer submission path as well, albeit ju

[Intel-gfx] [PATCH 2/7] drm/i915: Keep a count of requests waiting for a slot on GPU

2018-03-19 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Keep a per-engine number of runnable (waiting for GPU time) requests. v2: * Move queued increment from insert_request to execlist_submit_request to avoid bumping when re-ordering for priority. * Support the counter on the ringbuffer submission path as well, albeit ju