Re: [Intel-gfx] [PATCH 5/9] drm/i915: Fix lanecontrol, vswing, preemp for Valleyview DisplayPort

2012-09-27 Thread Vijay Purushothaman
On 9/26/2012 7:54 PM, Daniel Vetter wrote: On Wed, Sep 26, 2012 at 07:07:34PM +0530, Vijay Purushothaman wrote: In Valleyview voltage swing, pre-emphasis and lane control registers can be programmed only through the h/w side band fabric. Also use i9xx_update_pll to program the correct DPLL

[Intel-gfx] [PATCH 5/9] drm/i915: Fix lanecontrol, vswing, preemp for Valleyview DisplayPort

2012-09-26 Thread Vijay Purushothaman
In Valleyview voltage swing, pre-emphasis and lane control registers can be programmed only through the h/w side band fabric. Also use i9xx_update_pll to program the correct DPLL sequence. Signed-off-by: Vijay Purushothaman vijay.a.purushotha...@intel.com Signed-off-by: Gajanan Bhat

Re: [Intel-gfx] [PATCH 5/9] drm/i915: Fix lanecontrol, vswing, preemp for Valleyview DisplayPort

2012-09-26 Thread Daniel Vetter
On Wed, Sep 26, 2012 at 07:07:34PM +0530, Vijay Purushothaman wrote: In Valleyview voltage swing, pre-emphasis and lane control registers can be programmed only through the h/w side band fabric. Also use i9xx_update_pll to program the correct DPLL sequence. Signed-off-by: Vijay Purushothaman