On Wed, Feb 10, 2016 at 05:37:20PM -0800, Marc Herbert wrote:
> On 10/02/16 06:27, Ville Syrjälä wrote:
> > On Tue, Feb 09, 2016 at 04:28:27PM -0800, clinton.a.tay...@intel.com wrote:
> >> From: Clint Taylor
> >>
> >> Track VCO frequency of SKL instead of the boot
On Tue, Feb 09, 2016 at 04:28:27PM -0800, clinton.a.tay...@intel.com wrote:
> From: Clint Taylor
>
> Track VCO frequency of SKL instead of the boot CDCLK and allow modeset
> to set cdclk based on the max required pixel clock based on VCO
> selected.
>
> The vco
On Tue, Feb 09, 2016 at 04:28:27PM -0800, clinton.a.tay...@intel.com wrote:
> From: Clint Taylor
>
> Track VCO frequency of SKL instead of the boot CDCLK and allow modeset
> to set cdclk based on the max required pixel clock based on VCO
> selected.
>
> The vco
On 02/09/2016 07:29 PM, Thulasimani, Sivakumar wrote:
couple of questions since i am looking at SKL code for the first time
> seems we are not reading max cd clock from VBIOS like BDW
even though SKL has limit register to say max cd clock i dont think
it is working, so VBIOS saves
On 10/02/16 06:27, Ville Syrjälä wrote:
> On Tue, Feb 09, 2016 at 04:28:27PM -0800, clinton.a.tay...@intel.com wrote:
>> From: Clint Taylor
>>
>> Track VCO frequency of SKL instead of the boot CDCLK and allow modeset
>> to set cdclk based on the max required pixel
From: Clint Taylor
Track VCO frequency of SKL instead of the boot CDCLK and allow modeset
to set cdclk based on the max required pixel clock based on VCO
selected.
The vco should be tracked at the atomic level and all CRTCs updated if
the required vco is changed. At
couple of questions since i am looking at SKL code for the first time
> seems we are not reading max cd clock from VBIOS like BDW
even though SKL has limit register to say max cd clock i dont think
it is working, so VBIOS saves the value during boot just like in BDW
and we are