Re: [Intel-gfx] [PATCH V8] drm/i915/skl: SKL CDCLK change on modeset tracking VCO

2016-03-11 Thread Clint Taylor
On 03/10/2016 12:08 AM, Maarten Lankhorst wrote: Op 09-03-16 om 22:58 schreef clinton.a.tay...@intel.com: From: Clint Taylor WARNING: Using ChromeOS with an eDP panel and a 4K@60 DP monitor connected to DDI1 the system will hard hang during a cold boot. Occurs when

Re: [Intel-gfx] [PATCH V8] drm/i915/skl: SKL CDCLK change on modeset tracking VCO

2016-03-10 Thread Ville Syrjälä
On Wed, Mar 09, 2016 at 01:58:39PM -0800, clinton.a.tay...@intel.com wrote: > From: Clint Taylor > > WARNING: Using ChromeOS with an eDP panel and a 4K@60 DP monitor connected > to DDI1 the system will hard hang during a cold boot. Occurs when DDI1 > is enabled when

Re: [Intel-gfx] [PATCH V8] drm/i915/skl: SKL CDCLK change on modeset tracking VCO

2016-03-10 Thread Maarten Lankhorst
Op 09-03-16 om 22:58 schreef clinton.a.tay...@intel.com: > From: Clint Taylor > > WARNING: Using ChromeOS with an eDP panel and a 4K@60 DP monitor connected > to DDI1 the system will hard hang during a cold boot. Occurs when DDI1 > is enabled when the cdclk is less

[Intel-gfx] [PATCH V8] drm/i915/skl: SKL CDCLK change on modeset tracking VCO

2016-03-09 Thread clinton . a . taylor
From: Clint Taylor WARNING: Using ChromeOS with an eDP panel and a 4K@60 DP monitor connected to DDI1 the system will hard hang during a cold boot. Occurs when DDI1 is enabled when the cdclk is less then required. DP connected to DDI2 and HPD on either port works