> -Original Message-
> From: Sousa, Gustavo
> Sent: Tuesday, September 12, 2023 6:59 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Kahola, Mika ; Taylor, Clinton A
>
> Subject: [PATCH v2] drm/i915/cx0: Add step for programming msgbus timer
>
> There was a recent update in the BSpec
There was a recent update in the BSpec adding an extra step to the PLL
enable sequence, which is for programming the msgbus timer. Since we
also touch PHY registers during hw readout, let's do the programming
when starting a transaction rather than only when doing the PLL enable
sequence.
This
