Re: [Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only

2020-03-13 Thread Kai Vehmanen
Hey, On Thu, 12 Mar 2020, Ville Syrjälä wrote: > On Thu, Mar 12, 2020 at 07:27:58PM +0200, Kai Vehmanen wrote: >> So I think this starts to look that we should move calling glk_force_audio >> to bind/unbind pair. I can make a patch for this. > > That would stop us from doing dynamic cdclk

Re: [Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only

2020-03-12 Thread Ville Syrjälä
On Thu, Mar 12, 2020 at 07:27:58PM +0200, Kai Vehmanen wrote: > Hey, > > On Tue, 10 Mar 2020, Ville Syrjälä wrote: > > > On Tue, Mar 10, 2020 at 07:18:58PM +0200, Kai Vehmanen wrote: > >> On Tue, 10 Mar 2020, Ville Syrjälä wrote: > >>> audio at init time. And we could maybe try to remove the

Re: [Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only

2020-03-12 Thread Ville Syrjälä
On Thu, Mar 12, 2020 at 07:27:58PM +0200, Kai Vehmanen wrote: > Hey, > > On Tue, 10 Mar 2020, Ville Syrjälä wrote: > > > On Tue, Mar 10, 2020 at 07:18:58PM +0200, Kai Vehmanen wrote: > >> On Tue, 10 Mar 2020, Ville Syrjälä wrote: > >>> audio at init time. And we could maybe try to remove the

Re: [Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only

2020-03-12 Thread Kai Vehmanen
Hey, On Tue, 10 Mar 2020, Ville Syrjälä wrote: > On Tue, Mar 10, 2020 at 07:18:58PM +0200, Kai Vehmanen wrote: >> On Tue, 10 Mar 2020, Ville Syrjälä wrote: >>> audio at init time. And we could maybe try to remove the modeset from the >>> put_power() so that at least if you get a blink it's just

Re: [Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only

2020-03-11 Thread Takashi Iwai
On Wed, 11 Mar 2020 18:04:24 +0100, Kai Vehmanen wrote: > > Hey, > > On Wed, 11 Mar 2020, Takashi Iwai wrote: > > > The remaining question is whether this display_power() call is still > > needed for the recent chips. Basically it's there for HSW/BDW type > > chips that need already the power

Re: [Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only

2020-03-11 Thread Kai Vehmanen
Hey, On Wed, 11 Mar 2020, Takashi Iwai wrote: > The remaining question is whether this display_power() call is still > needed for the recent chips. Basically it's there for HSW/BDW type > chips that need already the power for the HDA link that is dedicated > to HDMI. That is, a patch like

Re: [Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only

2020-03-11 Thread Takashi Iwai
On Wed, 11 Mar 2020 13:16:56 +0100, Kai Vehmanen wrote: > > Hey, > > On Tue, 10 Mar 2020, Takashi Iwai wrote: > > On Tue, 10 Mar 2020 19:25:22 +0100, Ville Syrjälä wrote: > >> On Tue, Mar 10, 2020 at 07:18:58PM +0200, Kai Vehmanen wrote: > >>> One problematic scenario that this doesn't cover: >

Re: [Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only

2020-03-11 Thread Kai Vehmanen
Hey, On Tue, 10 Mar 2020, Takashi Iwai wrote: > On Tue, 10 Mar 2020 19:25:22 +0100, Ville Syrjälä wrote: >> On Tue, Mar 10, 2020 at 07:18:58PM +0200, Kai Vehmanen wrote: >>> One problematic scenario that this doesn't cover: >>> - a single display is used (at low cdclk), and >>> - audio block

Re: [Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only

2020-03-10 Thread Takashi Iwai
On Tue, 10 Mar 2020 19:25:22 +0100, Ville Syrjälä wrote: > > On Tue, Mar 10, 2020 at 07:18:58PM +0200, Kai Vehmanen wrote: > > One problematic scenario that this doesn't cover: > > - a single display is used (at low cdclk), and > > - audio block goes to runtime suspend while display stays up.

Re: [Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only

2020-03-10 Thread Ville Syrjälä
On Tue, Mar 10, 2020 at 07:18:58PM +0200, Kai Vehmanen wrote: > Hi, > > On Tue, 10 Mar 2020, Ville Syrjälä wrote: > > >> On Fri, 06 Mar 2020 17:45:44 +0100, Kai Vehmanen wrote: > >>> Similarly on i915 side, it would seem pretty unlikely that we are going > >>> to get smooth changes of CDCLK. It

Re: [Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only

2020-03-10 Thread Kai Vehmanen
Hi, On Tue, 10 Mar 2020, Ville Syrjälä wrote: >> On Fri, 06 Mar 2020 17:45:44 +0100, Kai Vehmanen wrote: >>> Similarly on i915 side, it would seem pretty unlikely that we are going >>> to get smooth changes of CDCLK. It might work better on some platforms, > > There is new hw in the pipeline

Re: [Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only

2020-03-10 Thread Ville Syrjälä
On Mon, Mar 09, 2020 at 11:54:52AM +0100, Takashi Iwai wrote: > On Fri, 06 Mar 2020 17:45:44 +0100, > Kai Vehmanen wrote: > > > > Hi folks, > > > > [+Takashi from ALSA] > > > > On Mon, 6 Jan 2020, Matt Roper wrote: > > >>> On Tue, Dec 31, 2019 at 04:00:07PM +0200, Kai Vehmanen wrote: > >

Re: [Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only

2020-03-10 Thread Kai Vehmanen
Hey, On Mon, 9 Mar 2020, Takashi Iwai wrote: > On Fri, 06 Mar 2020 17:45:44 +0100, Kai Vehmanen wrote: >> unfortunately it seems this fix that was done is not holding up in wider >> testing. It now looks we need to enforce the constraint in one form or [...] >> So how about: We move the

Re: [Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only

2020-03-09 Thread Takashi Iwai
On Fri, 06 Mar 2020 17:45:44 +0100, Kai Vehmanen wrote: > > Hi folks, > > [+Takashi from ALSA] > > On Mon, 6 Jan 2020, Matt Roper wrote: > >>> On Tue, Dec 31, 2019 at 04:00:07PM +0200, Kai Vehmanen wrote: > Revert changes done in commit f6ec9483091f ("drm/i915: extend audio >

Re: [Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only

2020-03-06 Thread Kai Vehmanen
Hi folks, [+Takashi from ALSA] On Mon, 6 Jan 2020, Matt Roper wrote: >>> On Tue, Dec 31, 2019 at 04:00:07PM +0200, Kai Vehmanen wrote: Revert changes done in commit f6ec9483091f ("drm/i915: extend audio CDCLK>=2*BCLK constraint to more platforms"). Audio drivers > > Agreed; GLK's

Re: [Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only

2020-01-06 Thread Matt Roper
On Fri, Jan 03, 2020 at 05:28:24PM +0200, Kai Vehmanen wrote: > Hi, > > On Thu, 2 Jan 2020, Rodrigo Vivi wrote: > > > On Tue, Dec 31, 2019 at 04:00:07PM +0200, Kai Vehmanen wrote: > >> Revert changes done in commit f6ec9483091f ("drm/i915: extend audio > >> CDCLK>=2*BCLK constraint to more

Re: [Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only

2020-01-03 Thread Kai Vehmanen
Hi, On Thu, 2 Jan 2020, Rodrigo Vivi wrote: > On Tue, Dec 31, 2019 at 04:00:07PM +0200, Kai Vehmanen wrote: >> Revert changes done in commit f6ec9483091f ("drm/i915: extend audio >> CDCLK>=2*BCLK constraint to more platforms"). Audio drivers [...] >> /* Force CDCLK to 2*BCLK as long

Re: [Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only

2020-01-02 Thread Rodrigo Vivi
On Tue, Dec 31, 2019 at 04:00:07PM +0200, Kai Vehmanen wrote: > Revert changes done in commit f6ec9483091f ("drm/i915: extend audio > CDCLK>=2*BCLK constraint to more platforms"). Audio drivers > communicate with i915 over HDA bus multiple times during system > boot-up and each of these

[Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only

2019-12-31 Thread Kai Vehmanen
Revert changes done in commit f6ec9483091f ("drm/i915: extend audio CDCLK>=2*BCLK constraint to more platforms"). Audio drivers communicate with i915 over HDA bus multiple times during system boot-up and each of these transactions result in matching get_power/put_power calls to i915, and depending