On Wed, Feb 15, 2017 at 04:12:04PM +0200, Ville Syrjälä wrote:
> On Wed, Feb 15, 2017 at 01:15:47PM +, Chris Wilson wrote:
> > In order to prevent accessing the hpd registers outside of the display
> > power wells, we should refrain from writing to the registers before the
> > display
On Wed, Feb 15, 2017 at 01:15:47PM +, Chris Wilson wrote:
> In order to prevent accessing the hpd registers outside of the display
> power wells, we should refrain from writing to the registers before the
> display interrupts are enabled.
>
> [4.740136] WARNING: CPU: 1 PID: 221 at
>
In order to prevent accessing the hpd registers outside of the display
power wells, we should refrain from writing to the registers before the
display interrupts are enabled.
[4.740136] WARNING: CPU: 1 PID: 221 at
drivers/gpu/drm/i915/intel_uncore.c:795 __unclaimed_reg_debug+0x44/0x50 [i915]
