Re: [Intel-gfx] [PATCH v2 3/7] drm/i915/uc: use different ggtt pin offsets for uc loads

2022-10-18 Thread Ceraolo Spurio, Daniele
On 10/17/2022 4:44 PM, John Harrison wrote: On 10/12/2022 17:03, Daniele Ceraolo Spurio wrote: Our current FW loading process is the same for all FWs: - Pin FW to GGTT at the start of the ggtt->uc_fw node - Load the FW - Unpin This worked because we didn't have a case where 2 FWs would be

Re: [Intel-gfx] [PATCH v2 3/7] drm/i915/uc: use different ggtt pin offsets for uc loads

2022-10-17 Thread John Harrison
On 10/12/2022 17:03, Daniele Ceraolo Spurio wrote: Our current FW loading process is the same for all FWs: - Pin FW to GGTT at the start of the ggtt->uc_fw node - Load the FW - Unpin This worked because we didn't have a case where 2 FWs would be loaded on the same GGTT at the same time. On

[Intel-gfx] [PATCH v2 3/7] drm/i915/uc: use different ggtt pin offsets for uc loads

2022-10-12 Thread Daniele Ceraolo Spurio
Our current FW loading process is the same for all FWs: - Pin FW to GGTT at the start of the ggtt->uc_fw node - Load the FW - Unpin This worked because we didn't have a case where 2 FWs would be loaded on the same GGTT at the same time. On MTL, however, this can happend if both GTs are reset at