Re: [Intel-gfx] [PATCH v3] drm/i915/mst: filter out the display mode exceed sink's capability

2020-05-24 Thread Lee, Shawn C
On Fri, 2020-05-22, 06:35 p.m, Lyude Paul wrote: >On Fri, 2020-05-22 at 14:35 -0400, Lyude Paul wrote: >> >> On Tue, 2020-05-19 at 11:56 +0800, Lee Shawn C wrote: >> > So far, max dot clock rate for MST mode rely on physcial bandwidth >> > limitation. It would caused compatibility issue if source

Re: [Intel-gfx] [PATCH v3] drm/i915/mst: filter out the display mode exceed sink's capability

2020-05-22 Thread Lyude Paul
On Fri, 2020-05-22 at 14:35 -0400, Lyude Paul wrote: > > On Tue, 2020-05-19 at 11:56 +0800, Lee Shawn C wrote: > > So far, max dot clock rate for MST mode rely on physcial > > bandwidth limitation. It would caused compatibility issue > > if source display resolution exceed MST hub output ability.

Re: [Intel-gfx] [PATCH v3] drm/i915/mst: filter out the display mode exceed sink's capability

2020-05-22 Thread Lyude Paul
On Tue, 2020-05-19 at 11:56 +0800, Lee Shawn C wrote: > So far, max dot clock rate for MST mode rely on physcial > bandwidth limitation. It would caused compatibility issue > if source display resolution exceed MST hub output ability. > > For example, source DUT had DP 1.2 output capability. >

[Intel-gfx] [PATCH v3] drm/i915/mst: filter out the display mode exceed sink's capability

2020-05-18 Thread Lee Shawn C
So far, max dot clock rate for MST mode rely on physcial bandwidth limitation. It would caused compatibility issue if source display resolution exceed MST hub output ability. For example, source DUT had DP 1.2 output capability. And MST docking just support HDMI 1.4 spec. When a HDMI 2.0 monitor c