On 03.03.2023 13:01, Tvrtko Ursulin wrote:
On 02/03/2023 11:00, Andrzej Hajda wrote:
On 02.03.2023 11:43, Tvrtko Ursulin wrote:
On 08/02/2023 10:51, Andrzej Hajda wrote:
Write-combining memory allows speculative reads by CPU.
ggtt->error_capture is WC mapped to CPU, so CPU/MMU can try
to
On 02/03/2023 11:00, Andrzej Hajda wrote:
On 02.03.2023 11:43, Tvrtko Ursulin wrote:
On 08/02/2023 10:51, Andrzej Hajda wrote:
Write-combining memory allows speculative reads by CPU.
ggtt->error_capture is WC mapped to CPU, so CPU/MMU can try
to prefetch memory beyond the error_capture, ie
On 02.03.2023 11:43, Tvrtko Ursulin wrote:
On 08/02/2023 10:51, Andrzej Hajda wrote:
Write-combining memory allows speculative reads by CPU.
ggtt->error_capture is WC mapped to CPU, so CPU/MMU can try
to prefetch memory beyond the error_capture, ie it tries
to read memory pointed by next
On 08/02/2023 10:51, Andrzej Hajda wrote:
Write-combining memory allows speculative reads by CPU.
ggtt->error_capture is WC mapped to CPU, so CPU/MMU can try
to prefetch memory beyond the error_capture, ie it tries
to read memory pointed by next PTE in GGTT.
If this PTE points to invalid
Hi all,
As suggested by Rodrigo added CC: Tvrtko and Joonas, see below.
On 22.02.2023 21:48, Rodrigo Vivi wrote:
On Wed, Feb 22, 2023 at 01:05:16PM +0100, Andrzej Hajda wrote:
Hi all,
Gently ping on the patch. CI pollution is quite high:
$ grep 'PTE Read access'
On Wed, Feb 22, 2023 at 01:05:16PM +0100, Andrzej Hajda wrote:
> Hi all,
>
> Gently ping on the patch. CI pollution is quite high:
> $ grep 'PTE Read access' CI/drm-tip/CI_DRM_12768/*/dmesg* | wc -l
> 308
>
> Regards
> Andrzej
>
> On 08.02.2023 11:51, Andrzej Hajda wrote:
> > Write-combining
Hi all,
Gently ping on the patch. CI pollution is quite high:
$ grep 'PTE Read access' CI/drm-tip/CI_DRM_12768/*/dmesg* | wc -l
308
Regards
Andrzej
On 08.02.2023 11:51, Andrzej Hajda wrote:
Write-combining memory allows speculative reads by CPU.
ggtt->error_capture is WC mapped to CPU, so
On 08/02/2023 11:29, Andrzej Hajda wrote:
On 08.02.2023 12:17, Andrzej Hajda wrote:
On 08.02.2023 12:03, Matthew Auld wrote:
On 08/02/2023 10:51, Andrzej Hajda wrote:
Write-combining memory allows speculative reads by CPU.
ggtt->error_capture is WC mapped to CPU, so CPU/MMU can try
to
On 08.02.2023 12:17, Andrzej Hajda wrote:
On 08.02.2023 12:03, Matthew Auld wrote:
On 08/02/2023 10:51, Andrzej Hajda wrote:
Write-combining memory allows speculative reads by CPU.
ggtt->error_capture is WC mapped to CPU, so CPU/MMU can try
to prefetch memory beyond the error_capture, ie
On 08.02.2023 12:03, Matthew Auld wrote:
On 08/02/2023 10:51, Andrzej Hajda wrote:
Write-combining memory allows speculative reads by CPU.
ggtt->error_capture is WC mapped to CPU, so CPU/MMU can try
to prefetch memory beyond the error_capture, ie it tries
to read memory pointed by next PTE
On 08/02/2023 10:51, Andrzej Hajda wrote:
Write-combining memory allows speculative reads by CPU.
ggtt->error_capture is WC mapped to CPU, so CPU/MMU can try
to prefetch memory beyond the error_capture, ie it tries
to read memory pointed by next PTE in GGTT.
If this PTE points to invalid address
Write-combining memory allows speculative reads by CPU.
ggtt->error_capture is WC mapped to CPU, so CPU/MMU can try
to prefetch memory beyond the error_capture, ie it tries
to read memory pointed by next PTE in GGTT.
If this PTE points to invalid address DMAR errors will occur.
This behaviour was
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