Thanks for the review.
On 9/9/2016 10:50 PM, Chris Wilson wrote:
On Fri, Sep 09, 2016 at 06:21:26PM +0530, Sagar Arun Kamble wrote:
@@ -6720,31 +6743,38 @@ void intel_enable_gt_powersave(struct drm_i915_private
*dev_priv)
+ if (intel_slpc_enabled()) {
+ } else {
-
On Fri, Sep 09, 2016 at 06:21:26PM +0530, Sagar Arun Kamble wrote:
> @@ -6720,31 +6743,38 @@ void intel_enable_gt_powersave(struct
> drm_i915_private *dev_priv)
> + if (intel_slpc_enabled()) {
> + } else {
>
> - WARN_ON(dev_priv->rps.max_freq < dev_priv->rps.min_freq);
> -
From: Tom O'Rourke
On platforms with SLPC support: call intel_slpc_*()
functions from corresponding intel_*_gt_powersave()
functions; and do not use rps functions.
v1: Return void instead of ignored error code (Paulo)
enable/disable RC6 in SLPC flows (Sagar)