On this specific question.
On Fri, 2022-02-04 at 17:28 -0800, Umesh Nerlige Ramappa wrote:
> On Wed, Jan 26, 2022 at 02:48:15AM -0800, Alan Previn wrote:
> > Add additional DG2 registers for GuC error state capture.
> >
> > + num_steer_regs = ARRAY_SIZE(xelpd_extregs);
> > + if (ipver >=
Apologies for the delayed response. I totally agree with the
lpd vs hpg function separation. Thats what i initially implemented
but when cross-referencing my logic with the execlist i realized
DG2 steering registers for all Gens were in the same function so
I thought of keeping it consistent but i
On Wed, Jan 26, 2022 at 02:48:15AM -0800, Alan Previn wrote:
Add additional DG2 registers for GuC error state capture.
Signed-off-by: Alan Previn
---
.../gpu/drm/i915/gt/uc/intel_guc_capture.c| 64 ++-
1 file changed, 49 insertions(+), 15 deletions(-)
diff --git
Add additional DG2 registers for GuC error state capture.
Signed-off-by: Alan Previn
---
.../gpu/drm/i915/gt/uc/intel_guc_capture.c| 64 ++-
1 file changed, 49 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
