Re: [Intel-gfx] [PATCH v5 03/11] drm/i915/dsb: single register write function for DSB.

2019-09-09 Thread Animesh Manna
On 9/9/2019 6:28 PM, Sharma, Shashank wrote: On 9/7/2019 4:37 PM, Animesh Manna wrote: DSB support single register write through opcode 0x1. Generic api created which accumulate all single register write in a batch buffer and once DSB is triggered, it will program all the registers at the

Re: [Intel-gfx] [PATCH v5 03/11] drm/i915/dsb: single register write function for DSB.

2019-09-09 Thread Sharma, Shashank
On 9/7/2019 4:37 PM, Animesh Manna wrote: DSB support single register write through opcode 0x1. Generic api created which accumulate all single register write in a batch buffer and once DSB is triggered, it will program all the registers at the same time. v1: Initial version. v2: Unused macro

[Intel-gfx] [PATCH v5 03/11] drm/i915/dsb: single register write function for DSB.

2019-09-07 Thread Animesh Manna
DSB support single register write through opcode 0x1. Generic api created which accumulate all single register write in a batch buffer and once DSB is triggered, it will program all the registers at the same time. v1: Initial version. v2: Unused macro removed and cosmetic changes done. (Shashank)