This is a series I came up with as a result of KS discussions. The
plan was to pin the CPU C state to keep the GPU going as fast as
possible while it was active, since there's some relation between the
two (we don't know for sure yet, per chipset, whether it's due to
latency of DMA writes having
Out of curiousity, what happened to ACPI_BM_BREAK_EN here:
https://bugs.freedesktop.org/show_bug.cgi?id=30364
On my box, that register is (according to setpci) 0x00, but I'm
testing on an ICH9M and I don't seem to be affected anyway.
--Andy
On Mon, Nov 1, 2010 at 4:23 PM, Eric Anholt
On Mon, 1 Nov 2010 17:00:46 -0400, Andrew Lutomirski l...@mit.edu wrote:
Out of curiousity, what happened to ACPI_BM_BREAK_EN here:
https://bugs.freedesktop.org/show_bug.cgi?id=30364
On my box, that register is (according to setpci) 0x00, but I'm
testing on an ICH9M and I don't seem to be
