On Wed, Apr 27, 2022 at 08:41:35AM -0700, Niranjana Vishwanathapura wrote:
On Wed, Apr 20, 2022 at 03:45:25PM -0700, Niranjana Vishwanathapura wrote:
On Thu, Mar 31, 2022 at 10:28:48AM +0200, Daniel Vetter wrote:
Adding a pile of people who've expressed interest in vm_bind for their
drivers.
On Wed, Apr 27, 2022 at 08:41:35AM -0700, Niranjana Vishwanathapura wrote:
> On Wed, Apr 20, 2022 at 03:45:25PM -0700, Niranjana Vishwanathapura wrote:
> > On Thu, Mar 31, 2022 at 10:28:48AM +0200, Daniel Vetter wrote:
> > > Adding a pile of people who've expressed interest in vm_bind for their
>
On Wed, Apr 20, 2022 at 03:45:25PM -0700, Niranjana Vishwanathapura wrote:
On Thu, Mar 31, 2022 at 10:28:48AM +0200, Daniel Vetter wrote:
Adding a pile of people who've expressed interest in vm_bind for their
drivers.
Also note to the intel folks: This is largely written with me having my
On Wed, Apr 20, 2022 at 03:50:00PM -0700, Niranjana Vishwanathapura wrote:
> On Thu, Mar 31, 2022 at 01:37:08PM +0200, Daniel Vetter wrote:
> > One thing I've forgotten, since it's only hinted at here: If/when we
> > switch tlb flushing from the current dumb implementation
> > we now have in i915
On Wed, Mar 09, 2022 at 10:58:09AM -0500, Alex Deucher wrote:
On Mon, Mar 7, 2022 at 3:30 PM Niranjana Vishwanathapura
wrote:
VM_BIND design document with description of intended use cases.
Signed-off-by: Niranjana Vishwanathapura
---
Documentation/gpu/rfc/i915_vm_bind.rst | 210
On Thu, Mar 31, 2022 at 01:37:08PM +0200, Daniel Vetter wrote:
One thing I've forgotten, since it's only hinted at here: If/when we
switch tlb flushing from the current dumb implementation
we now have in i915 in upstream to one with batching using dma_fence,
then I think that should be something
On Thu, Mar 31, 2022 at 10:28:48AM +0200, Daniel Vetter wrote:
Adding a pile of people who've expressed interest in vm_bind for their
drivers.
Also note to the intel folks: This is largely written with me having my
subsystem co-maintainer hat on, i.e. what I think is the right thing to do
here
One thing I've forgotten, since it's only hinted at here: If/when we
switch tlb flushing from the current dumb implementation
we now have in i915 in upstream to one with batching using dma_fence,
then I think that should be something which is done with a small
helper library of shared code too.
Adding a pile of people who've expressed interest in vm_bind for their
drivers.
Also note to the intel folks: This is largely written with me having my
subsystem co-maintainer hat on, i.e. what I think is the right thing to do
here for the subsystem at large. There is substantial rework involved
On Mon, Mar 7, 2022 at 3:30 PM Niranjana Vishwanathapura
wrote:
>
> VM_BIND design document with description of intended use cases.
>
> Signed-off-by: Niranjana Vishwanathapura
> ---
> Documentation/gpu/rfc/i915_vm_bind.rst | 210 +
> Documentation/gpu/rfc/index.rst
VM_BIND design document with description of intended use cases.
Signed-off-by: Niranjana Vishwanathapura
---
Documentation/gpu/rfc/i915_vm_bind.rst | 210 +
Documentation/gpu/rfc/index.rst| 4 +
2 files changed, 214 insertions(+)
create mode 100644
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