Add register definitions for GTFIFODBG, and clear it during init time to
make sure state is correct.
This register tells us if either a read, or a write occurred while the
fifo was full. It seems like bit 2 is an OR of bit 0 and bit 1, so we
check that as well, but the documents are not quite
If we don't have a sufficient number of free entries in the FIFO, we
proceed to do a write anyway. With this check we should have a clue if
that write actually failed or not.
After some discussion with Daniel Vetter regarding his original
complaint, we agreed upon this.
Signed-off-by: Ben
With the introduction of the PCH, we gained an LVDS presence pin but we
continued to use the existing logic that asserted that LVDS was only
supported on certain mobile chipsets. However, there are desktop
IronLake systems with LVDS attached which we fail to detect. So for PCH,
trust the LVDS
On Wed, Feb 8, 2012 at 18:53, Kenneth Graunke kenn...@whitecape.org wrote:
These fix many GPU hangs for Eugeni, though not on my machine for some
reason.
Oddly, the register writes to UCGCTL2 and SQ_CHICKEN_MBCUNIT_CONFIG stick,
but the writes to L3_CHICKEN_MODE, L3CNTLREG1, and
On Tue, Jan 31, 2012 at 08:34:15PM +, Chris Wilson wrote:
On Tue, 31 Jan 2012 21:08:14 +0100, Daniel Vetter daniel.vet...@ffwll.ch
wrote:
These are all user-trigerable, so tune down their loudness a notch.
For some of these we have i-g-t tests (because they prevent
newly-discovered
In particular, declare the hidden CPU mmaps to valgrind so that it knows
about those memory regions.
References: https://bugs.freedesktop.org/show_bug.cgi?id=35071
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
configure.ac |3 ++
intel/Makefile.am|1 +
Every access to either the GTT or CPU pointer is supposed to be
proceeded by a set_domain ioctl so that GEM is able to manage the cache
domains correctly and for the following access to be coherent. Of
course, some people explicitly want incoherent, non-blocking access
which is going to trigger
On Thu, Feb 09, 2012 at 10:43:11AM +, Chris Wilson wrote:
Every access to either the GTT or CPU pointer is supposed to be
proceeded by a set_domain ioctl so that GEM is able to manage the cache
domains correctly and for the following access to be coherent. Of
course, some people explicitly
On 02/09/2012 11:43 AM, Chris Wilson wrote:
In particular, declare the hidden CPU mmaps to valgrind so that it knows
about those memory regions.
References: https://bugs.freedesktop.org/show_bug.cgi?id=35071
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
Acked-by: Ben Widawsky
On Wed, Feb 01, 2012 at 10:23:05PM -0200, Eugeni Dodonov wrote:
On Wed, Feb 1, 2012 at 19:39, Chris Wilson ch...@chris-wilson.co.uk wrote:
On Wed, 1 Feb 2012 22:26:45 +0100, Daniel Vetter daniel.vet...@ffwll.ch
wrote:
Chris Wilson and me have again stared at funny error states and it's
Hi all,
I've rebased and updated my ppgtt patches. Only changes are somewhat improved
commit messages (especially for the final patch that actually enables ppgtt) and
an added module option in the last patch to please Chris.
Assuming nothing pops up I plan to merge this in 1-2 days.
Cheers,
We need this because ppgtt page directory entries need to be in the
global gtt pagetable.
Reviewed-by: Ben Widawsky b...@bwidawsk.net
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/char/agp/intel-gtt.c |1 +
include/drm/intel-gtt.h |2 ++
2 files changed, 3
This just adds the setup and teardown code for the ppgtt PDE and the
last-level pagetables, which are fixed for the entire lifetime, at
least for the moment.
v2: Kill the stray debug printk noted by and improve the pte
definitions as suggested by Chris Wilson.
v3: Clean up the aperture stealing
This adds support to bind/unbind objects and wires it up. Objects are
only put into the ppgtt when necessary, i.e. at execbuf time.
Objects are still unconditionally put into the global gtt.
v2: Kill the quick hack and explicitly pass cache_level to ppgtt_bind
like for the global gtt function.
This was pretty usefull for debugging, might be useful for diagnosing
issues.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
Reviewed-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_debugfs.c | 38 +++
1 files changed, 38 insertions(+), 0
On Thu, 9 Feb 2012 17:15:50 +0100, Daniel Vetter daniel.vet...@ffwll.ch
wrote:
v3: Pimp commit message and make Chris Wilson less grumpy by adding a
module option.
+void i915_gem_init_ppgtt(struct drm_device *dev)
+{
+ drm_i915_private_t *dev_priv = dev-dev_private;
+ uint32_t
On Thu, 9 Feb 2012 17:15:43 +0100, Daniel Vetter daniel.vet...@ffwll.ch
wrote:
Hi all,
I've rebased and updated my ppgtt patches. Only changes are somewhat improved
commit messages (especially for the final patch that actually enables ppgtt)
and
an added module option in the last patch
On Thu, 09 Feb 2012 09:13:35 -0800, Keith Packard kei...@keithp.com wrote:
#part sign=pgpmime
On Thu, 9 Feb 2012 09:35:53 +, Chris Wilson ch...@chris-wilson.co.uk
wrote:
With the introduction of the PCH, we gained an LVDS presence pin but we
continued to use the existing logic that
On Thu, Feb 9, 2012 at 14:39, Chris Wilson ch...@chris-wilson.co.uk wrote:
On Thu, 9 Feb 2012 17:15:50 +0100, Daniel Vetter daniel.vet...@ffwll.ch
wrote:
v3: Pimp commit message and make Chris Wilson less grumpy by adding a
module option.
+void i915_gem_init_ppgtt(struct drm_device
On Thu, Feb 9, 2012 at 14:15, Daniel Vetter daniel.vet...@ffwll.ch wrote:
Hi all,
I've rebased and updated my ppgtt patches. Only changes are somewhat
improved
commit messages (especially for the final patch that actually enables
ppgtt) and
an added module option in the last patch to
#part sign=pgpmime
On Thu, 09 Feb 2012 17:33:23 +, Chris Wilson ch...@chris-wilson.co.uk
wrote:
That code already existed in intel_lvds_init():
if (HAS_PCH_SPLIT(dev)) {
if (I915_READ(PCH_LVDS) LVDS_DETECTED) == 0)
return false
...
}
Tricky. Do we have any idea
This fixes the last false positive from libdrm for valgrind glxgears
for me.
---
I'm slightly nervous about removing memsets in favor of VG_CLEAR, in
case there are pad fields that might become important later. But the
only one I could think of that this ought to be the case for was
execbuf, and
We want to unconditionally enable ppgtt for two reasons:
- Windows uses this on snb and later.
- We need the basic hw support to work before we can think about real
per-process address spaces and other cool features we want.
But Chris Wilson was complaining all over irc and intel-gfx that this
On Thu, Feb 09, 2012 at 04:21:31PM -0200, Eugeni Dodonov wrote:
On Thu, Feb 9, 2012 at 14:15, Daniel Vetter daniel.vet...@ffwll.ch wrote:
Hi all,
I've rebased and updated my ppgtt patches. Only changes are somewhat
improved
commit messages (especially for the final patch that actually
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