[Intel-gfx] [PATCH] scripts/kernel-doc: Processing -nofunc for functions only

Docproc process EXPORT_SYMBOL(f1) macro and uses -nofunc f1 to avoid duplicated documentation in the next call. It works for most of the cases, but there are some specific situations where a struct has the same name of an already-exported function. Current kernel-doc behavior ignores those

Re: [Intel-gfx] [PATCH] scripts/kernel-doc: Improve Markdown results

On 08/21/2015 04:39 PM, Danilo Cesar Lemes de Paula wrote: > Using pandoc as the Markdown engine cause some minor side effects as > pandoc includes main tags for almost everything. > Original Markdown support approach removes those main tags, but it caused > some inconsistencies when that tag is

Re: [Intel-gfx] [PATCH 4/5] Documentation: drm: Convert KMS Properties HTML table to CALS

On 08/25/2015 01:10 PM, Graham Whaley wrote: > On Tue, 2015-08-25 at 16:29 +0200, Daniel Vetter wrote: >> On Tue, Aug 25, 2015 at 10:26:44AM +0100, Graham Whaley wrote: >>> The KMS Properties table is in HTML format, which is not supported >>> for building pdfdocs, resulting in the following types

Re: [Intel-gfx] [PATCH] drm/i915: Check DP link status on long hpd too

On 8/20/2015 10:07 PM, ville.syrj...@linux.intel.com wrote: From: Ville Syrjälä We are no longer checkling the DP link status on long hpd. We used to do that from the .hot_plug() handler, but it was removed when MST got introduced. If there's no userspace we

Re: [Intel-gfx] [PATCH] drm/i915: Check DP link status on long hpd too

On Tue, Sep 01, 2015 at 11:36:25PM +0530, Sivakumar Thulasimani wrote: > > > On 8/20/2015 10:07 PM, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > We are no longer checkling the DP link status on long hpd. We used to do > > that from the

Re: [Intel-gfx] Request Linux Graphic Driver for Intel GMA 3150

On Sat, 22 Aug 2015, David Ho wrote: > REQUEST > > May I please request support for driver of Intel GMA 3150 for Ubuntu 14.04.3 > 32 bit (Trusty Tahr)? > > I installed "Intel Graphic Installer for Linux" from 01.org, but it stops at > the very first step saying

Re: [Intel-gfx] [PATCH v2 12/22] drm/i915: Preserve SSC earlier

On Mon, 31 Aug 2015, Jesse Barnes wrote: > On 07/15/2015 04:57 AM, Lukas Wunner wrote: >> Commit 92122789b2d6 ("drm/i915: preserve SSC if previously set v3") >> added code to intel_modeset_gem_init to override the SSC status read >> from VBT with the SSC status set by

Re: [Intel-gfx] [PATCH v2 00/22] Enable gpu switching on the MacBook Pro

On Mon, 31 Aug 2015, Jani Nikula wrote: > On Sat, 29 Aug 2015, Lukas Wunner wrote: >> Hi Daniel, Hi Jani, >> >> the patch set I've posted August 12 included 3 commits which fix bugs >> in i915. These bugs should be fixed independently of MacBook Pro

Re: [Intel-gfx] [PATCH] drm/atomic: Fix bookkeeping with TEST_ONLY, v3.

Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang...@intel.com) Task id: 7289 -Summary- Platform Delta drm-intel-nightly Series Applied ILK -2

[Intel-gfx] [PATCH 1/4] drm: Add a non-locking version of drm_kms_helper_poll_enable().

drm_kms_helper_poll_enable() was converted to lock the mode_config mutex in commit 8c4ccc4ab6f64e859d4ff8d7c02c2ed2e956e07f ("drm/probe-helper: Grab mode_config.mutex in poll_init/enable"). This disregarded the cases where this function is called from a context where this mutex is already locked.

[Intel-gfx] [PATCH 0/4] Fix numerous issues with HPDstorm handling

The following 4 patches fix issues with the HPD storm detection. Two of them have been introduced quite recently, one has been around since this code was implemented. Work arounds like: commit 3ff04a160a891e56cdcee5c198d4c764d1c8c78b ("drm/i915: Don't WARN nor handle unexpected hpd interrupts on

[Intel-gfx] [PATCH 3/4] drm/i915: Use the correct hpd_status list for non-G4xx/VLV

This copy-and-past error was introduced in: commit fd63e2a972c670887e5e8a08440111d3812c0996 Author: Imre Deak Date: Tue Jul 21 15:32:44 2015 -0700 drm/i915: combine i9xx_get_hpd_pins and pch_get_hpd_pins Signed-off-by: Egbert Eich ---

[Intel-gfx] [PATCH 2/4] drm/i915: Call non-locking version of drm_kms_helper_poll_enable()

drm_kms_helper_poll_enable() is called from a context in intel_hpd_irq_storm_disable() where the the mode_config mutex is already locked. When this function was converted to lock this mutex in: commit 8c4ccc4ab6f64e859d4ff8d7c02c2ed2e956e07f Author: Daniel Vetter Date:

[Intel-gfx] [PATCH 4/4] drm/i915: Avoid race of intel_crt_detect_hotplug() with HPD interrupt

A HPD interrupt may fire during intel_crt_detect_hotplug() - especially when HPD interrupt storms occur. Since the interrupt handler changes the enabled interrupt lines when it detects a storm this races with intel_crt_detect_hotplug(). To avoid this, shiled the rmw cycles with IRQ save spinlocks.

Re: [Intel-gfx] [PATCH 1/4] drm: Add a non-locking version of drm_kms_helper_poll_enable().

Hi Egbert, On Tue, Sep 01, 2015 at 10:21:32PM +0200, Egbert Eich wrote: > drm_kms_helper_poll_enable() was converted to lock the mode_config > mutex in commit 8c4ccc4ab6f64e859d4ff8d7c02c2ed2e956e07f > ("drm/probe-helper: Grab mode_config.mutex in poll_init/enable"). > > This disregarded the

Re: [Intel-gfx] [PATCH 1/4] drm: Add a non-locking version of drm_kms_helper_poll_enable().

Lukas Wunner writes: > > It seems DRM convention is to append _locked or _unlocked, e.g.: > drm_fb_helper_restore_fbdev_mode_unlocked > drm_gem_object_unreference_unlocked > Oh, I missed that. Did you check what these functions actually do - and compare it to what I try to achieve?

Re: [Intel-gfx] [PATCH 1/4] drm: Add a non-locking version of drm_kms_helper_poll_enable().

Lukas Wunner writes: > Hi Egbert, > > On Tue, Sep 01, 2015 at 10:21:32PM +0200, Egbert Eich wrote: > > drm_kms_helper_poll_enable() was converted to lock the mode_config > > mutex in commit 8c4ccc4ab6f64e859d4ff8d7c02c2ed2e956e07f > > ("drm/probe-helper: Grab mode_config.mutex in

Re: [Intel-gfx] [PATCH 1/4] drm: Add a non-locking version of drm_kms_helper_poll_enable().

Hi Egbert, On Wed, Sep 02, 2015 at 12:10:19AM +0200, Egbert Eich wrote: > Lukas Wunner writes: > > On Tue, Sep 01, 2015 at 10:21:32PM +0200, Egbert Eich wrote: > > > drm_kms_helper_poll_enable() was converted to lock the mode_config > > > mutex in commit

Re: [Intel-gfx] [PATCH v2 2/3] drm/i915/dp: use the drm dp helper for determining sink tps3 support

On Thu, Aug 27, 2015 at 01:25:37PM +0300, Jani Nikula wrote: > No functional changes. > > Signed-off-by: Jani Nikula Merged the first 2 patches to dinq (rebased on top of the drm dp helper as the series originally did). But can't merge more since this depends upon the tp3

Re: [Intel-gfx] drm/i915: Postpone plane readout until after encoder readout, v2.

On Thu, Aug 27, 2015 at 01:05:12PM +0200, Maarten Lankhorst wrote: > Hey, > > Op 26-08-15 om 16:43 schreef Daniel Vetter: > > On Wed, Aug 05, 2015 at 12:45:48PM +0200, Maarten Lankhorst wrote: > >> From: Patrik Jakobsson > >> > >> When reading out hw state for

[Intel-gfx] [PATCH v3] drm/i915/gtt: Avoid calling kcalloc in a loop when allocating temp bitmaps

On each call to gen8_alloc_va_range_3lvl we're allocating temporary bitmaps needed for error handling. Unfortunately, when we increase address space size (48b ppgtt) we do additional (512 - 4) calls to kcalloc, increasing latency between exec and actual start of execution on the GPU. Let's just do

Re: [Intel-gfx] [PATCH 02/16] drm/i915: fix the FBC work allocation failure path

On Fri, Aug 28, 2015 at 11:50:08AM -0300, Paulo Zanoni wrote: > 2015-08-28 11:20 GMT-03:00 Ville Syrjälä : > > On Fri, Aug 14, 2015 at 06:34:07PM -0300, Paulo Zanoni wrote: > >> Always update the currrent crtc, fb and vertical offset after calling > >> enable_fbc. We

[Intel-gfx] [PATCH 2/2] drm/i915: Move intel_crtc_disable_noatomic to intel_sanitize_crtc.

To make it clear it is only called from that function. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/intel_display.c | 54 ++-- 1 file changed, 27 insertions(+), 27 deletions(-) diff --git

[Intel-gfx] [PATCH 1/2] drm/i915: Fix intel_crtc_disable_noatomic disabling.

plane_mask is not accurate during hw readout, use 1 << drm_plane_index(primary) instead. wait_for_pending_flips should be a noop now. This function is now only called during init or resume sanitization. In both cases there are no pending flips from the driver. Signed-off-by: Maarten Lankhorst

Re: [Intel-gfx] [PATCH 2/4] drm/i915: read sink_count dpcd always

On Thu, 27 Aug 2015, Sivakumar Thulasimani wrote: > From: "Thulasimani,Sivakumar" > > This patch reads sink_count dpcd always and removes its > read operation based on values in downstream port dpcd. > > SINK_COUNT dpcd is not

Re: [Intel-gfx] [PATCH 4/4] fbdev: Debug knob to register without holding console_lock

On 25/08/15 22:24, Rob Clark wrote: > On Tue, Aug 25, 2015 at 9:45 AM, Daniel Vetter wrote: >> When the usual fbcon legacy options are enabled we have >> ->register_framebuffer >> ->fb notifier chain calls into fbcon >> ->fbcon sets up console on new fbi >>

Re: [Intel-gfx] [PATCH 15/15] drm/i915: Add CHV PHY LDO power sanity checks

On Thu, Aug 27, 2015 at 10:09:37AM +0530, Deepak wrote: > > > On 07/09/2015 02:16 AM, ville.syrj...@linux.intel.com wrote: > >From: Ville Syrjälä > > > >At various points when changing the DPIO lane/phy power states, > >construct an expected value of the

Re: [Intel-gfx] [PATCH 3/2] drm/i915: Factor out intel_crtc_has_encoders()

On Thu, Aug 27, 2015 at 10:29:13AM +0300, Jani Nikula wrote: > On Wed, 26 Aug 2015, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > Make the code mode readable by pulling the "does this crtc have any > > encoders?" deduction into a separate

Re: [Intel-gfx] [PATCH 3/4] drm/i915: Save sink_count for tracking changes to it

On Thu, 27 Aug 2015, Sivakumar Thulasimani wrote: > From: "Thulasimani,Sivakumar" > > sink count can change between short pulse hpd hence this patch > adds a member variable to intel_dp so we can track any changes > between short

Re: [Intel-gfx] [PATCH 2/2] drm/i915/skl+: Enable pipe CSC on cursor planes.

Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang...@intel.com) Task id: 7280 -Summary- Platform Delta drm-intel-nightly Series Applied ILK -1

Re: [Intel-gfx] [PATCH] i915: Set ddi_pll_sel in DP MST path

On Mon, 31 Aug 2015, Ville Syrjälä wrote: > On Mon, Aug 31, 2015 at 11:23:28AM +0300, Ander Conselvan de Oliveira wrote: >> The DP MST encoder config function never sets ddi_pll_sel, even though >> its value is programmed in its ->pre_enable() hook. That used to

Re: [Intel-gfx] [PATCH v2] drm/i915/gtt: Avoid calling kcalloc in a loop when allocating temp bitmaps

On Mon, Aug 31, 2015 at 07:42:34PM +0100, Chris Wilson wrote: > On Mon, Aug 31, 2015 at 06:59:40PM +0200, Michał Winiarski wrote: > > On each call to gen8_alloc_va_range_3lvl we're allocating temporary > > bitmaps needed for error handling. Unfortunately, when we increase > > address space size

Re: [Intel-gfx] [PATCH] drm/atomic: Fix bookkeeping with TEST_ONLY, v3.

On Mon, 31 Aug 2015, Maarten Lankhorst wrote: > Commit ec9f932ed41622d120de52a5b525e4d77b9ef17e > "drm/atomic: Cleanup on error properly in the atomic ioctl." > cleaned up some error paths, but didn't fix the TEST_ONLY path. > In the check only case plane->fb

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Fix command parser to validate multiple register access with the same command.

On Mon, Aug 31, 2015 at 01:19:47AM +0300, Francisco Jerez wrote: > Francisco Jerez writes: > > > Daniel Vetter writes: > > > >> On Mon, Jun 15, 2015 at 02:26:22PM +0300, Ville Syrjälä wrote: > >>> On Mon, Jun 15, 2015 at 02:18:01PM +0300, Francisco Jerez

Re: [Intel-gfx] [PATCH] drm/i915: Fix module initialisation, v2.

On Mon, Aug 31, 2015 at 03:13:41PM -0700, Matt Roper wrote: > On Thu, Aug 27, 2015 at 03:15:15PM +0200, Maarten Lankhorst wrote: > > Set DRIVER_MODESET and DRIVER_ATOMIC by default. The driver is fully atomic. > > Remove the legacy suspend/resume, to fix a warning introduced by: > > > > "drm:

Re: [Intel-gfx] [PATCH 1/4] drm/i915: read dpcd 0 - 12 & link_status always

On Thu, 27 Aug 2015, Sivakumar Thulasimani wrote: > From: "Thulasimani,Sivakumar" > > Compliance requires the driver to read dpcd register 0 to 12 and > registers 0x200 to 0x205 to be read always. > Current code performs dpcd

Re: [Intel-gfx] [PATCH 4/4] drm/i915: force full detect on sink count change

On Thu, 27 Aug 2015, Sivakumar Thulasimani wrote: > From: "Thulasimani,Sivakumar" > > This patch checks for changes in sink count between short pulse > hpds and forces full detect when there is a change. > > This will allow both

[Intel-gfx] [PATCH v2 2/2] drm/i915: Also record time difference if vblank evasion fails, v2.

This makes the error message slightly more useful. Changes since v1: - Use ktime_get() while irqs are still disabled. (vsyrjala) Signed-off-by: Maarten Lankhorst Reviewed-by: Ville Syrjälä --- diff --git

Re: [Intel-gfx] [PATCH 4/4] drm/i915: force full detect on sink count change

On 9/1/2015 4:12 PM, Jani Nikula wrote: On Thu, 27 Aug 2015, Sivakumar Thulasimani wrote: From: "Thulasimani,Sivakumar" This patch checks for changes in sink count between short pulse hpds and forces full detect when there

Re: [Intel-gfx] [PATCH 2/4] drm/i915: read sink_count dpcd always

On 9/1/2015 3:59 PM, Jani Nikula wrote: On Thu, 27 Aug 2015, Sivakumar Thulasimani wrote: From: "Thulasimani,Sivakumar" This patch reads sink_count dpcd always and removes its read operation based on values in downstream

Re: [Intel-gfx] [PATCH 4/4] drm/i915: force full detect on sink count change

On Tue, 01 Sep 2015, Sivakumar Thulasimani wrote: > On 9/1/2015 4:12 PM, Jani Nikula wrote: >> On Thu, 27 Aug 2015, Sivakumar Thulasimani >> wrote: >>> From: "Thulasimani,Sivakumar" >>> >>> This

Re: [Intel-gfx] [PATCH 02/16] drm/i915: fix the FBC work allocation failure path

On Tue, Sep 01, 2015 at 12:07:01PM +0200, Daniel Vetter wrote: > On Fri, Aug 28, 2015 at 11:50:08AM -0300, Paulo Zanoni wrote: > > 2015-08-28 11:20 GMT-03:00 Ville Syrjälä : > > > On Fri, Aug 14, 2015 at 06:34:07PM -0300, Paulo Zanoni wrote: > > >> Always update the

Re: [Intel-gfx] [PATCH] drm/i915: Fix module initialisation, v2.

Op 01-09-15 om 12:12 schreef Daniel Vetter: > On Mon, Aug 31, 2015 at 03:13:41PM -0700, Matt Roper wrote: >> On Thu, Aug 27, 2015 at 03:15:15PM +0200, Maarten Lankhorst wrote: >>> Set DRIVER_MODESET and DRIVER_ATOMIC by default. The driver is fully atomic. >>> Remove the legacy suspend/resume, to

Re: [Intel-gfx] [PATCH 1/4] drm: Add a non-locking version of drm_kms_helper_poll_enable().

Lukas Wunner writes: > Hi Egbert, > > On Wed, Sep 02, 2015 at 12:10:19AM +0200, Egbert Eich wrote: > > Lukas Wunner writes: > > > On Tue, Sep 01, 2015 at 10:21:32PM +0200, Egbert Eich wrote: > > > > drm_kms_helper_poll_enable() was converted to lock the mode_config > > > > mutex in

Re: [Intel-gfx] [RFC 1/3] drm/i915: Roll intel_crtc->atomic into intel_crtc_state

Op 01-09-15 om 17:48 schreef Ville Syrjälä: > On Tue, Sep 01, 2015 at 08:30:05AM -0700, Matt Roper wrote: >> On Tue, Sep 01, 2015 at 07:24:19AM +0200, Maarten Lankhorst wrote: >>> Op 29-08-15 om 01:57 schreef Matt Roper: Way back at the beginning of i915's atomic conversion I added

Re: [Intel-gfx] [PATCH 4/4] fbdev: Debug knob to register without holding console_lock

On Tue, Sep 1, 2015 at 6:32 AM, Tomi Valkeinen wrote: > > > On 25/08/15 22:24, Rob Clark wrote: >> On Tue, Aug 25, 2015 at 9:45 AM, Daniel Vetter >> wrote: >>> When the usual fbcon legacy options are enabled we have >>> ->register_framebuffer >>>

Re: [Intel-gfx] [PATCH 4/4] fbdev: Debug knob to register without holding console_lock

On Tue, Sep 1, 2015 at 10:41 AM, Tomi Valkeinen wrote: > > > On 01/09/15 17:34, Rob Clark wrote: >> On Tue, Sep 1, 2015 at 6:32 AM, Tomi Valkeinen wrote: >>> >>> >>> On 25/08/15 22:24, Rob Clark wrote: On Tue, Aug 25, 2015 at 9:45 AM, Daniel

Re: [Intel-gfx] [PATCH 4/4] fbdev: Debug knob to register without holding console_lock

On 01/09/15 17:34, Rob Clark wrote: > On Tue, Sep 1, 2015 at 6:32 AM, Tomi Valkeinen wrote: >> >> >> On 25/08/15 22:24, Rob Clark wrote: >>> On Tue, Aug 25, 2015 at 9:45 AM, Daniel Vetter >>> wrote: When the usual fbcon legacy options are

Re: [Intel-gfx] [PATCH 2/4] drm/i915: read sink_count dpcd always

On 9/1/2015 6:45 PM, Jani Nikula wrote: On Tue, 01 Sep 2015, Sivakumar Thulasimani wrote: On 9/1/2015 3:59 PM, Jani Nikula wrote: On Thu, 27 Aug 2015, Sivakumar Thulasimani wrote: From: "Thulasimani,Sivakumar"

[Intel-gfx] [BXT MIPI PATCH v3 05/14] drm/i915/bxt: DSI encoder support in CRTC modeset

From: Shashank Sharma SKL and BXT qualifies the HAS_DDI() check, and hence haswell modeset functions are re-used for modeset sequence. But DDI interface doesn't include support for DSI. This patch adds: 1. cases for DSI encoder, in those modeset functions and allows

[Intel-gfx] [BXT MIPI PATCH v3 04/14] drm/i915/bxt: DSI prepare changes for BXT

From: Shashank Sharma This patch modifies dsi_prepare() function to support the same modeset prepare sequence for BXT also. Main changes are: 1. BXT port control register is different than VLV. 2. BXT modeset sequence needs vdisplay and hdisplay programmed for

[Intel-gfx] [BXT MIPI PATCH v3 08/14] drm/i915/bxt: DSI disable and post-disable

From: Shashank Sharma This patch contains changes to support DSI disble sequence in BXT. The changes are: 1. BXT specific changes in clear_device_ready function. 2. BXT specific changes in DSI disable and post-disable functions. 3. Add a new function to reset BXT Dphy

[Intel-gfx] [BXT MIPI PATCH v3 11/14] drm/i915/bxt: Modify BXT BLC according to VBT changes

From: Sunil Kamath Latest VBT mentions which set of registers will be used for BLC, as controller number field. Making use of this field in BXT BLC implementation. Also, the registers are used in case control pin indicates display DDI. Adding a check for this. According

[Intel-gfx] [BXT MIPI PATCH v3 12/14] drm/i915/bxt: Program Backlight PWM frequency

In some cases, BIOS doesn't initializes DSI panel.DSI and backlight registers are thereby not initialized. Programming the same in driver backlight setup. Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/i915_reg.h|3 +++ drivers/gpu/drm/i915/intel_panel.c |

[Intel-gfx] [BXT MIPI PATCH v3 10/14] drm/i915/bxt: get DSI pixelclock

From: Shashank Sharma BXT's DSI PLL is different from that of VLV. So this patch adds a new function to get the current DSI pixel clock based on the PLL divider ratio and lane count. This function is required for intel_dsi_get_config() function. v2: Fixed Jani's

[Intel-gfx] [BXT MIPI PATCH v3 13/14] drm/i915/bxt: Remove DSP CLK_GATE programming for BXT

DSP CLK_GATE registers are specific to BYT and CHT. Avoid programming the same for BXT platform. v2: Rebased on latest drm nightly branch. v3: Fixed Jani's review comments Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/intel_dsi.c |8 +--- 1 file changed, 5

[Intel-gfx] [BXT MIPI PATCH v3 02/14] drm/i915/bxt: Enable BXT DSI PLL

From: Shashank Sharma This patch adds new functions for BXT clock and PLL programming. They are: 1. configure_dsi_pll for BXT. This function does the basic math and generates the divider ratio based on requested pixclock, and program clock registers. 2.

[Intel-gfx] [BXT MIPI PATCH v3 14/14] drm/i915: Added BXT DSI backlight support

DSI backlight support for bxt is added. TODO: There is no support for backlight control in drm panel framework. This will be added as part of VBT version patches fixing the backlight sequence. v2: Fixed Jani's review comments from previous patch. Added the BXT DSI backlight code

[Intel-gfx] [BXT MIPI PATCH v3 09/14] drm/i915/bxt: get_hw_state for BXT

From: Shashank Sharma Pick appropriate port control register (BXT or VLV), based on device. Get the current hw state wrt Mipi port. v2: Rebased on latest drm nightly branch. v3: Removed the GET_DSI_PORT_CTRL Macro for consistency with earlier implementations as

[Intel-gfx] [BXT MIPI PATCH v3 07/14] drm/i915/bxt: Program Tx Rx and Dphy clocks

From: Shashank Sharma BXT DSI clocks are different than previous platforms. So adding a new function to program following clocks and dividers: 1. Program variable divider to generate input to Tx clock divider (Output value must be < 39.5Mhz) 2. Select divide by 2

[Intel-gfx] [BXT MIPI PATCH v3 06/14] drm/i915/bxt: DSI enable for BXT

From: Shashank Sharma This patch contains following changes: 1. MIPI device ready changes to support dsi_pre_enable. Changes are specific to BXT device ready sequence. Added check for ULPS mode(No effects on VLV). 2. Changes in dsi_enable to pick BXT port control

[Intel-gfx] [BXT MIPI PATCH v3 01/14] drm/i915/bxt: Initialize MIPI for BXT

From: Shashank Sharma This patch contains following changes: 1. Add BXT MIPI display address base. 2. Call dsi_init from display_setup function. v2: Rebased on latest nightly branch Signed-off-by: Shashank Sharma Signed-off-by: Uma Shankar

[Intel-gfx] [BXT MIPI PATCH v3 00/14] MIPI DSI Support for BXT

This patch series adds support for MIPI DSI for BXT platform. Support for VBT v3 sequence parsing and programming is needed for panel, backlight enable and control. The same will be added as part of a different patch series. This is already floated and is under review. Below is the link for

[Intel-gfx] [BXT MIPI PATCH v3 03/14] drm/i915/bxt: Disable DSI PLL for BXT

From: Shashank Sharma This patch adds two new functions: - disable_dsi_pll. BXT DSI disable sequence and registers are different from previous platforms. - intel_disable_dsi_pll wrapper function to re-use the same code for multiple platforms. It checks platform

Re: [Intel-gfx] [PATCH 2/4] drm/i915: read sink_count dpcd always

On Tue, 01 Sep 2015, Sivakumar Thulasimani wrote: > On 9/1/2015 3:59 PM, Jani Nikula wrote: >> On Thu, 27 Aug 2015, Sivakumar Thulasimani >> wrote: >>> From: "Thulasimani,Sivakumar" >>> >>> This

Re: [Intel-gfx] [RFC 1/3] drm/i915: Roll intel_crtc->atomic into intel_crtc_state

On Tue, Sep 01, 2015 at 08:30:05AM -0700, Matt Roper wrote: > On Tue, Sep 01, 2015 at 07:24:19AM +0200, Maarten Lankhorst wrote: > > Op 29-08-15 om 01:57 schreef Matt Roper: > > > Way back at the beginning of i915's atomic conversion I added > > > intel_crtc->atomic as a temporary dumping ground

Re: [Intel-gfx] Request Linux Graphic Driver for Intel GMA 3150

On Tue, 2015-09-01 at 09:59 +0300, Jani Nikula wrote: > On Sat, 22 Aug 2015, David Ho wrote: > > REQUEST > > > > May I please request support for driver of Intel GMA 3150 for > > Ubuntu 14.04.3 > > 32 bit (Trusty Tahr)? > > > > I installed "Intel Graphic Installer for

Re: [Intel-gfx] [PATCH 4/4] fbdev: Debug knob to register without holding console_lock

On Tue, Sep 01, 2015 at 11:12:11AM -0400, Rob Clark wrote: > On Tue, Sep 1, 2015 at 10:41 AM, Tomi Valkeinen wrote: > > > > > > On 01/09/15 17:34, Rob Clark wrote: > >> On Tue, Sep 1, 2015 at 6:32 AM, Tomi Valkeinen > >> wrote: > >>> > >>> > >>> On

Re: [Intel-gfx] [RFC 1/3] drm/i915: Roll intel_crtc->atomic into intel_crtc_state

On Tue, Sep 01, 2015 at 07:24:19AM +0200, Maarten Lankhorst wrote: > Op 29-08-15 om 01:57 schreef Matt Roper: > > Way back at the beginning of i915's atomic conversion I added > > intel_crtc->atomic as a temporary dumping ground for "stuff to do > > outside vblank evasion" flags since CRTC states

Re: [Intel-gfx] [PATCH] drm/i915: Clear PIPE.STAT before IIR on VLV/CHV

On pe, 2015-08-14 at 18:24 +0100, Chris Wilson wrote: > The PIPE.STAT register contains some interrupt status bits per pipe, and > if assert cause the corresponding bit in the IIR to be asserted (thus > raising an interrupt). When handling an interrupt, we should clear the > PIPE.STAT generator