Re: [Intel-gfx] [PATCH v2] drm/i915: Enable GSE interrupt on BDW+

On Mon, 23 May 2016, Mark Kettenis wrote: >> From: Jani Nikula >> Date: Mon, 23 May 2016 17:04:48 +0300 >> >> On Thu, 19 May 2016, ville.syrj...@linux.intel.com wrote: >> > From: Ville Syrjälä >> > >> > We've

Re: [Intel-gfx] [PATCH v2] drm/i915: Enable GSE interrupt on BDW+

On Mon, May 23, 2016 at 05:44:28PM +0300, Jani Nikula wrote: > On Mon, 23 May 2016, Mark Kettenis wrote: > >> From: Jani Nikula > >> Date: Mon, 23 May 2016 17:04:48 +0300 > >> > >> On Thu, 19 May 2016, ville.syrj...@linux.intel.com wrote: >

[Intel-gfx] ✓ Ro.CI.BAT: success for series starting with [1/2] drm/i915/opregion: Convert to using native drm_i915_private

== Series Details == Series: series starting with [1/2] drm/i915/opregion: Convert to using native drm_i915_private URL : https://patchwork.freedesktop.org/series/7571/ State : success == Summary == Series 7571v1 Series without cover letter

[Intel-gfx] [PATCH 1/3] drm/i915: Never fully mask the the EI up rps interrupt on SNB/IVB

From: Ville Syrjälä SNB (and IVB too I suppose) starts to misbehave if the GPU gets stuck in an infinite batch buffer loop. The GPU apparently hogs something critical and CPUs start to lose interrupts and whatnot. We can keep the system limping along by unmasking

Re: [Intel-gfx] *ERROR* Hangcheck timer elapsed... render ring idle

On Mon, 2016-05-23 at 11:06 +0300, Jani Nikula wrote: > On Fri, 20 May 2016, Chris wrote: > > I'm still seeing this periodically, previous to today it happened on > > April 24th. Doesn't matter what I'm doing the video will freeze however > > the cursor will still move.

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Never fully mask the the EI up rps interrupt on SNB/IVB

On Mon, May 23, 2016 at 03:30:04PM +0100, Chris Wilson wrote: > On Mon, May 23, 2016 at 05:09:41PM +0300, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > SNB (and IVB too I suppose) starts to misbehave if the GPU gets stuck > > in an infinite

Re: [Intel-gfx] [PATCH 2/2] drm/i915/opregion: Rename init/fini functions to register/unregister

On Mon, 23 May 2016, Chris Wilson wrote: > Current intel_opregion_init is called during the driver registration > phase and intel_opregion_fini from the unregistration phase. Rename the > functions show that this is clear from their names. The phases tell us > what we

[Intel-gfx] [PATCH v2 1/3] drm/i915: Never fully mask the the EI up rps interrupt on SNB/IVB

From: Ville Syrjälä SNB (and IVB too I suppose) starts to misbehave if the GPU gets stuck in an infinite batch buffer loop. The GPU apparently hogs something critical and CPUs start to lose interrupts and whatnot. We can keep the system limping along by unmasking

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Bump pin_count to UINT_MAX.

Op 23-05-16 om 16:25 schreef Chris Wilson: > On Mon, May 23, 2016 at 03:37:41PM +0200, Maarten Lankhorst wrote: >> With nonblocking unpin there can be many cursor pins before they're >> cleared by the next page flip. >> >> Fix this by extending pin_count to the full 32-bit to prevent a >>

[Intel-gfx] ✗ Ro.CI.BAT: failure for drm/i915: Wait for flips to complete before returning.

== Series Details == Series: drm/i915: Wait for flips to complete before returning. URL : https://patchwork.freedesktop.org/series/7569/ State : failure == Summary == Series 7569v1 drm/i915: Wait for flips to complete before returning.

[Intel-gfx] [PATCH 3/2] Revert "drm/i915: Allow nonblocking update of pageflips."

This reverts commit d55dbd06bb5e1399aba9ab5227465339d1bbefff. It lacks a description, removes the flip trace point, doesn't handle -EBUSY if a flip is already queued and needs to be redone. Signed-off-by: Maarten Lankhorst Cc: Ville Syrjälä

Re: [Intel-gfx] [RFC][PATCH 3/3] drm/i915: Make RPS enable immediate

On Mon, May 23, 2016 at 05:09:43PM +0300, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > On SNB (at least) it's dangeruopus to hang the GPU with an infinite > batch buffer loop while RPS is disabled. The only thing that keeps > the system going in

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Bump pin_count to UINT_MAX.

On Mon, May 23, 2016 at 05:09:05PM +0200, Maarten Lankhorst wrote: > Op 23-05-16 om 16:25 schreef Chris Wilson: > > On Mon, May 23, 2016 at 03:37:41PM +0200, Maarten Lankhorst wrote: > >> With nonblocking unpin there can be many cursor pins before they're > >> cleared by the next page flip. > >> >

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Bump pin_count to UINT_MAX.

Op 23-05-16 om 17:43 schreef Chris Wilson: > On Mon, May 23, 2016 at 05:09:05PM +0200, Maarten Lankhorst wrote: >> Op 23-05-16 om 16:25 schreef Chris Wilson: >>> On Mon, May 23, 2016 at 03:37:41PM +0200, Maarten Lankhorst wrote: With nonblocking unpin there can be many cursor pins before

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Bump pin_count to UINT_MAX.

On Mon, May 23, 2016 at 03:37:41PM +0200, Maarten Lankhorst wrote: > With nonblocking unpin there can be many cursor pins before they're > cleared by the next page flip. > > Fix this by extending pin_count to the full 32-bit to prevent a > WARN_ON(vma->pin_count ==

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Don't frob with RPS around GPU reset

On Mon, May 23, 2016 at 05:09:42PM +0300, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > Based on my observations GPU reset doesn't clobber the RPS state, so > frobbing with RPS around GPU reset seems rather pointless. Just get > rid of it. > >

Re: [Intel-gfx] Building GVT-g as a sub-module of i915

Thanks Daniel and Joonas. : p See my replies below. > -Original Message- > From: daniel.vet...@ffwll.ch [mailto:daniel.vet...@ffwll.ch] On Behalf Of > Daniel Vetter > Sent: Monday, May 23, 2016 5:18 PM > To: Joonas Lahtinen > Cc: Wang, Zhi A

[Intel-gfx] ✗ Ro.CI.BAT: warning for drm/i915: Wait for flips to complete before returning.

== Series Details == Series: drm/i915: Wait for flips to complete before returning. URL : https://patchwork.freedesktop.org/series/7569/ State : warning == Summary == Series 7569v1 drm/i915: Wait for flips to complete before returning.

[Intel-gfx] [PATCH] drm/i915/guc: Disable automatic GuC firmware loading

From: Tvrtko Ursulin New GuC code is logging errors at runtime suspend and resume which causes CI testing to log "orange" status. Default to not trying to load the firmware until this is resolved. Example of the log: [drm] RC6 on [drm:intel_runtime_suspend]

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Never fully mask the the EI up rps interrupt on SNB/IVB

On Mon, May 23, 2016 at 05:09:41PM +0300, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > SNB (and IVB too I suppose) starts to misbehave if the GPU gets stuck > in an infinite batch buffer loop. The GPU apparently hogs something > critical and CPUs

[Intel-gfx] [RFC][PATCH 3/3] drm/i915: Make RPS enable immediate

From: Ville Syrjälä On SNB (at least) it's dangeruopus to hang the GPU with an infinite batch buffer loop while RPS is disabled. The only thing that keeps the system going in such circumstances are the internal RPS timers, so we should never feed the GPU with RPS

[Intel-gfx] ✗ Ro.CI.BAT: failure for series starting with [v2,01/11] drm/i915: Rename struct intel_context (rev2)

== Series Details == Series: series starting with [v2,01/11] drm/i915: Rename struct intel_context (rev2) URL : https://patchwork.freedesktop.org/series/7564/ State : failure == Summary == Series 7564v2 Series without cover letter

Re: [Intel-gfx] [PATCH 1/2] drm/i915/opregion: Convert to using native drm_i915_private

On Mon, 23 May 2016, Chris Wilson wrote: > Prefer passing struct drm_i915_private to internal interfaces as this > saves us having to dance between drm_device and our native struct. The > savings hare are small (only 70 bytes of unrequired dancing), but > progressive! >

Re: [Intel-gfx] [PATCH v2] drm/i915: Enable GSE interrupt on BDW+

> From: Jani Nikula > Date: Mon, 23 May 2016 17:04:48 +0300 > > On Thu, 19 May 2016, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > We've never actually enabled or unmasked the GSE interrupt on BDW+, > > even

Re: [Intel-gfx] Building GVT-g as a sub-module of i915

On ma, 2016-05-23 at 07:03 +, Wang, Zhi A wrote: > Hi Guys: >   I'm trying to make GVT-g as a sub-module of i915 in the next > version patchset. The basic idea is to introduce a "gvt-g pre-enabled > state" in i915. I think it should be a kernel option. > Could not the GGTT partitioning be

Re: [Intel-gfx] [PATCH 2/2] drm/i915/opregion: Rename init/fini functions to register/unregister

On Mon, May 23, 2016 at 05:42:49PM +0300, Jani Nikula wrote: > On Mon, 23 May 2016, Chris Wilson wrote: > > Current intel_opregion_init is called during the driver registration > > phase and intel_opregion_fini from the unregistration phase. Rename the > > functions show

[Intel-gfx] [PATCH 2/3] drm/i915: Don't frob with RPS around GPU reset

From: Ville Syrjälä Based on my observations GPU reset doesn't clobber the RPS state, so frobbing with RPS around GPU reset seems rather pointless. Just get rid of it. Signed-off-by: Ville Syrjälä ---

Re: [Intel-gfx] Building GVT-g as a sub-module of i915

On Mon, May 23, 2016 at 4:16 PM, Joonas Lahtinen wrote: > On ma, 2016-05-23 at 07:03 +, Wang, Zhi A wrote: >> Hi Guys: >> I'm trying to make GVT-g as a sub-module of i915 in the next >> version patchset. The basic idea is to introduce a "gvt-g pre-enabled >>

Re: [Intel-gfx] *ERROR* Hangcheck timer elapsed... render ring idle

On Mon, 23 May 2016, Chris wrote: > On Mon, 2016-05-23 at 11:06 +0300, Jani Nikula wrote: >> On Fri, 20 May 2016, Chris wrote: >> > I'm still seeing this periodically, previous to today it happened on >> > April 24th. Doesn't matter what I'm

Re: [Intel-gfx] [PATCH 4/5] Add support for forcing 6 bpc on DP pipes.

On Mon, May 23, 2016 at 11:22:17AM +0300, Ander Conselvan De Oliveira wrote: > On Fri, 2016-04-29 at 18:28 -0700, Manasi Navare wrote: > > From: Jim Bride > > > > For DP compliance we need to be able to control the output color > > type for the pipe associated with the

[Intel-gfx] ✗ Ro.CI.BAT: failure for drm/i915: Fix NULL pointer deference when out of PLLs in IVB

== Series Details == Series: drm/i915: Fix NULL pointer deference when out of PLLs in IVB URL : https://patchwork.freedesktop.org/series/7458/ State : failure == Summary == Series 7458v1 drm/i915: Fix NULL pointer deference when out of PLLs in IVB

Re: [Intel-gfx] i915 kernel panic

On 2016-05-23 10:49, Jani Nikula wrote: > On Mon, 23 May 2016, Oliver Leitner wrote: >> I am having a problem on my HP Compaq 610 Laptop with its built in intel >> graphics chip. It is causing me a kernel Panic. > > There is no kernel panic in your dmesg. There is a

Re: [Intel-gfx] [PATCH] drm/i915: Re-enable GGTT earlier during resume on pre-gen6 platforms

On Fri, May 20, 2016 at 04:06:17PM +0300, David Weinehall wrote: > On Sat, May 07, 2016 at 09:18:24PM +0300, Ville Syrjälä wrote: > > On Fri, May 06, 2016 at 09:22:49PM +0100, Chris Wilson wrote: > > > On Fri, May 06, 2016 at 09:35:55PM +0300, ville.syrj...@linux.intel.com > > > wrote: > > > > @@

[Intel-gfx] ✗ Ro.CI.BAT: failure for series starting with [1/4] drm/i915: Introduce intel_release_shared_dpll()

== Series Details == Series: series starting with [1/4] drm/i915: Introduce intel_release_shared_dpll() URL : https://patchwork.freedesktop.org/series/7467/ State : failure == Summary == Series 7467v1 Series without cover letter

Re: [Intel-gfx] [PATCH] drm/i915/ilk: Wait one vblank before enabling audio

On Fri, May 20, 2016 at 05:36:40PM -0400, Lyude wrote: > We no longer call ilk_audio_codec_enable() while we have vblanks > disabled. As such, we can finally fix this and stop the occasional pipe > underruns I'm seeing on this Dell OptiPlex 990. Hmm. Are you still getting underruns on -nightly?

Re: [Intel-gfx] [PATCH 00/21] drm/i915: SKL/KBL/BXT cdclk stuff

On Fri, May 13, 2016 at 11:41:19PM +0300, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > Here's my second installment of SKL+ cdclk stuff. I've picked up Clint's > latest > SKL/KBL cdclk patch and expanded on it quite a bit. After this series we're

Re: [Intel-gfx] ✗ Ro.CI.BAT: failure for drm/i915: SKL/KBL/BXT cdclk stuff

On Sat, May 14, 2016 at 05:25:57AM -, Patchwork wrote: > == Series Details == > > Series: drm/i915: SKL/KBL/BXT cdclk stuff > URL : https://patchwork.freedesktop.org/series/7169/ > State : failure > > == Summary == > > Series 7169v1 drm/i915: SKL/KBL/BXT cdclk stuff >

Re: [Intel-gfx] [PATCH 10/21] drm/i915: Unify SKL cdclk init paths

On Thu, May 19, 2016 at 06:43:32PM +0300, Imre Deak wrote: > On pe, 2016-05-13 at 23:41 +0300, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > Currently we initialize cdclk on SKL from two different places, > > depending on whether it's during

Re: [Intel-gfx] [PATCH 22/21] drm/i915: Assert the dbuf is enabled when disabling DC5/6

On Thu, May 19, 2016 at 10:49:23PM +0300, Imre Deak wrote: > On Mon, 2016-05-16 at 16:59 +0300, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > Like with cdclk, the DMC is supposed to manage dbuf enabling/disabling. > > Let's make sure it has

Re: [Intel-gfx] [PATCH 11/21] drm/i915: Move SKL+ DBUF enable/disable to display core init/uninit

On Thu, May 19, 2016 at 06:48:37PM +0300, Imre Deak wrote: > On pe, 2016-05-13 at 23:41 +0300, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > SKL and BXT have the same snippets of code for enabling disabling the > > DBUF. Extract those into

[Intel-gfx] ✗ Ro.CI.BAT: warning for series starting with [v2,1/3] drm/i915: Never fully mask the the EI up rps interrupt on SNB/IVB (rev2)

== Series Details == Series: series starting with [v2,1/3] drm/i915: Never fully mask the the EI up rps interrupt on SNB/IVB (rev2) URL : https://patchwork.freedesktop.org/series/7572/ State : warning == Summary == Series 7572v2 Series without cover letter

[Intel-gfx] [PATCH] drm/i915/ilk: Disable SSC for DPLLs if we're not using it

Thanks to Ville Syrjälä for pointing me towards the cause of this issue. Unfortunately one of the sideaffects of having the refclk for a DPLL set to SSC is that as long as it's set to SSC, the GPU will prevent us from powering down any of the pipes or transcoders using it. A couple of BIOSes,

Re: [Intel-gfx] [PATCH] drm/i915/ilk: Wait one vblank before enabling audio

On Mon, 2016-05-23 at 21:06 +0300, Ville Syrjälä wrote: > On Fri, May 20, 2016 at 05:36:40PM -0400, Lyude wrote: > > > > We no longer call ilk_audio_codec_enable() while we have vblanks > > disabled. As such, we can finally fix this and stop the occasional pipe > > underruns I'm seeing on this

Re: [Intel-gfx] [PATCH] drm/i915/ilk: Disable SSC for DPLLs if we're not using it

On Mon, May 23, 2016 at 02:56:54PM -0400, Lyude wrote: > Thanks to Ville Syrjälä for pointing me towards the cause of this issue. > > Unfortunately one of the sideaffects of having the refclk for a DPLL > set to SSC is that as long as it's set to SSC, the GPU will prevent us > from powering down

[Intel-gfx] [PATCH v2] drm/i915/ilk: Don't disable SSC source if it's in use

Thanks to Ville Syrjälä for pointing me towards the cause of this issue. Unfortunately one of the sideaffects of having the refclk for a DPLL set to SSC is that as long as it's set to SSC, the GPU will prevent us from powering down any of the pipes or transcoders using it. A couple of BIOSes

[Intel-gfx] [PATCH 1/2] drm/i915: Wait for flips to complete before returning.

Doing a page flip right after setcrtc would fail because part of the update is run asynchronously. This is a regression and is caused kms_flip to fails without the atomic page flip patch, and kms_frontbuffer_tracking to fail on ro-bdw-i7-5600u. Signed-off-by: Maarten Lankhorst

Re: [Intel-gfx] [PATCH v3] drm/i915/debugfs: Show context objects in i915_gem_objects

Hi, [auto build test ERROR on next-20160523] [cannot apply to drm-intel/for-linux-next v4.6-rc7 v4.6-rc6 v4.6-rc5 v4.6] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Chris-Wilson/drm-i915

Re: [Intel-gfx] [PATCH v2] drm/i915: Enable GSE interrupt on BDW+

On Thu, 19 May 2016, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > We've never actually enabled or unmasked the GSE interrupt on BDW+, > even though the interrupt handler was always prepared for it. > Let's enable it and see what happens. > > Credit

[Intel-gfx] [PATCH 1/2] drm/i915/opregion: Convert to using native drm_i915_private

Prefer passing struct drm_i915_private to internal interfaces as this saves us having to dance between drm_device and our native struct. The savings hare are small (only 70 bytes of unrequired dancing), but progressive! Signed-off-by: Chris Wilson Cc: Jani Nikula

[Intel-gfx] [PATCH 2/2] drm/i915/opregion: Rename init/fini functions to register/unregister

Current intel_opregion_init is called during the driver registration phase and intel_opregion_fini from the unregistration phase. Rename the functions show that this is clear from their names. The phases tell us what we expect the existing hw state to be, e.g. whether interrupts are still enabled

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Bump pin_count to UINT_MAX.

On Mon, May 23, 2016 at 06:09:31PM +0200, Maarten Lankhorst wrote: > Op 23-05-16 om 17:43 schreef Chris Wilson: > > On Mon, May 23, 2016 at 05:09:05PM +0200, Maarten Lankhorst wrote: > >> Op 23-05-16 om 16:25 schreef Chris Wilson: > >>> On Mon, May 23, 2016 at 03:37:41PM +0200, Maarten Lankhorst

Re: [Intel-gfx] [PATCH 3/4] drm/i915: Rename intel_shared_dpll->mode_set() to prepare()

> -Original Message- > From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf > Of Ander Conselvan de Oliveira > Sent: Friday, May 20, 2016 8:24 PM > To: intel-gfx@lists.freedesktop.org > Cc: Conselvan De Oliveira, Ander >

Re: [Intel-gfx] [PATCH 4/5] Add support for forcing 6 bpc on DP pipes.

On Fri, 2016-04-29 at 18:28 -0700, Manasi Navare wrote: > From: Jim Bride > > For DP compliance we need to be able to control the output color > type for the pipe associated with the DP port. To do this we rely > on the intel_dp_test_force_bpc debugfs file and the

Re: [Intel-gfx] [PATCH] drm/i915: Fix NULL pointer deference when out of PLLs in IVB

On Fri, 20 May 2016, Ander Conselvan de Oliveira wrote: > In commit f9476a6c6d0c ("drm/i915: Refactor platform specifics out of > intel_get_shared_dpll()"), the ibx_get_dpll() function lacked an error > check, that can lead to a NULL pointer dereference

Re: [Intel-gfx] i915 kernel panic

On Mon, 23 May 2016, Oliver Leitner wrote: > I am having a problem on my HP Compaq 610 Laptop with its built in intel > graphics chip. It is causing me a kernel Panic. There is no kernel panic in your dmesg. There is a WARNING with a backtrace. What other symptoms do

Re: [Intel-gfx] linux-next: build failure after merge of the drm-intel tree

On Mon, 23 May 2016, Stephen Rothwell wrote: > Hi all, > > After merging the drm-intel tree, today's linux-next build (x86_64 > allmodconfig) failed like this: > > In file included from drivers/gpu/drm/i915/i915_trace.h:10:0, > from

Re: [Intel-gfx] [CI 04/20] drm/i915: Remove the dedicated hangcheck workqueue

On 20/05/16 13:23, Chris Wilson wrote: On Fri, May 20, 2016 at 01:07:29PM +0100, Tvrtko Ursulin wrote: On 19/05/16 14:13, Chris Wilson wrote: On Thu, May 19, 2016 at 01:50:51PM +0100, Tvrtko Ursulin wrote: On 19/05/16 12:32, Chris Wilson wrote: The queue only ever contains at most one

Re: [Intel-gfx] [PATCH 03/12] drm/i915: Apply lockdep annotations to i915_gem_context.c

On 22/05/16 14:02, Chris Wilson wrote: Markup the functions that require the caller to hold struct_mutex with lockdep_assert_held(). In the hopefully not-too-distant future we will split the struct_mutex up, and in doing so we need to be sure that we know what it protects - here the lockdep

Re: [Intel-gfx] [PATCH 3/5] drm/i915: Convert OpRegion ASLE irq worker into a tasklet

On Thu, 19 May 2016, Chris Wilson wrote: > Using a tasklet for an irq bottom-half is the preferred form as it > should ensure minimal latency from the irq to execution of the tasklet. > > Signed-off-by: Chris Wilson > Cc: Tvrtko Ursulin

Re: [Intel-gfx] [PATCH 05/12] drm/i915: Rename i915_gem_context_reference/unreference()

On 22/05/16 14:02, Chris Wilson wrote: As these are wrappers around kref_get/kref_put() it is preferable to follow the naming convention and use the same verb get/put in our wrapper names for manipulating a reference to the context. Not so sure about this one. We got objects, framebuffers and

Re: [Intel-gfx] [PATCH 07/12] drm/i915: Move pinning of dev_priv->kernel_context into its creator

On 22/05/16 14:02, Chris Wilson wrote: Rather than have every context ask "am I owned by the kernel? pin!", move that logic into the creator of the kernel context, in order to improve code comprehension. Makes sense. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin

Re: [Intel-gfx] [PATCH 09/12] drm/i915: Put the kernel_context in drm_i915_private next to its friends

On 22/05/16 14:02, Chris Wilson wrote: Just move the kernel_context memboer of drm_i915_private next to the engines it is associated with. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Cc: Joonas Lahtinen

Re: [Intel-gfx] [PATCH 08/12] drm/i915: Show i915_gem_context owner in debugfs

On Mon, May 23, 2016 at 10:42:42AM +0100, Tvrtko Ursulin wrote: > > > On 22/05/16 14:02, Chris Wilson wrote: > >Print the context's owner (via the pid under file_priv) under debugfs. > > > >Note that since this was originally introducing > >dev_priv->kernel_context, there are a couple of

Re: [Intel-gfx] [PATCH 3/5] drm/i915: Convert OpRegion ASLE irq worker into a tasklet

On Mon, May 23, 2016 at 12:12:30PM +0300, Jani Nikula wrote: > > #define ACPI_EV_DISPLAY_SWITCH (1<<0) > > @@ -814,11 +807,11 @@ void intel_opregion_fini(struct drm_device *dev) > > if (!opregion->header) > > return; > > > > + tasklet_kill(_priv->opregion.asle_task); > > + >

Re: [Intel-gfx] [PATCH 06/12] drm/i915: Name the inner most per-engine intel_context struct

On 22/05/16 14:02, Chris Wilson wrote: We want to give a name to the currently anonymous per-engine struct inside the context, so that we can assign it to a local variable and save clumsy typing. The name we have chosen is intel_context as it reflects the HW facing portion of the context state

Re: [Intel-gfx] [PATCH 05/12] drm/i915: Rename i915_gem_context_reference/unreference()

On Mon, May 23, 2016 at 10:17:01AM +0100, Tvrtko Ursulin wrote: > > On 22/05/16 14:02, Chris Wilson wrote: > >As these are wrappers around kref_get/kref_put() it is preferable to > >follow the naming convention and use the same verb get/put in our > >wrapper names for manipulating a reference to

Re: [Intel-gfx] [PATCH 07/12] drm/i915: Move pinning of dev_priv->kernel_context into its creator

On Mon, May 23, 2016 at 10:33:24AM +0100, Tvrtko Ursulin wrote: > >@@ -313,30 +311,14 @@ i915_gem_create_context(struct drm_device *dev, > > if (IS_ERR(ctx)) > > return ctx; > > > >-if (is_global_default_ctx && ctx->legacy_hw_ctx.rcs_state) { > >-/* We may need to

Re: [Intel-gfx] [Nouveau] [PATCH v4] vga_switcheroo: Add helper for deferred probing

On 21 May 2016 at 15:08, Lukas Wunner wrote: > Hi Emil, > > On Fri, May 20, 2016 at 12:41:04AM +0100, Emil Velikov wrote: >> On 19 May 2016 at 15:39, Lukas Wunner wrote: >> > +bool vga_switcheroo_client_probe_defer(struct pci_dev *pdev) >> > +{ >> > + if

Re: [Intel-gfx] [CI 06/20] drm/i915: Slaughter the thundering i915_wait_request herd

On 20/05/16 13:19, Chris Wilson wrote: On Fri, May 20, 2016 at 01:04:13PM +0100, Tvrtko Ursulin wrote: + p = >waiters.rb_node; + while (*p) { + parent = *p; + if (wait->seqno == to_wait(parent)->seqno) { + /* We have multiple

Re: [Intel-gfx] [CI 16/20] drm/i915: Only query timestamp when measuring elapsed time

On 20/05/16 13:20, Chris Wilson wrote: On Thu, May 19, 2016 at 04:44:03PM +0100, Tvrtko Ursulin wrote: On 19/05/16 12:32, Chris Wilson wrote: Avoid the two calls to ktime_get_raw_ns() (at best it reads the TSC) as we only need to compute the elapsed time for a timed wait. v2: Eliminate the

Re: [Intel-gfx] [PATCH v2] drm/i915/dmc: Step away from symbolic links

On Wed, May 18, 2016 at 01:24:12PM +0300, Mika Kuoppala wrote: > Patrik Jakobsson writes: > > > [ text/plain ] > > Load specific firmware versions for the DMC instead of using symbolic > > links. The currently recommended versions are: SKL 1.26, KBL 1.01 and > >

Re: [Intel-gfx] [PATCH 02/12] drm/i915: Rename struct intel_context

On 22/05/16 14:02, Chris Wilson wrote: Our goal is to rename the anonymous per-engine struct beneath the current intel_context. However, after a lively debate resolving around the confusion between intel_context_engine and intel_engine_context, the realisation is that the two structs target

Re: [Intel-gfx] [PATCH 04/12] drm/i915: Rename and inline i915_gem_context_get()

On 22/05/16 14:02, Chris Wilson wrote: i915_gem_context_get() is a very simple wrapper around idr_find(), so simple that it would be smaller to do the lookup inline. Also we use the verb 'lookup' to return a pointer from a handle, freeing 'get' to imply obtaining a reference to the context.

Re: [Intel-gfx] [PATCH 08/12] drm/i915: Show i915_gem_context owner in debugfs

On 22/05/16 14:02, Chris Wilson wrote: Print the context's owner (via the pid under file_priv) under debugfs. Note that since this was originally introducing dev_priv->kernel_context, there are a couple of leftover minor chunks. Signed-off-by: Chris Wilson Cc:

Re: [Intel-gfx] [PATCH v5] vga_switcheroo: Add helper for deferred probing

On Sat, May 21, 2016 at 03:59:16PM +0100, Lukas Wunner wrote: > So far we've got one condition when DRM drivers need to defer probing > on a dual GPU system and it's coded separately into each of the relevant > drivers. As suggested by Daniel Vetter, deduplicate that code in the > drivers and move

Re: [Intel-gfx] [PATCH] drm/i915/ilk: Wait one vblank before enabling audio

On Sat, 21 May 2016, Lyude wrote: > We no longer call ilk_audio_codec_enable() while we have vblanks > disabled. As such, we can finally fix this and stop the occasional pipe > underruns I'm seeing on this Dell OptiPlex 990. > > Cc: sta...@vger.kernel.org Even if this were the

Re: [Intel-gfx] [PATCH 1/4] drm/i915: Introduce intel_release_shared_dpll()

> -Original Message- > From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf > Of Ander Conselvan de Oliveira > Sent: Friday, May 20, 2016 8:24 PM > To: intel-gfx@lists.freedesktop.org > Cc: Conselvan De Oliveira, Ander >

[Intel-gfx] Building GVT-g as a sub-module of i915

Hi Guys: I'm trying to make GVT-g as a sub-module of i915 in the next version patchset. The basic idea is to introduce a "gvt-g pre-enabled state" in i915. I think it should be a kernel option. When this kernel option is enabled by user, i915 will do GGTT partition and save HW initial MMIO

Re: [Intel-gfx] *ERROR* Hangcheck timer elapsed... render ring idle

On Fri, 20 May 2016, Chris wrote: > I'm still seeing this periodically, previous to today it happened on > April 24th. Doesn't matter what I'm doing the video will freeze however > the cursor will still move. Only option is to SSH in to the system from > my tablet and do

Re: [Intel-gfx] [PATCH 3/5] drm/i915: Fixes to support the DP Compliance EDID tests.

On Fri, 2016-04-29 at 18:28 -0700, Manasi Navare wrote: > This patch addresses a few issues from the original patch for > DP Compliance EDID test support submitted by > Todd Previte Do you mean commit 559be30cb74d ("drm/i915: Implement the intel_dp_autotest_edid function

Re: [Intel-gfx] [PATCH 2/4] drm/i915: Rename intel_shared_dpll_commit() to _swap_state()

> -Original Message- > From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf > Of Ander Conselvan de Oliveira > Sent: Friday, May 20, 2016 8:24 PM > To: intel-gfx@lists.freedesktop.org > Cc: Conselvan De Oliveira, Ander >

Re: [Intel-gfx] [PATCH 4/4] drm/i915: Update kerneldoc for intel_dpll_mgr.c

> -Original Message- > From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf > Of Ander Conselvan de Oliveira > Sent: Friday, May 20, 2016 8:24 PM > To: intel-gfx@lists.freedesktop.org > Cc: Conselvan De Oliveira, Ander >

Re: [Intel-gfx] [PATCH v5] vga_switcheroo: Add helper for deferred probing

On Mon, 23 May 2016, Daniel Vetter wrote: > On Sat, May 21, 2016 at 03:59:16PM +0100, Lukas Wunner wrote: >> So far we've got one condition when DRM drivers need to defer probing >> on a dual GPU system and it's coded separately into each of the relevant >> drivers. As suggested

Re: [Intel-gfx] [PATCH 2/5] drm/i915: Disable the Link training automation support

On Fri, 2016-04-29 at 18:28 -0700, Manasi Navare wrote: > Kernel does not have automation support for DP compliance Link > training tests. So the Link Training test handler should return > a TEST_NAK. Is this test activated by short or long pulse? The commit message of commit 09b1eb130e43

[Intel-gfx] [PATCH i-g-t] tests/kms_flip: Check crcs during basic flip test

From: Ville Syrjälä Allocate 8 distinct looking fbs for the basic flip test, and while flipping, check that the crc for each frame is as expected. If we were to present the wrong framebuffer by accident, this should catch it. Signed-off-by: Ville Syrjälä

[Intel-gfx] ✓ Ro.CI.BAT: success for series starting with [v2,01/11] drm/i915: Rename struct intel_context

== Series Details == Series: series starting with [v2,01/11] drm/i915: Rename struct intel_context URL : https://patchwork.freedesktop.org/series/7564/ State : success == Summary == Series 7564v1 Series without cover letter http://patchwork.freedesktop.org/api/1.0/series/7564/revisions/1/mbox

Re: [Intel-gfx] [PATCH v2 06/11] drm/i915: Move pinning of dev_priv->kernel_context into its creator

On 23/05/16 12:34, Chris Wilson wrote: Rather than have every context ask "am I owned by the kernel? pin!", move that logic into the creator of the kernel context, in order to improve code comprehension. v2: Throw away the user_handle on failure to allocate the ppgtt. Signed-off-by: Chris

Re: [Intel-gfx] [PATCH v2 07/11] drm/i915: Show i915_gem_context owner in debugfs

On 23/05/16 12:34, Chris Wilson wrote: Print the context's owner (via the pid under file_priv) under debugfs. In doing so, we must be careful that the filp is not accessed after it is freed (notified via i915_gem_context_close). v2: Mark the file_priv as closed. Signed-off-by: Chris Wilson

[Intel-gfx] [PATCH i-g-t] lib/crc: Update doc for igt_pipe_crc_get_crcs

Noticed while discussing CRC tests with Ville that this was totally wrong. v2: Ville pointed out that it only does not block when opened using igt_pipe_crc_new_nonblocking. Still different from igt_pipe_crc_collect_crc, which will always block. v3: Fix type (Ville). Cc: Ville Syrjälä

Re: [Intel-gfx] [PATCH v2 06/11] drm/i915: Move pinning of dev_priv->kernel_context into its creator

On 23/05/16 13:16, Chris Wilson wrote: On Mon, May 23, 2016 at 01:09:02PM +0100, Tvrtko Ursulin wrote: @@ -426,6 +401,26 @@ int i915_gem_context_init(struct drm_device *dev) return PTR_ERR(ctx); } + if (ctx->legacy_hw_ctx.rcs_state) { + int ret; +

Re: [Intel-gfx] [PATCH v2 11/11] drm/i915: Show context objects in debugfs/i915_gem_objects

On 23/05/16 12:34, Chris Wilson wrote: Blah blah blah, this, for that, etc... commit message ofc. :) Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Cc: Joonas Lahtinen ---

Re: [Intel-gfx] [PATCH v2 11/11] drm/i915: Show context objects in debugfs/i915_gem_objects

On Mon, May 23, 2016 at 01:31:25PM +0100, Tvrtko Ursulin wrote: > > On 23/05/16 12:34, Chris Wilson wrote: > > Blah blah blah, this, for that, etc... commit message ofc. :) > > >Signed-off-by: Chris Wilson > >Cc: Tvrtko Ursulin > >Cc: Joonas

[Intel-gfx] [PATCH v2 i-g-t] tests/kms_flip: Check crcs during basic flip test

From: Ville Syrjälä Allocate 8 distinct looking fbs for the basic flip test, and while flipping, check that the crc for each frame is as expected. If we were to present the wrong framebuffer by accident, this should catch it. v2: Just igt_warn() instead of

Re: [Intel-gfx] [PATCH 5/5] drm/i915: Implement intel_dp_autotest_video_pattern function for DP Video pattern compliance tests

On Fri, 2016-04-29 at 18:28 -0700, Manasi Navare wrote: > This video pattern test function gets invoked through the > compliance test handler on a HPD short pulse if the test type is > set to DP_TEST_VIDEO_PATTERN. This performs the DPCD registers > reads to read the requested test pattern, video

Re: [Intel-gfx] [PATCH v3 02/12] drm: Read DPCD receiver capability for DP to VGA converter

On Mon, May 23, 2016 at 01:50:47PM +0300, Mika Kahola wrote: > Read from DPCD receiver capability field the max allowed > pixel clock and bits per component for DP to VGA converter. > > Signed-off-by: Mika Kahola > --- > drivers/gpu/drm/drm_dp_helper.c | 46 >

Re: [Intel-gfx] [PATCH v2 06/11] drm/i915: Move pinning of dev_priv->kernel_context into its creator

On Mon, May 23, 2016 at 01:09:02PM +0100, Tvrtko Ursulin wrote: > >@@ -426,6 +401,26 @@ int i915_gem_context_init(struct drm_device *dev) > > return PTR_ERR(ctx); > > } > > > >+if (ctx->legacy_hw_ctx.rcs_state) { > >+int ret; > >+ > >+/* We may need to

Re: [Intel-gfx] [PATCH] drm/i915/userptr: Convert to drm_i915_private

On to, 2016-05-19 at 16:17 +0100, Chris Wilson wrote: > -int > -i915_gem_init_userptr(struct drm_device *dev) > +void i915_gem_init_userptr(struct drm_i915_private *dev_priv) >  { > - struct drm_i915_private *dev_priv = to_i915(dev); >   mutex_init(_priv->mm_lock); >  

Re: [Intel-gfx] [Nouveau] [PATCH v4] vga_switcheroo: Add helper for deferred probing

On Sat, 21 May 2016, Lukas Wunner wrote: > Hi Emil, > > On Fri, May 20, 2016 at 12:41:04AM +0100, Emil Velikov wrote: >> On 19 May 2016 at 15:39, Lukas Wunner wrote: >> > +bool vga_switcheroo_client_probe_defer(struct pci_dev *pdev) >> > +{ >> > + if

Re: [Intel-gfx] [PATCH 3/5] drm/i915: Convert OpRegion ASLE irq worker into a tasklet

On Mon, 23 May 2016, Chris Wilson wrote: > On Mon, May 23, 2016 at 12:12:30PM +0300, Jani Nikula wrote: >> > #define ACPI_EV_DISPLAY_SWITCH (1<<0) >> > @@ -814,11 +807,11 @@ void intel_opregion_fini(struct drm_device *dev) >> >if (!opregion->header) >> >

Re: [Intel-gfx] [PATCH 11/12] drm/i915: Rearrange i915_gem_context

On 22/05/16 14:02, Chris Wilson wrote: Pack the integers and related types together inside the struct. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Cc: Joonas Lahtinen ---

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