Re: [Intel-gfx] [PATCH 3/4] drm/i915: Bail if plane/crtc init fails

On Tue, Oct 25, 2016 at 06:58:02PM +0300, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > Due to the plane->index not getting readjusted in drm_plane_cleanup(), > we can't continue initialization of some plane/crtc init fails. > Well, we sort of

Re: [Intel-gfx] [RFC 0/4] Wire gen9 cursor interface to universal plane registers

On Wed, Oct 26, 2016 at 05:30:04PM -0700, Matt Roper wrote: > On Thu, Oct 27, 2016 at 01:15:03AM +0100, Chris Wilson wrote: > > On Wed, Oct 26, 2016 at 03:51:27PM -0700, Matt Roper wrote: > > > Gen9 has a traditional cursor plane that is mutually exclusive with the > > > system's top-most

Re: [Intel-gfx] [PATCH] drm/i915: Fix scaling check for 90/270 degree plane rotation

On 25/10/2016 13:45, ville.syrj...@linux.intel.com wrote: From: Ville Syrjälä Starting from commit b63a16f6cd89 ("drm/i915: Compute display surface offset in the plane check hook for SKL+") we've already rotated the src coordinates by 270 degrees by the time we

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Broxton ddi phy refactoring (rev5)

On Fri, Oct 21, 2016 at 05:16:45PM +0300, Ander Conselvan De Oliveira wrote: > On Wed, 2016-10-19 at 16:56 +, Patchwork wrote: > > Test kms_force_connector_basic: > > Subgroup force-load-detect: > > incomplete -> PASS   (fi-byt-j1900) > > pass   

[Intel-gfx] [PATCH v2 2/6] drm/msm/mdp5: Advertize 180 degree rotation

From: Ville Syrjälä Since the hardware can apparently do both X and Y reflection, we can advertize also 180 degree rotation as thats just X+Y reflection. v2: Drop the BIT() Cc: Rob Clark Cc: Jilai Wang Cc: Archit

Re: [Intel-gfx] [PATCH v3 2/2] drm/i915/dp: BDW cdclk fix for DP audio

On Wed, 26 Oct 2016, Dhinakaran Pandiyan wrote: > According to BSpec, cdclk has to be not less than 432 MHz with DP audio > enabled, port width x4, and link rate HBR2 (5.4 GHz) > > Having a lower cdclk triggers pipe underruns, which then lead to displays >

Re: [Intel-gfx] [PATCH 4/5] drm/i915; Add a function to return index of link rate

On Fri, 2016-10-21 at 16:45 -0700, Manasi Navare wrote: > This is required to return the index of link rate into > common_rates array. This gets used to retry the link > training at lower link rate. > > Cc: Jani Nikula > Cc: Daniel Vetter >

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm: Release reference from blob lookup after replacing property (rev2)

== Series Details == Series: drm: Release reference from blob lookup after replacing property (rev2) URL : https://patchwork.freedesktop.org/series/14357/ State : warning == Summary == Series 14357v2 drm: Release reference from blob lookup after replacing property

Re: [Intel-gfx] [PATCH i-g-t 1/3] lib/{igt_sysfs, igt_aux}: Make available to other users kick_fbcon() (unbind_fbcon()), and added helpers to igt_aux.

On Thu, Oct 27, 2016 at 12:02:30AM +0300, Marius Vlad wrote: > On Mon, Oct 24, 2016 at 10:40:37AM +0200, Daniel Vetter wrote: > > On Thu, Oct 20, 2016 at 10:36:47PM +0300, Marius Vlad wrote: > > > Previously under unbind_fbcon(), disable/enable framebuffer console. > > > > > > lib/igt_aux: Added

Re: [Intel-gfx] [PATCH v2 01/11] drm/i915/skl+: Prepare for removing data rate from skl watermark state, v2.

On Wed, Oct 26, 2016 at 03:41:29PM +0200, Maarten Lankhorst wrote: > Changes since v1: > - Remove plane->pipe checks, they're implied by the macros. > - Split unrelated changes to a separate commit. > > Signed-off-by: Maarten Lankhorst Drive-by review: The

[Intel-gfx] [PATCH] lib/ida: Document locking requirements a bit better v2

I wanted to wrap a bunch of ida_simple_get calls into their own locking, until I dug around and read the original commit message. Stuff like this should imo be added to the kernel doc, let's do that. v2: Improve the kerneldoc per Tejun's review. Cc: Mel Gorman Cc:

Re: [Intel-gfx] [PATCH v2 09/11] drm/i915/gen9+: Program watermarks as a separate step during evasion, v2.

Op 27-10-16 om 01:24 schreef Matt Roper: > On Wed, Oct 26, 2016 at 03:41:37PM +0200, Maarten Lankhorst wrote: >> The watermark updates for SKL style watermarks are no longer done >> in the plane callbacks, but are now called in a separate watermark >> update function that's called during the same

[Intel-gfx] [PATCH v4 1/2] drm/i915/dp: Enable DP audio stall fix for gen9 platforms

Enabling DP audio stall fix is necessary to play audio over DP HBR2. So, let's set this bit right before enabling the audio codec. Playing audio without setting this bit results in pipe FIFO underruns. This workaround is applicable only for audio sample rates up to 96kHz. For frequencies above

Re: [Intel-gfx] [PATCH 1/5] drm: Add atomic helper to redo a modeset on current mode

On Mon, Oct 24, 2016 at 03:08:48PM -0700, Manasi Navare wrote: > On Mon, Oct 24, 2016 at 09:12:35AM +0200, Daniel Vetter wrote: > > On Mon, Oct 24, 2016 at 9:00 AM, Manasi Navare > > wrote: > > >> I guess we just need to do some additional work on top to make sure the >

Re: [Intel-gfx] [PATCH 0/5] drm/i915/skl: Backport watermark fixes for 4.8.y

On Wed, Oct 26, 2016 at 03:36:32PM -0400, Lyude wrote: > Now that these have finally made it into 4.9, it's time to finally backport > these fixes. Skylake has been a mess in multi-monitor setups for a while now > because up until recently we've been updating the watermarks on Skylake just > like

Re: [Intel-gfx] [PATCH] drm: i915: Wait for fences on new fb, not old

On Fri, Oct 21, 2016 at 03:44:54PM +0100, Daniel Stone wrote: > The previous code would wait for fences on the framebuffer from the old > plane state to complete, rather than the new, so you would see tearing > everywhere. Fix this to wait on the new state before we make it active. > >

[Intel-gfx] [PATCH 35/41] drm/i915: Move the global sync optimisation to the timeline

Currently we try to reduce the number of synchronisations (now the number of requests we need to wait upon) by noting that if we have earlier waited upon a request, all subsequent requests in the timeline will be after the wait. This only applies to requests in this timeline, as other timelines

Re: [Intel-gfx] [PATCH 1/4] igt_fb: Add Y-tiling support

On Wed, Oct 26, 2016 at 09:09:26AM +0100, Tvrtko Ursulin wrote: > > On 26/10/2016 07:32, Daniel Vetter wrote: > > On Tue, Oct 25, 2016 at 03:02:33PM +, Paneri, Praveen wrote: > > > > So when you say that all Y tiling tests fail without this kernel hack, > > > > which tests you are referring

Re: [Intel-gfx] [PATCH i-g-t] lib/drmtest: Take DRIVER_ANY into account when opening the DRM device

On Thu, Oct 27, 2016 at 09:58:19AM +0200, Tomeu Vizoso wrote: > __drm_open_driver was changed to bail out on VGEM devices unless they > are explicitly asked for (DRIVER_VGEM). But with that change we lost > support for DRIVER_ANY. > > Signed-off-by: Tomeu Vizoso >

Re: [Intel-gfx] [PATCH v4 1/2] drm/i915/dp: Enable DP audio stall fix for gen9 platforms

On Wed, 26 Oct 2016, Dhinakaran Pandiyan wrote: > Enabling DP audio stall fix is necessary to play audio over DP HBR2. So, > let's set this bit right before enabling the audio codec. Playing audio > without setting this bit results in pipe FIFO underruns. > > This

Re: [Intel-gfx] [PATCH v2 1/6] drm/msm/mdp5: Use per-plane rotation property

On Mon, Oct 24, 2016 at 03:52:09PM +0530, Archit Taneja wrote: > > > On 10/24/2016 03:45 PM, Ville Syrjälä wrote: > > On Mon, Oct 24, 2016 at 03:33:18PM +0530, Archit Taneja wrote: > >> Hi Ville, > >> > >> On 10/22/2016 12:52 AM, ville.syrj...@linux.intel.com wrote: > >>> From: Ville Syrjälä

Re: [Intel-gfx] [PATCH igt] igt/kms_flip: Calibrate timestamp errors

On Wed, Oct 26, 2016 at 12:17:25PM +0300, Ville Syrjälä wrote: > On Wed, Oct 26, 2016 at 08:18:13AM +0200, Daniel Vetter wrote: > > On Mon, Oct 24, 2016 at 10:38:34AM +0100, Chris Wilson wrote: > > > On Mon, Oct 24, 2016 at 11:14:31AM +0200, Daniel Vetter wrote: > > > > On Mon, Oct 24, 2016 at

Re: [Intel-gfx] [PATCH 4/4] drm/i915: Reorganize sprite init

On Tue, Oct 25, 2016 at 06:58:03PM +0300, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > Kill the switch statement from the sprite init code and replace with a > more straightforward if ladder. Now each significant evolution of the > sprite hardware

[Intel-gfx] [PULL] GVT-g device model

Hi, Here's new pull request to address recent build issues reported and with more cleanup and fixes. Passed VM regression tests. Thanks. -- The following changes since commit 19e6393fb5366a89705a62b3276ce42e990d12ce: drm/i915/gvt: do not ignore return value of create_scratch_page

[Intel-gfx] [PULL] drm-misc-fixes

Hi Dave, drm-misc-fixes for 4.9. Not sure this is a good idea, but somehow there was a pile of fixes floating and I figured I could try: First time pull request with the new drm-misc.git repo, let's see how that goes. I'll probably send you a -misc pull for 4.10 (to get the s/fence/dma_fence/

Re: [Intel-gfx] [PATCH i-g-t] lib: use the local intel_aub.h file

On Wed, Oct 26, 2016 at 05:48:39PM +0100, Emil Velikov wrote: > From: Emil Velikov > > File is provided by the libdrm_intel package which is optional. Since we > already have a local copy of the file, we might as well use it ;-) > > Cc: Brian Starkey

[Intel-gfx] ✗ Fi.CI.BAT: warning for lib/ida: Document locking requirements a bit better (rev2)

== Series Details == Series: lib/ida: Document locking requirements a bit better (rev2) URL : https://patchwork.freedesktop.org/series/14410/ State : warning == Summary == Series 14410v2 lib/ida: Document locking requirements a bit better

Re: [Intel-gfx] [PATCH 4/6] drm/i915/scheduler: Execute requests in order of priorities

On Thu, Oct 27, 2016 at 01:03:46AM +0100, Chris Wilson wrote: > spin_lock(>execlist_lock); > - list_for_each_entry(cursor, >execlist_queue, execlist_link) { > + rb = engine->execlist_first; > + while (rb) { > + struct drm_i915_gem_request *cursor = > +

Re: [Intel-gfx] [PATCH] drm/i915: Fix scaling check for 90/270 degree plane rotation

On Thu, Oct 27, 2016 at 08:46:50AM +0100, Tvrtko Ursulin wrote: > > On 25/10/2016 13:45, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > Starting from commit b63a16f6cd89 ("drm/i915: Compute display surface > > offset in the plane check hook

Re: [Intel-gfx] [PATCH v4] tools/intel_guc_logger: Utility for capturing GuC firmware logs in a file

This patch is now pushed, thanks. -- Petri Latvala On Wed, Oct 12, 2016 at 02:32:17PM +0100, Tvrtko Ursulin wrote: > > On 10/10/2016 15:31, Goel, Akash wrote: > > > > > > On 10/10/2016 7:22 PM, Tvrtko Ursulin wrote: > > > > > > On 10/10/2016 11:59, akash.g...@intel.com wrote: > > > > From:

[Intel-gfx] [PATCH v7 00/11] Enable i915 perf stream for Haswell OA unit

Rebased on nightly, including recent review updates (CI wasn't happy picking up the replies updating individual patches). This also reverts back to pinning the context upfront when opening a stream for a single context, instead of hooking into pinning and updating OACONTROL on the fly. Chris has

Re: [Intel-gfx] [PATCH] lib/ida: Document locking requirements a bit better

On Wed, Oct 26, 2016 at 04:07:25PM -0400, Tejun Heo wrote: > Hello, Daniel. > > On Wed, Oct 26, 2016 at 09:25:25PM +0200, Daniel Vetter wrote: > > > > + * Note that callers must ensure that concurrent access to @ida is not > > > > possible. > > > > + * When simplicity trumps concurrency needs

[Intel-gfx] [PATCH i-g-t] lib/drmtest: Take DRIVER_ANY into account when opening the DRM device

__drm_open_driver was changed to bail out on VGEM devices unless they are explicitly asked for (DRIVER_VGEM). But with that change we lost support for DRIVER_ANY. Signed-off-by: Tomeu Vizoso Fixes: 7ce63894854d ("lib: Support opening vGEM device") Cc: Chris Wilson

[Intel-gfx] [PATCH igt 2/3] igt/gem_exec_parse: remove oacontrol checks

The command parser no longer whitelists or does anything special for the OACONTROL register which is now considered owned by i915-perf. As a follow up the plan is to at least check that attempting to write to OACONTROL from userspace must not fail with an EINVAL error, otherwise Mesa's graceful

[Intel-gfx] [PATCH v7 05/11] drm/i915: Add 'render basic' Haswell OA unit config

Adds a static OA unit, MUX + B Counter configuration for basic render metrics on Haswell. This is auto generated from an XML description of metric sets, currently maintained in gputop, ref: https://github.com/rib/gputop > gputop-data/oa-*.xml > scripts/i915-perf-kernelgen.py $ make -C

[Intel-gfx] [PATCH] drm/i915: fix comment on I915_{READ,WRITE}_FW

Comment mentioned use of intel_uncore_forcewake_irq{unlock, lock} functions which are nonexistent (and never were). The description was also incomplete and could cause confusion. Updated comment is more elaborate on usage and caveats. v2: mention __locked variant of

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915/DMC/KBL: Load DMC on KBL using the no_stepping_info array

== Series Details == Series: drm/i915/DMC/KBL: Load DMC on KBL using the no_stepping_info array URL : https://patchwork.freedesktop.org/series/14311/ State : warning == Summary == Series 14311v1 drm/i915/DMC/KBL: Load DMC on KBL using the no_stepping_info array

Re: [Intel-gfx] [PATCH v2 01/11] drm/i915/skl+: Prepare for removing data rate from skl watermark state, v2.

Op 27-10-16 om 09:12 schreef Daniel Vetter: > On Wed, Oct 26, 2016 at 03:41:29PM +0200, Maarten Lankhorst wrote: >> Changes since v1: >> - Remove plane->pipe checks, they're implied by the macros. >> - Split unrelated changes to a separate commit. >> >> Signed-off-by: Maarten Lankhorst

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915/guc: WA to address the Ringbuffer coherency issue (rev2)

== Series Details == Series: drm/i915/guc: WA to address the Ringbuffer coherency issue (rev2) URL : https://patchwork.freedesktop.org/series/13807/ State : warning == Summary == Series 13807v2 drm/i915/guc: WA to address the Ringbuffer coherency issue

Re: [Intel-gfx] [PATCH 5/8] drm/i915/huc: Support HuC authentication

On Mon, 2016-10-03 at 11:42 -0700, Anusha Srivatsa wrote: > From: Peter Antoine > > The HuC authentication is done by host2guc call. The HuC RSA keys > are sent to GuC for authentication. > > v2: rebased on top of drm-intel-nightly. > changed name format and upped

Re: [Intel-gfx] [PATCH] drm: Print some debug/error info during DP dual mode detect

On Wed, 2016-10-26 at 18:10 +0300, Ville Syrjälä wrote: > On Wed, Oct 26, 2016 at 05:50:08PM +0300, Imre Deak wrote: > > There's at least one LSPCON device that occasionally returns an unexpected > > adaptor ID which leads to a failed detect. Print some debug info to help > > debugging this and

Re: [Intel-gfx] [PATCH 1/4] igt_fb: Add Y-tiling support

Hi Tvrtko, Along with this change I made following change in the kernel side. I was not sure if this is a hack of a legitimate change. Could you please give me a pointer about how to move fwd from here? Without this all Y-tiling tests would fail. --- a/drivers/gpu/drm/i915/intel_display.c +++

Re: [Intel-gfx] [PATCH v7 06/11] drm/i915: Enable i915 perf stream for Haswell OA unit

On Wed, Oct 26, 2016 at 12:05:44AM +0100, Chris Wilson wrote: > On Tue, Oct 25, 2016 at 12:19:29AM +0100, Robert Bragg wrote: > > + /* So that we don't have to worry about updating the context ID > > +* in OACONTOL on the fly we make sure to pin the context > > +* upfront for the

Re: [Intel-gfx] [PATCH] drm/i915: Fix scaling check for 90/270 degree plane rotation

On Thu, Oct 27, 2016 at 08:46:50AM +0100, Tvrtko Ursulin wrote: > > On 25/10/2016 13:45, ville.syrj...@linux.intel.com wrote: > >From: Ville Syrjälä > > > >Starting from commit b63a16f6cd89 ("drm/i915: Compute display surface > >offset in the plane check hook for

Re: [Intel-gfx] [PATCH i-g-t] lib: use the local intel_aub.h file

On Thu, Oct 27, 2016 at 09:28:12AM +0200, Daniel Vetter wrote: On Wed, Oct 26, 2016 at 05:48:39PM +0100, Emil Velikov wrote: From: Emil Velikov File is provided by the libdrm_intel package which is optional. Since we already have a local copy of the file, we might

Re: [Intel-gfx] [PULL] GVT-g device model

On Thu, Oct 27, 2016 at 03:03:27PM +0800, Zhenyu Wang wrote: > > Hi, > > Here's new pull request to address recent build issues reported > and with more cleanup and fixes. Passed VM regression tests. > > Thanks. > -- > > The following changes since commit

Re: [Intel-gfx] [PATCH v4 1/2] drm/i915/dp: Enable DP audio stall fix for gen9 platforms

On Wed, 2016-10-26 at 12:11 +0300, Ville Syrjälä wrote: > On Tue, Oct 25, 2016 at 07:37:36PM -0700, Dhinakaran Pandiyan wrote: > > Enabling DP audio stall fix is necessary to play audio over DP HBR2. So, > > let's set this bit right before enabling the audio codec. Playing audio > > without

Re: [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915: Rotated view does not need a fence (rev3)

On 26/10/2016 08:46, Patchwork wrote: == Series Details == Series: series starting with [v2,1/2] drm/i915: Rotated view does not need a fence (rev3) URL : https://patchwork.freedesktop.org/series/14340/ State : success == Summary == Series 14340v3 Series without cover letter

Re: [Intel-gfx] [PATCH 3/8] drm/i915/huc: Add HuC fw loading support

On Mon, Oct 24, 2016 at 02:24:01PM -0700, Carlos Santa wrote: > On Thu, 2016-10-13 at 13:54 -0700, Jeff McGee wrote: > > On Thu, Oct 13, 2016 at 10:42:42AM -0700, Jeff McGee wrote: > > > > > > On Mon, Oct 03, 2016 at 11:42:57AM -0700, Anusha Srivatsa wrote: > > > > > > > > From: Peter Antoine

Re: [Intel-gfx] [PATCH 4/8] drm/i915/huc: Add debugfs for HuC loading status check

Tested with HuC version 1.07.1398 on SKL. Reviewed-by: Carlos Santa Tested-by: Carlos Santa On Mon, 2016-10-03 at 11:42 -0700, Anusha Srivatsa wrote: > From: Peter Antoine > > Add debugfs entry for HuC loading status

Re: [Intel-gfx] [PATCH i-g-t] lib/drmtest: Take DRIVER_ANY into account when opening the DRM device

On 27 October 2016 at 10:06, Chris Wilson wrote: > On Thu, Oct 27, 2016 at 09:58:19AM +0200, Tomeu Vizoso wrote: >> __drm_open_driver was changed to bail out on VGEM devices unless they >> are explicitly asked for (DRIVER_VGEM). But with that change we lost >> support

[Intel-gfx] [PATCH v2.1 07/11] drm/i915: Add a atomic evasion step to watermark programming, v3.

Allow the driver to write watermarks during atomic evasion. This will make it possible to write the watermarks in a cleaner way on gen9+. intel_atomic_state is not used here yet, but will be used when we program all watermarks as a separate step during evasion. This also writes linetime all the

Re: [Intel-gfx] [PATCH] drm/i915: Correct pipe fault reporting string

On Thu, Oct 27, 2016 at 01:48:32PM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > Newline somehow ended up in the middle of the line. > > Signed-off-by: Tvrtko Ursulin Reviewed-by: Chris Wilson -Chris --

Re: [Intel-gfx] [PATCH igt] igt: drop gem_storedw_loop from BAT

On Tue, Oct 25, 2016 at 01:07:25PM +0300, Petri Latvala wrote: > Am I understanding correctly that gem folks don't object to > gem_storedw_loop being removed from BAT? Interpreting silence as a yes. Acked-by: Petri Latvala Please push this. -- Petri Latvala

Re: [Intel-gfx] [PATCH igt] igt/kms_flip: Calibrate timestamp errors

On Thu, Oct 27, 2016 at 08:43:44AM +0200, Daniel Vetter wrote: > On Wed, Oct 26, 2016 at 12:17:25PM +0300, Ville Syrjälä wrote: > > On Wed, Oct 26, 2016 at 08:18:13AM +0200, Daniel Vetter wrote: > > > On Mon, Oct 24, 2016 at 10:38:34AM +0100, Chris Wilson wrote: > > > > On Mon, Oct 24, 2016 at

Re: [Intel-gfx] [PATCH igt] igt/kms_flip: Calibrate timestamp errors

On Thu, Oct 27, 2016 at 11:29:55AM +0100, Chris Wilson wrote: > On Thu, Oct 27, 2016 at 01:13:59PM +0300, Ville Syrjälä wrote: > > On Thu, Oct 27, 2016 at 08:43:44AM +0200, Daniel Vetter wrote: > > > On Wed, Oct 26, 2016 at 12:17:25PM +0300, Ville Syrjälä wrote: > > > > On Wed, Oct 26, 2016 at

[Intel-gfx] [PATCH] drm/i915: Correct pipe fault reporting string

From: Tvrtko Ursulin Newline somehow ended up in the middle of the line. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_irq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c

[Intel-gfx] [PATCH i-g-t v2] lib: use the local intel_aub.h file

From: Emil Velikov File is provided by the libdrm_intel package which is optional. Since we already have a local copy of the file, we might as well use it ;-) v2: Move the file alongside intel_bufmgr.h and use it in the disable-intel case. Cc: Brian Starkey

[Intel-gfx] [PATCH v2.1 09/11] drm/i915/gen9+: Program watermarks as a separate step during evasion, v3.

The watermark updates for SKL style watermarks are no longer done in the plane callbacks, but are now called in a separate watermark update function that's called during the same vblank evasion, before the plane updates. This also gets rid of the global skl_results, which was required for keeping

Re: [Intel-gfx] [PATCH] drm/i915: Correct pipe fault reporting string

On Thu, Oct 27, 2016 at 01:48:32PM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > Newline somehow ended up in the middle of the line. > > Signed-off-by: Tvrtko Ursulin Reviewed-by: Ville Syrjälä >

[Intel-gfx] ✗ Fi.CI.BAT: warning for DP audio fixes (rev5)

== Series Details == Series: DP audio fixes (rev5) URL : https://patchwork.freedesktop.org/series/14314/ State : warning == Summary == Series 14314v5 DP audio fixes https://patchwork.freedesktop.org/api/1.0/series/14314/revisions/5/mbox/ Test gem_ctx_switch: Subgroup basic-default:

Re: [Intel-gfx] [PATCH igt] igt/kms_flip: Calibrate timestamp errors

On Thu, Oct 27, 2016 at 01:13:59PM +0300, Ville Syrjälä wrote: > On Thu, Oct 27, 2016 at 08:43:44AM +0200, Daniel Vetter wrote: > > On Wed, Oct 26, 2016 at 12:17:25PM +0300, Ville Syrjälä wrote: > > > On Wed, Oct 26, 2016 at 08:18:13AM +0200, Daniel Vetter wrote: > > > > On Mon, Oct 24, 2016 at

[Intel-gfx] ✗ Fi.CI.BAT: failure for Enable i915 perf stream for Haswell OA unit

== Series Details == Series: Enable i915 perf stream for Haswell OA unit URL : https://patchwork.freedesktop.org/series/14308/ State : failure == Summary == Series 14308v1 Enable i915 perf stream for Haswell OA unit https://patchwork.freedesktop.org/api/1.0/series/14308/revisions/1/mbox/

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring

== Series Details == Series: drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring URL : https://patchwork.freedesktop.org/series/14482/ State : warning == Summary == Series 14482v1 drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring

Re: [Intel-gfx] [PATCH v2 9/9] drm/i915/scheduler: Support user-defined priorities

On Thu, Oct 27, 2016 at 03:05:16PM +0100, Chris Wilson wrote: > Use a priority stored in the context as the initial value when > submitting a request. This allows us to change the default priority on a > per-context basis, allowing different contexts to be favoured with GPU > time at the expense

[Intel-gfx] [PATCH] drm/i915: Convert breadcrumbs spinlock to be irqsafe

The breadcrumbs are about to be used from within IRQ context sections, therefore we need to employ the irqsafe spinlock variants. (This is split out of the defer global seqno allocation patch due to realisation that we need a more complete conversion if we want to defer request submission even

Re: [Intel-gfx] [RFC 3/4] drm/i915/gen9: Expose top-most universal plane as cursor

Em Qua, 2016-10-26 às 15:51 -0700, Matt Roper escreveu: > Gen9 has a traditional cursor plane that is mutually exclusive with > the > system's top-most "universal" plane; it seems likely that two planes > are > really a single shared hardware unit with two different register > interfaces.  Thus

Re: [Intel-gfx] [PATCH v2 03/11] drm/i915/gen9+: Use for_each_intel_plane_on_crtc in skl_print_wm_changes

Em Qui, 2016-10-27 às 10:47 -0700, Matt Roper escreveu: > On Wed, Oct 26, 2016 at 03:41:31PM +0200, Maarten Lankhorst wrote: > > > > This will allow us to find all allocations that may have changed, > > not just the one added by the atomic state. > > > > This is required to stop adding planes to

Re: [Intel-gfx] [PATCH v2 04/11] drm/i915/skl+: Remove data_rate from watermark struct, v2.

Em Qua, 2016-10-26 às 15:41 +0200, Maarten Lankhorst escreveu: > It's only used in one function, and can be calculated without caching > it > in the global struct by using > drm_atomic_crtc_state_for_each_plane_state. > > There are loops over all planes, including planes that don't exist. > This

[Intel-gfx] Screen flicker regression on Baytrail

While testing our upcoming HDMI audio patches, I experienced pretty bad screen flicker regressions on my Baytrail compute stick. This happens with both v09-rc2 and drm-intel-nightly. A quick bisect with all the audio patches removed points to the following commit:

Re: [Intel-gfx] [PATCH v2 06/11] drm/i915/skl+: Clean up minimum allocations, v2.

Em Qua, 2016-10-26 às 15:41 +0200, Maarten Lankhorst escreveu: > Move calculating minimum allocations to a helper, which cleans up the > code some more. The cursor is still allocated in advance because it > doesn't count towards data rate and should always be reserved. > > changes since v1: > -

Re: [Intel-gfx] [PATCH v2 01/11] drm/i915/skl+: Prepare for removing data rate from skl watermark state, v2.

Em Qui, 2016-10-27 às 10:31 +0200, Maarten Lankhorst escreveu: > Op 27-10-16 om 09:12 schreef Daniel Vetter: > > > > On Wed, Oct 26, 2016 at 03:41:29PM +0200, Maarten Lankhorst wrote: > > > > > > Changes since v1: > > > - Remove plane->pipe checks, they're implied by the macros. > > > - Split

[Intel-gfx] [PULL] topic/drm-misc

Hi Dave, So the scripting work is taking a bit longer, and I didn't want to rush the migration of drm-misc right before ks and leave a mess behind, so this is still from the old repo. Pull request already again to get the s/fence/dma_fence/ stuff in and allow everyone to resync. Otherwise really

Re: [Intel-gfx] [PATCH v2 01/11] drm/i915/skl+: Prepare for removing data rate from skl watermark state, v2.

On Thu, Oct 27, 2016 at 03:48:19PM -0200, Paulo Zanoni wrote: > Em Qui, 2016-10-27 às 10:31 +0200, Maarten Lankhorst escreveu: > > Op 27-10-16 om 09:12 schreef Daniel Vetter: > > > > > > On Wed, Oct 26, 2016 at 03:41:29PM +0200, Maarten Lankhorst wrote: > > > > > > > > Changes since v1: > > > >

Re: [Intel-gfx] [RFC 3/4] drm/i915/gen9: Expose top-most universal plane as cursor

On Wed, 2016-10-26 at 15:51 -0700, Matt Roper wrote: > Gen9 has a traditional cursor plane that is mutually exclusive with > the > system's top-most "universal" plane; it seems likely that two planes > are > really a single shared hardware unit with two different register > interfaces.  Thus far

Re: [Intel-gfx] [RFC 3/4] drm/i915/gen9: Expose top-most universal plane as cursor

On Thu, 2016-10-27 at 15:35 -0700, Matt Roper wrote: > On Thu, Oct 27, 2016 at 06:15:32PM -0400, Lyude Paul wrote: > > > > On Wed, 2016-10-26 at 15:51 -0700, Matt Roper wrote: > > > > > > Gen9 has a traditional cursor plane that is mutually exclusive > > > with > > > the > > > system's top-most

Re: [Intel-gfx] [RFC 3/4] drm/i915/gen9: Expose top-most universal plane as cursor

On Thu, Oct 27, 2016 at 06:03:54PM -0200, Paulo Zanoni wrote: > Em Qua, 2016-10-26 às 15:51 -0700, Matt Roper escreveu: > > Gen9 has a traditional cursor plane that is mutually exclusive with > > the > > system's top-most "universal" plane; it seems likely that two planes > > are > > really a

Re: [Intel-gfx] [RFC 3/4] drm/i915/gen9: Expose top-most universal plane as cursor

On Thu, Oct 27, 2016 at 06:15:32PM -0400, Lyude Paul wrote: > On Wed, 2016-10-26 at 15:51 -0700, Matt Roper wrote: > > Gen9 has a traditional cursor plane that is mutually exclusive with > > the > > system's top-most "universal" plane; it seems likely that two planes > > are > > really a single

[Intel-gfx] [PATCH v8 09/12] drm/i915: Add dev.i915.perf_stream_paranoid sysctl option

Consistent with the kernel.perf_event_paranoid sysctl option that can allow non-root users to access system wide cpu metrics, this can optionally allow non-root users to access system wide OA counter metrics from Gen graphics hardware. Signed-off-by: Robert Bragg

[Intel-gfx] [PATCH v8 12/12] drm/i915: Add a kerneldoc summary for i915_perf.c

In particular this tries to capture for posterity some of the early challenges we had with using the core perf infrastructure in case we ever want to revisit adapting perf for device metrics. Cc: Chris Wilson Signed-off-by: Robert Bragg

[Intel-gfx] [PATCH v8 11/12] drm/i915: Add more Haswell OA metric sets

This adds 'compute', 'compute extended', 'memory reads', 'memory writes' and 'sampler balance' metric sets for Haswell. The code is auto generated from an XML description of metric sets, currently maintained in gputop, ref: https://github.com/rib/gputop > gputop-data/oa-*.xml >

[Intel-gfx] [PATCH v8 06/12] drm/i915: Add 'render basic' Haswell OA unit config

Adds a static OA unit, MUX + B Counter configuration for basic render metrics on Haswell. This is auto generated from an XML description of metric sets, currently maintained in gputop, ref: https://github.com/rib/gputop > gputop-data/oa-*.xml > scripts/i915-perf-kernelgen.py $ make -C

[Intel-gfx] [PATCH v8 10/12] drm/i915: add oa_event_min_timer_exponent sysctl

The minimal sampling period is now configurable via a dev.i915.oa_min_timer_exponent sysctl parameter. Following the precedent set by perf, the default is the minimum that won't (on its own) exceed the default kernel.perf_event_max_sample_rate default of 10 samples/s. Signed-off-by: Robert

[Intel-gfx] [PATCH v8 08/12] drm/i915: advertise available metrics via sysfs

Each metric set is given a sysfs entry like: /sys/class/drm/card0/metrics//id This allows userspace to enumerate the specific sets that are available for the current system. The 'id' file contains an unsigned integer that can be used to open the associated metric set via

[Intel-gfx] [PATCH v8 04/12] drm/i915: return EACCES for check_cmd() failures

check_cmd() is checking whether a command adheres to certain restrictions that ensure it's safe to execute within a privileged batch buffer. Returning false implies a privilege problem, not that the command is invalid. The distinction makes the difference between allowing the buffer to be

[Intel-gfx] Check the connector property to force a full modeset

Hi, On link training failure, I set the connector link_status property to "Bad" and send a uevent to the userspace. The userspace then detects this change in property and calls drm_mode_setcrtc that triggers a modeset. However in the driver atomic check, it calls drm_atomic_helper_check_modeset()

Re: [Intel-gfx] [PATCH v2 03/11] drm/i915/gen9+: Use for_each_intel_plane_on_crtc in skl_print_wm_changes

On Wed, Oct 26, 2016 at 03:41:31PM +0200, Maarten Lankhorst wrote: > This will allow us to find all allocations that may have changed, What is the "this" you are referring to? Ie. please don't treat the subject line as part of the commit message itself, because it's confusing. > not just the

[Intel-gfx] [PATCH v2 9/9] drm/i915/scheduler: Support user-defined priorities

Use a priority stored in the context as the initial value when submitting a request. This allows us to change the default priority on a per-context basis, allowing different contexts to be favoured with GPU time at the expense of lower importance work. The user can adjust the context's priority

[Intel-gfx] [PATCH v2 8/9] drm/i915/scheduler: Boost priorities for flips

Boost the priority of any rendering required to show the next pageflip as we want to avoid missing the vblank by being delayed by invisible workload. We prioritise avoiding jank and jitter in the GUI over starving background tasks. Signed-off-by: Chris Wilson ---

[Intel-gfx] [PATCH v2 7/9] drm/i915/scheduler: Execute requests in order of priorities

Track the priority of each request and use it to determine the order in which we submit requests to the hardware via execlists. The priority of the request is determined by the user (eventually via the context) but may be overridden at any time by the driver. When we set the priority of the

[Intel-gfx] [PATCH v2 3/9] drm/i915: Defer transfer onto execution timeline to actual hw submission

Defer the transfer from the client's timeline onto the execution timeline from the point of readiness to the point of actual submission. For example, in execlists, a request is finally submitted to hardware when the hardware is ready, and only put onto the hardware queue when the request is ready.

[Intel-gfx] [PATCH v2 5/9] drm/i915/scheduler: Signal the arrival of a new request

The start of the scheduler, add a hook into request submission for the scheduler to see the arrival of new requests and prepare its runqueues. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_drv.c | 4 drivers/gpu/drm/i915/i915_gem_request.c |

Re: [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Correct pipe fault reporting string

On 27/10/2016 14:16, Patchwork wrote: == Series Details == Series: drm/i915: Correct pipe fault reporting string URL : https://patchwork.freedesktop.org/series/14478/ State : success == Summary == Series 14478v1 drm/i915: Correct pipe fault reporting string

Re: [Intel-gfx] [PATCH v2 02/11] drm/i915/gen9+: Use cstate plane mask instead of crtc->state.

On Wed, Oct 26, 2016 at 03:41:30PM +0200, Maarten Lankhorst wrote: > I'm planning on getting rid of all obj->state dereferences, > and replace thhem with accessor functions. > Remove this one early, they're equivalent because removed > planes are already part of the state, else they could not >

[Intel-gfx] [PATCH v9] igt/gem_trtt: Exercise the TRTT hardware

From: Akash Goel This patch provides the testcase to exercise the TRTT hardware. Some platforms have an additional address translation hardware support in form of Tiled Resource Translation Table (TR-TT) which provides an extra level of abstraction over PPGTT. This is

[Intel-gfx] [PATCH igt] igt: Add a test for reordering execbufs

Signed-off-by: Chris Wilson --- lib/igt_debugfs.c | 14 ++ lib/igt_debugfs.h | 1 + tests/Makefile.sources| 1 + tests/gem_exec_schedule.c | 407 ++ 4 files changed, 423 insertions(+) create mode

[Intel-gfx] [PATCH] drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring

Since gen9 timestamp can be read from BLT ring (TIMESTAMP_BCSUNIT). Add this register to reg_read ioctl whitelist. cc=ch...@chris-wilson.co.uk cc=arkadiusz.hi...@intel.com cc=michal.winiar...@intel.com Signed-off-by: Andrzej Lawrynowicz ---

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Convert breadcrumbs spinlock to be irqsafe

== Series Details == Series: drm/i915: Convert breadcrumbs spinlock to be irqsafe URL : https://patchwork.freedesktop.org/series/14488/ State : success == Summary == Series 14488v1 drm/i915: Convert breadcrumbs spinlock to be irqsafe

Re: [Intel-gfx] [PATCH v2 03/11] drm/i915/gen9+: Use for_each_intel_plane_on_crtc in skl_print_wm_changes

On Wed, Oct 26, 2016 at 03:41:31PM +0200, Maarten Lankhorst wrote: > This will allow us to find all allocations that may have changed, > not just the one added by the atomic state. > > This is required to stop adding planes to state when its > allocation changes, and is useful for finding bugs. >

[Intel-gfx] [PATCH v8 07/12] drm/i915: Enable i915 perf stream for Haswell OA unit

Gen graphics hardware can be set up to periodically write snapshots of performance counters into a circular buffer via its Observation Architecture and this patch exposes that capability to userspace via the i915 perf interface. v2: Make sure to initialize ->specific_ctx_id when opening,

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