[Intel-gfx] [PATCH V2 5/7] ALSA: x86: hdmi: Improve position reporting

Use a hw register to calculate sub-period position reports. This makes PulseAudio happier. Signed-off-by: David Henningsson Signed-off-by: Pierre-Louis Bossart Signed-off-by: Jerome Anand ---

[Intel-gfx] [PATCH V2 3/7] ALSA: add shell for Intel HDMI LPE audio driver

On Baytrail and Cherrytrail, HDaudio may be fused out or disabled by the BIOS. This driver enables an alternate path to the i915 display registers and DMA. Although there is no hardware path between i915 display and LPE/SST audio clusters, this HDMI capability is referred to in the documentation

[Intel-gfx] [PATCH V2 2/7] drm/i915: Add support for audio driver notifications

Notifiations like mode change, hot plug and edid to the audio driver are added. This is inturn used by the audio driver for its functionality. A new interface file capturing the notifications needed by the audio driver is added Signed-off-by: Pierre-Louis Bossart

[Intel-gfx] [PATCH V2 0/7] Add support for Legacy HDMI audio drivers

Legacy (CherryTrail/ Baytrail) HDMI audio drivers added Legacy hdmi audio-Gfx interaction/ interfacing is updated to use irq chip framework Jerome Anand (7): drm/i915: setup bridge for HDMI LPE audio driver drm/i915: Add support for audio driver notifications ALSA: add shell for Intel HDMI

[Intel-gfx] [PATCH V2 1/7] drm/i915: setup bridge for HDMI LPE audio driver

Enable support for HDMI LPE audio mode on Baytrail and Cherrytrail when HDaudio controller is not detected Setup minimum required resources during i915_driver_load: 1. Create a platform device to share MMIO/IRQ resources 2. Make the platform device child of i915 device for runtime PM. 3. Create

[Intel-gfx] [PATCH V2 6/7] ALSA: x86: hdmi: Fixup some monitor

This change was given to Canonical apparently to fix an issue with on some monitor brand. It's not clear what this patch does but it doesn't seem to have side effects. Signed-off-by: David Henningsson Signed-off-by: Pierre-Louis Bossart

[Intel-gfx] [PATCH V2 7/7] ALSA: x86: hdmi: continue playback even when display resolution changes

When the display resolution changes, the drm disables the display pipes due to which audio rendering stops. At this time, we need to ensure the existing audio pointers and buffers are cleared out so that the playback can restarted once the display pipe is enabled with a different N/CTS values

[Intel-gfx] [PATCH V2 4/7] ALSA: x86: hdmi: Add audio support for BYT and CHT

Hdmi audio driver based on the child platform device created by gfx driver is implemented. This audio driver is derived from legacy intel hdmi audio driver. The interfaces for interaction between gfx and audio are updated and the driver implementation updated to derive interrupts in its own

[Intel-gfx] [PATCH 07/10] drm/i915/psr: set PSR_MASK bits for deep sleep

Program EDP_PSR_DEBUG_CTL (PSR_MASK) to enable system to go to deep sleep while in psr2.PSR2_STATUS bit 31:28 should report value 8 , if system enters deep sleep state. Also, EDP_FRAMES_BEFORE_SU_ENTRY is set 1 , if not set, flickering is observed on psr2 panel. v2: (Ilia Mirkin) - Remove

Re: [Intel-gfx] [PATCH 08/10] drm/i915/psr: enable psr2 for y cordinate panels

I was going to write the rv-b, but something came to my mind... In this case where y_cord_support but we don't have gtc yet, couldn't we enable PSR1 instead? in this case instead of return false we would do dev_priv->psr.psr2_support = false; what do you think/advise? On Fri, 2017-01-06 at

Re: [Intel-gfx] [PATCH 08/10] drm/i915/psr: enable psr2 for y cordinate panels

1) I am still not able to get psr1 working on y-cordinate panels. Only psr2 works. 2) I haven't got a GTC panel to test this scenario. Once we test psr1 on psr2 GTC panel, we could add dev_priv->psr.psr2_support = false; till GTC is implemented. -Original Message- From: Vivi,

Re: [Intel-gfx] [PATCH 08/10] drm/i915/psr: enable psr2 for y cordinate panels

On Fri, 2017-01-06 at 22:21 +0530, vathsala nagaraju wrote: > Psr2 is enabled only for y cordinate panels.Once GTC (global time code) > is implemented,this restriction is removed so that psr2 > can work on panels without y cordinate support. > > v2: (Rodrigo) > - Move the check to

[Intel-gfx] [PATCH 08/10] drm/i915/psr: enable psr2 for y cordinate panels

Psr2 is enabled only for y cordinate panels.Once GTC (global time code) is implemented,this restriction is removed so that psr2 can work on panels without y cordinate support. v2: (Rodrigo) - Move the check to intel_psr_match_conditions v3: (Rodrigo) - add return false Cc: Rodrigo Vivi

Re: [Intel-gfx] [PATCH 06/10] drm/i915/psr: set CHICKEN_TRANS for psr2

On Fri, 2017-01-06 at 21:59 +0530, vathsala nagaraju wrote: > As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15 > must be programmed. > Enable bit 12 for programmable header packet. > Enable bit 15 for Y cordinate support. > > v2: (Rodrigo) > - move CHICKEN_TRANS_EDP bit set logic right > after

Re: [Intel-gfx] [PATCH 09/10] drm/i915/psr: report live PSR2 State

Reviewed-by: Rodrigo Vivi On Fri, 2017-01-06 at 22:02 +0530, vathsala nagaraju wrote: > Reports live state of PSR2 form PSR2_STATUS register. > bit field 31:28 gives the live state of PSR2. > It can be used to check if system is in deep sleep, > selective update or

[Intel-gfx] [PATCH 06/10] drm/i915/psr: set CHICKEN_TRANS for psr2

As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15 must be programmed. Enable bit 12 for programmable header packet. Enable bit 15 for Y cordinate support. v2: (Rodrigo) - move CHICKEN_TRANS_EDP bit set logic right after setup_vsc v3:(Rodrigo) - initialize chicken_trans to CHICKEN_TRANS_BIT12 instead of

[Intel-gfx] [PATCH] drm/i915/gvt: Fix relocation of shadow bb

set_gma_to_bb_cmd() is completely bogus - it is (incorrectly) applying the rules to read a GTT offset from a command as opposed to writing the GTT offset. And to cap it all set_gma_to_bb_cmd() is called within a list iterator of the most strange construction. Fixes: be1da7070aea ("drm/i915/gvt:

Re: [Intel-gfx] [alsa-devel] [PATCH V2 2/7] drm/i915: Add support for audio driver notifications

Same here, missing fixes on agreed comments? On 1/6/17 7:21 PM, Jerome Anand wrote: Notifiations like mode change, hot plug and edid to the audio driver are added. This is inturn used by the audio driver for its functionality. A new interface file capturing the notifications needed by the

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gvt: Fix relocation of shadow bb

== Series Details == Series: drm/i915/gvt: Fix relocation of shadow bb URL : https://patchwork.freedesktop.org/series/17622/ State : success == Summary == Series 17622v1 drm/i915/gvt: Fix relocation of shadow bb https://patchwork.freedesktop.org/api/1.0/series/17622/revisions/1/mbox/

Re: [Intel-gfx] [alsa-devel] [PATCH V2 7/7] ALSA: x86: hdmi: continue playback even when display resolution changes

On 1/6/17 7:21 PM, Jerome Anand wrote: When the display resolution changes, the drm disables the display pipes due to which audio rendering stops. At this time, we need to ensure the existing audio pointers and buffers are cleared out so that the playback can restarted once the display pipe is

Re: [Intel-gfx] [alsa-devel] [PATCH V2 3/7] ALSA: add shell for Intel HDMI LPE audio driver

Minor misses here as well. On 1/6/17 7:21 PM, Jerome Anand wrote: On Baytrail and Cherrytrail, HDaudio may be fused out or disabled by the BIOS. This driver enables an alternate path to the i915 display registers and DMA. Although there is no hardware path between i915 display and LPE/SST

Re: [Intel-gfx] [alsa-devel] [PATCH V2 6/7] ALSA: x86: hdmi: Fixup some monitor

On 1/6/17 7:21 PM, Jerome Anand wrote: This change was given to Canonical apparently to fix an issue with on some monitor brand. It's not clear what this patch does but it doesn't seem to have side effects. From Takashi:please fold into the main patch and give the comments in the code

Re: [Intel-gfx] [alsa-devel] [PATCH V2 5/7] ALSA: x86: hdmi: Improve position reporting

On 1/6/17 7:21 PM, Jerome Anand wrote: Use a hw register to calculate sub-period position reports. This makes PulseAudio happier. From Takashi: There is no big merit to keep this a separate patch. Please fold into the main patch. You can put some comment in the code for explanation.

Re: [Intel-gfx] [PATCH 06/10] drm/i915/psr: set CHICKEN_TRANS for psr2

On Sat, 2017-01-07 at 00:28 +0530, vathsala nagaraju wrote: > As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15 > must be programmed. > Enable bit 12 for programmable header packet. > Enable bit 15 for Y cordinate support. > > v2: (Rodrigo) > - move CHICKEN_TRANS_EDP bit set logic right after setup_vsc

Re: [Intel-gfx] [alsa-devel] [PATCH V2 1/7] drm/i915: setup bridge for HDMI LPE audio driver

Thanks for the update Jerome. Looks like you missed a couple of agreed comments from the last round? On 1/6/17 7:21 PM, Jerome Anand wrote: Enable support for HDMI LPE audio mode on Baytrail and Cherrytrail when HDaudio controller is not detected Setup minimum required resources during

Re: [Intel-gfx] [PATCH 08/10] drm/i915/psr: enable psr2 for y cordinate panels

On Fri, 2017-01-06 at 17:55 +, Nagaraju, Vathsala wrote: > 1) I am still not able to get psr1 working on y-cordinate panels. Only psr2 > works. > 2) I haven't got a GTC panel to test this scenario. Once we test psr1 on psr2 > GTC panel, we could add dev_priv->psr.psr2_support = false; till

Re: [Intel-gfx] [PATCH 0/9] drm/i915: SKL+ render decompression support

On 17-01-04 20:42:23, Ville Syrjälä wrote: From: Ville Syrjälä This series enables the SKL+ display engine render decompression support. Some bits and pieces of the i915 code are based on work from various people, but I just put my name on it since it would be

Re: [Intel-gfx] [PATCH 4/6] drm/dp: Introduce DP MST topology manager state to track DP link bw

On Thu, 2017-01-05 at 09:24 +0100, Daniel Vetter wrote: > On Thu, Jan 05, 2017 at 03:54:54AM +, Pandiyan, Dhinakaran wrote: > > On Wed, 2017-01-04 at 19:20 +, Pandiyan, Dhinakaran wrote: > > > On Wed, 2017-01-04 at 10:33 +0100, Daniel Vetter wrote: > > > > On Tue, Jan 03, 2017 at

[Intel-gfx] [PATCH 06/10] drm/i915/psr: set CHICKEN_TRANS for psr2

As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15 must be programmed. Enable bit 12 for programmable header packet. Enable bit 15 for Y cordinate support. v2: (Rodrigo) - move CHICKEN_TRANS_EDP bit set logic right after setup_vsc v3:(Rodrigo) - initialize chicken_trans to CHICKEN_TRANS_BIT12 instead of

Re: [Intel-gfx] [alsa-devel] [PATCH V2 1/7] drm/i915: setup bridge for HDMI LPE audio driver

> -Original Message- > From: Pierre-Louis Bossart [mailto:pierre-louis.boss...@linux.intel.com] > Sent: Saturday, January 7, 2017 1:43 AM > To: Anand, Jerome ; intel- > g...@lists.freedesktop.org; alsa-de...@alsa-project.org > Cc: ti...@suse.de;

Re: [Intel-gfx] [alsa-devel] [PATCH V2 2/7] drm/i915: Add support for audio driver notifications

> -Original Message- > From: Pierre-Louis Bossart [mailto:pierre-louis.boss...@linux.intel.com] > Sent: Saturday, January 7, 2017 1:50 AM > To: Anand, Jerome ; intel- > g...@lists.freedesktop.org; alsa-de...@alsa-project.org > Cc: ti...@suse.de;

Re: [Intel-gfx] [alsa-devel] [PATCH V2 3/7] ALSA: add shell for Intel HDMI LPE audio driver

> -Original Message- > From: Pierre-Louis Bossart [mailto:pierre-louis.boss...@linux.intel.com] > Sent: Saturday, January 7, 2017 2:03 AM > To: Anand, Jerome ; intel- > g...@lists.freedesktop.org; alsa-de...@alsa-project.org > Cc: ti...@suse.de;

Re: [Intel-gfx] [alsa-devel] [PATCH V2 7/7] ALSA: x86: hdmi: continue playback even when display resolution changes

> -Original Message- > From: Pierre-Louis Bossart [mailto:pierre-louis.boss...@linux.intel.com] > Sent: Saturday, January 7, 2017 2:13 AM > To: Anand, Jerome ; intel- > g...@lists.freedesktop.org; alsa-de...@alsa-project.org > Cc: ti...@suse.de;

Re: [Intel-gfx] [alsa-devel] [PATCH V2 5/7] ALSA: x86: hdmi: Improve position reporting

> -Original Message- > From: Pierre-Louis Bossart [mailto:pierre-louis.boss...@linux.intel.com] > Sent: Saturday, January 7, 2017 2:10 AM > To: Anand, Jerome ; intel- > g...@lists.freedesktop.org; alsa-de...@alsa-project.org > Cc: ti...@suse.de;

[Intel-gfx] [drm-tip:drm-tip 476/492] include/video/vga.h:22:21: fatal error: asm/vga.h: No such file or directory

tree: git://anongit.freedesktop.org/drm/drm-tip drm-tip head: eb5c556a1e5eff388e48e4b7cf61e95783019e83 commit: 62a0d98a188cc4ebd8ea54b37d274ec20465e464 [476/492] drm: allow to use mmuless SoC config: blackfin-allyesconfig (attached as .config) compiler: bfin-uclinux-gcc (GCC) 6.2.0 reproduce:

Re: [Intel-gfx] [PATCH 1/3] dma-fence: Clear fence->status during dma_fence_init()

On Wed, Jan 04, 2017 at 09:23:34PM +0530, Sumit Semwal wrote: > Hi Chris, > > Thanks for your patches! > > On 4 January 2017 at 20:40, Daniel Vetter wrote: > > On Wed, Jan 04, 2017 at 02:12:20PM +, Chris Wilson wrote: > >> As the fence->status is an optional field that may

Re: [Intel-gfx] [PATCH 03/10] drm/i915/psr: fix blank screen issue for psr2

Rodrigo, The code is if (dev_priv->psr.psr2_support) { /* PSR2 is restricted to work with panel resolutions upto 3200x2000 */ if (crtc->config->pipe_src_w > 3200 || crtc->config->pipe_src_h > 2000)

[Intel-gfx] [PATCH i-g-t] lib: Make sure we don't use a negative offset

As bytes_read can contain an error condition under some circumstances, in which we want to error out. Signed-off-by: Tomeu Vizoso --- lib/igt_debugfs.c | 1 + 1 file changed, 1 insertion(+) diff --git a/lib/igt_debugfs.c b/lib/igt_debugfs.c index

[Intel-gfx] [drm-tip:drm-tip 500/507] warning: (DRM_RADEON && ..) selects DRM_TTM which has unmet direct dependencies (HAS_IOMEM && ..)

tree: git://anongit.freedesktop.org/drm/drm-tip drm-tip head: 88c0b7de9157d1f7824dee04d4ad04dbd9c802fb commit: 62a0d98a188cc4ebd8ea54b37d274ec20465e464 [500/507] drm: allow to use mmuless SoC config: sh-allyesconfig (attached as .config) compiler: sh4-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1

[Intel-gfx] ✓ Fi.CI.BAT: success for Add support for Legacy HDMI audio drivers (rev3)

== Series Details == Series: Add support for Legacy HDMI audio drivers (rev3) URL : https://patchwork.freedesktop.org/series/16254/ State : success == Summary == Series 16254v3 Add support for Legacy HDMI audio drivers https://patchwork.freedesktop.org/api/1.0/series/16254/revisions/3/mbox/

[Intel-gfx] [PATCH 3/3] drm/i915: Drain freed objects for mmap space exhaustion

As we now use a deferred free queue for objects, simply retiring the active objects is not enough to immediately free them and recover their mmap space - we must now also drain the freed object list. Fixes: fbbd37b36fa5 ("drm/i915: Move object release to a freelist + worker" Signed-off-by: Chris

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Drain freed objects for mmap space exhaustion

On 06/01/2017 15:22, Chris Wilson wrote: As we now use a deferred free queue for objects, simply retiring the active objects is not enough to immediately free them and recover their mmap space - we must now also drain the freed object list. Fixes: fbbd37b36fa5 ("drm/i915: Move object release

Re: [Intel-gfx] [PATCH 02/10] drm/i915: Convert i915_ggtt_view to use an anonymous union

On 06/01/2017 15:25, Chris Wilson wrote: Save a lot of characters by making the union anonymous, with the side-effect of ignoring unset bits when comparing views. I'll just repeat for the record, since the earlier discussion was on the trybot list. I think the anonymizing of the union

[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/5] drm/i915: Consolidate checks for memcpy-from-wc support

== Series Details == Series: series starting with [1/5] drm/i915: Consolidate checks for memcpy-from-wc support URL : https://patchwork.freedesktop.org/series/17600/ State : warning == Summary == Series 17600v1 Series without cover letter

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Drain freed objects for mmap space exhaustion

On 06/01/2017 15:44, Chris Wilson wrote: On Fri, Jan 06, 2017 at 03:33:10PM +, Tvrtko Ursulin wrote: On 06/01/2017 15:22, Chris Wilson wrote: As we now use a deferred free queue for objects, simply retiring the active objects is not enough to immediately free them and recover their mmap

[Intel-gfx] [PATCH 2/3] drm/i915: Purge loose pages if we run out of DMA remap space

If the DMA remap fails, one cause can be that we have too many objects pinned in a small remapping table, such as swiotlb. (DMA remapping does not trigger the shrinker by itself on its normal failure paths.) So try purging all other objects (using i915_gem_shrink_all(), sparing our own pages as

[Intel-gfx] [PATCH 1/3] drm/i915: Fix phys pwrite for struct_mutex-less operation

Since commit fe115628d567 ("drm/i915: Implement pwrite without struct-mutex") the lowlevel pwrite calls are now called without the protection of struct_mutex, but pwrite_phys was still asserting that it held the struct_mutex and later tried to drop and relock it. Fixes: fe115628d567 ("drm/i915:

[Intel-gfx] [PATCH 05/10] drm/i915: Extact compute_partial_view()

In order to reuse the partial view for selftesting, extract the common function for computing the view. Signed-off-by: Chris Wilson Reviewed-by: Joonas Lahtinen --- drivers/gpu/drm/i915/i915_gem.c | 49

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Drain freed objects for mmap space exhaustion

On Fri, Jan 06, 2017 at 03:33:10PM +, Tvrtko Ursulin wrote: > > On 06/01/2017 15:22, Chris Wilson wrote: > >As we now use a deferred free queue for objects, simply retiring the > >active objects is not enough to immediately free them and recover their > >mmap space - we must now also drain

[Intel-gfx] [PATCH 3/5] drm/i915: Use fixed-sized types for stolen

Stolen memory is a hardware resource of known size, so use an accurate fixed integer type rather than the ambiguous variable size_t. This was motivated by the next patch spotting inconsistencies in our types. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin

[Intel-gfx] [PATCH 5/5] drm/i915: Simplify testing for am-I-the-kernel-context?

The kernel context (dev_priv->kernel_context) is unique in that it is not associated with any user filp - it is the only one with ctx->file_priv == NULL. This is a simpler test than comparing it against dev_priv->kernel_context which involves some pointer dancing. In checking that this is true,

[Intel-gfx] [PATCH 4/5] drm/i915: Use range_overflows()

Replace a few more open-coded overflow checks with the macro. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_gem_stolen.c | 2 +- drivers/gpu/drm/i915/i915_vma.c| 3 ++-

[Intel-gfx] [PATCH 2/5] drm/i915: Use phys_addr_t for the address of stolen memory

Though we know the hw is limited to keeping stolen memory inside the first 4GiB, it is clearer to the reader that we are handling physical address if we use phys_addr_t to refer to the base of stolen memory. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin

[Intel-gfx] [PATCH 1/5] drm/i915: Consolidate checks for memcpy-from-wc support

In order to silence sparse: ../drivers/gpu/drm/i915/i915_gpu_error.c:200:39: warning: Using plain integer as NULL pointer add a helper to check whether we have sse4.1 and that the desired alignment is valid for acceleration. v2: Explain the macros and split the two use cases between

[Intel-gfx] [PATCH 01/10] drm/i915: Pack the partial view size and offset into a single u64

Since the partial offset must be page aligned, we can use those low 12 bits to encode the size of the partial view (which then cannot be larger than 8MiB in pages). Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem.c | 22 +-

[Intel-gfx] [PATCH 10/10] drm/i915: Remove the rounding down of the gen4+ fence region

Restricting the fence to the end of the previous tile-row breaks access to the final portion of the object. On gen2/3 we employed lazy fencing to pad out the fence with scratch page to provide access to the tail, and now we also pad out the object on gen4+ we can apply the same fix. Fixes:

[Intel-gfx] [PATCH 03/10] drm/i915: Eliminate superfluous i915_ggtt_view_rotated

It is only being used to clear a struct and set the type, after which it is overwritten. Since we no longer check the unset bits of the union, skipping the clear is permissible. Signed-off-by: Chris Wilson Reviewed-by: Joonas Lahtinen

[Intel-gfx] [PATCH 09/10] drm/i915: Store required fence size/alignment for GGTT vma

Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_drv.h | 7 ++-- drivers/gpu/drm/i915/i915_gem.c | 27 +- drivers/gpu/drm/i915/i915_gem_fence_reg.c | 16 drivers/gpu/drm/i915/i915_gem_tiling.c| 36 ++

[Intel-gfx] [PATCH 02/10] drm/i915: Convert i915_ggtt_view to use an anonymous union

Save a lot of characters by making the union anonymous, with the side-effect of ignoring unset bits when comparing views. v2: Roll up the memcmps back into one. v3: And split again as Ville points out we can't trust the compiler. Signed-off-by: Chris Wilson Cc: Daniel

[Intel-gfx] [PATCH 08/10] drm/i915: Replace WARNs in fence register writes with extensive asserts

All of these conditions are prechecked by i915_tiling_ok() before we allow setting the tiling/stride on the object and so we should never fail asserting those conditions before writing the register. Signed-off-by: Chris Wilson ---

[Intel-gfx] [PATCH 07/10] drm/i915: Align GGTT sizes to a fence tile row

Ensure the view occupies the full tile row so that reads/writes into the VMA do not escape (via fenced detiling) into neighbouring objects - we will pad the object with scratch pages to satisfy the fence. This applies the lazy-tiling we employed on gen2/3 to gen4+. Signed-off-by: Chris Wilson

[Intel-gfx] [PATCH 04/10] drm/i915: Eliminate superfluous i915_ggtt_view_normal

Since commit 058d88c4330f ("drm/i915: Track pinned VMA"), there is only one user of i915_ggtt_view_normal rodate. Just treat NULL as no special view in pin_to_display() like everywhere else. Signed-off-by: Chris Wilson Reviewed-by: Joonas Lahtinen

[Intel-gfx] [PATCH 06/10] drm/i915: Clip the partial view against the object not vma

The VMA is later clipped against the vm_area_struct before insertion of the faulting PTE so we are free to create the partial view as we desire. If we use the object as the extents rather than the area, this partial can then be used for other areas. Signed-off-by: Chris Wilson

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Fix phys pwrite for struct_mutex-less operation

== Series Details == Series: series starting with [1/3] drm/i915: Fix phys pwrite for struct_mutex-less operation URL : https://patchwork.freedesktop.org/series/17601/ State : success == Summary == Series 17601v1 Series without cover letter

[Intel-gfx] [GIT PULL] VFIO fixes for v4.10-rc3

Hi Linus, This pull request has a merge conflict and requires a build fix with kvmgt (merged in ed40875), which is a consumer of the new vfio-mdev work. Stephen Rothwell has fixed both of these correctly for linux-next as documented here: merge conflict:

[Intel-gfx] [PATCH 06/10] drm/i915/psr: set CHICKEN_TRANS for psr2

As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15 must be programmed. Enable bit 12 for programmable header packet. Enable bit 15 for Y cordinate support. v2: (Rodrigo) - move CHICKEN_TRANS_EDP bit set logic right after setup_vsc Cc: Rodrigo Vivi Cc: Jim Bride

[Intel-gfx] [PATCH 07/10] drm/i915/psr: set PSR_MASK bits for deep sleep

Program EDP_PSR_DEBUG_CTL (PSR_MASK) to enable system to go to deep sleep while in psr2.PSR2_STATUS bit 31:28 should report value 8 , if system enters deep sleep state. Also, EDP_FRAMES_BEFORE_SU_ENTRY is set 1 , if not set, flickering is observed on psr2 panel. v2: (Ilia Mirkin) - Remove

[Intel-gfx] [PATCH 08/10] drm/i915/psr: enable psr2 for y cordinate panels

Psr2 is enabled only for y cordinate panels.Once GTC (global time code) is implemented,this restriction is removed so that psr2 can work on panels without y cordinate support. v2: (Rodrigo) - Move the check to intel_psr_match_conditions Cc: Rodrigo Vivi Cc: Jim Bride

[Intel-gfx] [PATCH 09/10] drm/i915/psr: report live PSR2 State

Reports live state of PSR2 form PSR2_STATUS register. bit field 31:28 gives the live state of PSR2. It can be used to check if system is in deep sleep, selective update or selective update standby. During video play back, we can use this to check if system is entering SU mode or not. when system

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Fix phys pwrite for struct_mutex-less operation

On 06/01/2017 15:22, Chris Wilson wrote: Since commit fe115628d567 ("drm/i915: Implement pwrite without struct-mutex") the lowlevel pwrite calls are now called without the protection of struct_mutex, but pwrite_phys was still asserting that it held the struct_mutex and later tried to drop and

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Fix phys pwrite for struct_mutex-less operation

On Fri, Jan 06, 2017 at 04:04:44PM +, Tvrtko Ursulin wrote: > > On 06/01/2017 15:22, Chris Wilson wrote: > >Since commit fe115628d567 ("drm/i915: Implement pwrite without > >struct-mutex") the lowlevel pwrite calls are now called without the > >protection of struct_mutex, but pwrite_phys was

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Fix phys pwrite for struct_mutex-less operation

On 06/01/2017 16:24, Chris Wilson wrote: On Fri, Jan 06, 2017 at 04:04:44PM +, Tvrtko Ursulin wrote: On 06/01/2017 15:22, Chris Wilson wrote: Since commit fe115628d567 ("drm/i915: Implement pwrite without struct-mutex") the lowlevel pwrite calls are now called without the protection of

[Intel-gfx] [PATCH 08/10] drm/i915/psr: enable psr2 for y cordinate panels

Psr2 is enabled only for y cordinate panels.Once GTC (global time code) is implemented,this restriction is removed so that psr2 can work on panels without y cordinate support. v2: (Rodrigo) - Move the check to intel_psr_match_conditions Cc: Rodrigo Vivi Cc: Jim Bride