Re: [Intel-gfx] [PATCH v3] drm/i915/scheduler: emulate a scheduler for guc

On 11/01/2017 16:11, Chris Wilson wrote: This emulates execlists on top of the GuC in order to defer submission of requests to the hardware. This deferral allows time for high priority requests to gazump their way to the head of the queue, however it nerfs the GuC by converting it back into a

[Intel-gfx] GPU hang with kernel 4.10rc3

With kernel 4.10rc3 running as Xen dm0 I get at each boot: [ 49.213697] [drm] GPU HANG: ecode 7:0:0x3d1d3d3d, in gnome-shell [1431], reason: Hang on render ring, action: reset [ 49.213699] [drm] GPU hangs can indicate a bug anywhere in the entire gfx stack, including userspace. [ 49.213700]

Re: [Intel-gfx] GPU hang with kernel 4.10rc3

On Wed, Jan 11, 2017 at 05:33:34PM +0100, Juergen Gross wrote: > With kernel 4.10rc3 running as Xen dm0 I get at each boot: > > [ 49.213697] [drm] GPU HANG: ecode 7:0:0x3d1d3d3d, in gnome-shell > [1431], reason: Hang on render ring, action: reset > [ 49.213699] [drm] GPU hangs can indicate a

[Intel-gfx] [drm-intel:for-linux-next 2/4] htmldocs: drivers/gpu/drm/i915/i915_gem_gtt.c:3586: warning: No description found for parameter 'offset'

tree: git://anongit.freedesktop.org/drm-intel for-linux-next head: c781c978e784c50dcd7cb312fe17f5281923f55b commit: 625d988acc28f3fe1d44f3798426561c17387a59 [2/4] drm/i915: Extract reserving space in the GTT to a helper reproduce: make htmldocs All warnings (new ones prefixed by >>):

Re: [Intel-gfx] [RFCv2 01/19] drm/i915: Provide a hook for selftests

On 20/12/2016 13:07, Chris Wilson wrote: Some pieces of code are independent of hardware but are very tricky to exercise through the normal userspace ABI or via debugfs hooks. Being able to create mock unit tests and execute them through CI is vital. Start by adding a central point where we can

[Intel-gfx] [PATCH] drm/i915: Detect vma reserved for execbuf in evict-for-node

The vma->exec_list is still the only means we have for both reserving an object in execbuf, and for constructing the eviction list. So during the construction of the eviction list, we must treat anything already on the exec_list as being pinned. Yes, this sharing of two semantically different

Re: [Intel-gfx] [RFCv2 14/19] drm/i915: Move uncore selfchecks to live selftest infrastructure

On 20 December 2016 at 13:08, Chris Wilson wrote: > Now that the kselftest infrastructure exists, put it to use and add to > it the existing consistency checks on the fw register lookup tables. > > v2: s/tabke/table/ > > Signed-off-by: Chris Wilson

Re: [Intel-gfx] [RFCv2 15/19] drm/i915: Test all fw tables during mock selftests

On 20 December 2016 at 13:08, Chris Wilson wrote: > In addition to just testing the fw table we load, during the initial > mock testing we can test that all tables are valid (so the testing is > not limited to just the platforms that load that particular table). > >

Re: [Intel-gfx] [RFCv2 16/19] drm/i915: Sanity check all registers for matching fw domains

On 20 December 2016 at 13:08, Chris Wilson wrote: > Add a late selftest that walks over all forcewake registers (those below > 0x4) and checks intel_uncore_forcewake_for_reg() that the look > exists and we having the matching powerwells. > > Signed-off-by: Chris

Re: [Intel-gfx] [RFCv2 01/19] drm/i915: Provide a hook for selftests

On Wed, Jan 11, 2017 at 06:17:48PM +, Tvrtko Ursulin wrote: > On 20/12/2016 13:07, Chris Wilson wrote: > >@@ -522,6 +534,11 @@ static struct pci_driver i915_pci_driver = { > > static int __init i915_init(void) > > { > > bool use_kms = true; > >+int err; > >+ > >+err =

Re: [Intel-gfx] [RFCv2 16/19] drm/i915: Sanity check all registers for matching fw domains

On Wed, Jan 11, 2017 at 06:25:59PM +, Matthew Auld wrote: > On 20 December 2016 at 13:08, Chris Wilson wrote: > > + for_each_set_bit(offset, valid, FW_RANGE) { > > + i915_reg_t reg = { offset }; > > + > > +

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/edid: Improve RGB limited range handling a bit (rev2)

== Series Details == Series: drm/edid: Improve RGB limited range handling a bit (rev2) URL : https://patchwork.freedesktop.org/series/17825/ State : success == Summary == Series 17825v2 drm/edid: Improve RGB limited range handling a bit

Re: [Intel-gfx] [RFCv2 16/19] drm/i915: Sanity check all registers for matching fw domains

On 20 December 2016 at 13:08, Chris Wilson wrote: > Add a late selftest that walks over all forcewake registers (those below > 0x4) and checks intel_uncore_forcewake_for_reg() that the look I don't see where we use intel_uncore_forcewake_for_reg() ? look ? > exists

[Intel-gfx] [PATCH] drm/i915/bxt: Add MST support when do DPLL calculation

From: "Lee, Shawn C" Kernel oops was trigger by DP MST monitor/hub connected. DP MST series patch already upstream and MST should be support also. MST monitor will display normally with this change on bxt platform. Cc: Jani Nikula Reviewed-by:

Re: [Intel-gfx] [PATCH v2 1/3] drm/i915: Use the MRU stack search after evicting

On ke, 2017-01-11 at 11:23 +, Chris Wilson wrote: > When we evict from the GTT to make room for an object, the hole we > create is put onto the MRU stack inside the drm_mm range manager. On the > next search pass, we can speed up a PIN_HIGH allocation by referencing > that stack for the new

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/3] drm/i915: Use the MRU stack search after evicting

== Series Details == Series: series starting with [v2,1/3] drm/i915: Use the MRU stack search after evicting URL : https://patchwork.freedesktop.org/series/17822/ State : success == Summary == Series 17822v1 Series without cover letter

[Intel-gfx] [PATCH v4] lib/scatterlist: Avoid potential scatterlist entry overflow

From: Tvrtko Ursulin Since the scatterlist length field is an unsigned int, make sure that sg_alloc_table_from_pages does not overflow it while coallescing pages to a single entry. v2: Drop reference to future use. Use UINT_MAX. v3: max_segment must be page aligned.

[Intel-gfx] [PATCH v5] lib/scatterlist: Introduce and export __sg_alloc_table_from_pages

From: Tvrtko Ursulin Drivers like i915 benefit from being able to control the maxium size of the sg coallesced segment while building the scatter- gather list. Introduce and export the __sg_alloc_table_from_pages function which will allow it that control. v2: Reorder

[Intel-gfx] [PATCH v6] drm/i915: Use __sg_alloc_table_from_pages for userptr allocations

From: Tvrtko Ursulin With the addition of __sg_alloc_table_from_pages we can control the maximum coallescing size and eliminate a separate path for allocating backing store here. Similar to 871dfbd67d4e ("drm/i915: Allow compaction upto SWIOTLB max segment size") this

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Prefer random replacement before eviction search

On Wed, Jan 11, 2017 at 09:47:41AM +0200, Joonas Lahtinen wrote: > On ti, 2017-01-10 at 21:55 +, Chris Wilson wrote: > > Performing an eviction search can be very, very slow especially for a > > range restricted replacement. For example, a workload like > > gem_concurrent_blit will populate

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] lib/scatterlist: Fix offset type in sg_alloc_table_from_pages

== Series Details == Series: series starting with [1/4] lib/scatterlist: Fix offset type in sg_alloc_table_from_pages URL : https://patchwork.freedesktop.org/series/17816/ State : success == Summary == Series 17816v1 Series without cover letter

[Intel-gfx] [PATCH] drm/i915: Prefer random replacement before eviction search

Performing an eviction search can be very, very slow especially for a range restricted replacement. For example, a workload like gem_concurrent_blit will populate the entire GTT and then cause aperture thrashing. Since the GTT is a mix of active and inactive tiny objects, we have to search through

[Intel-gfx] [PATCH v3] drm/i915: Prefer random replacement before eviction search

Performing an eviction search can be very, very slow especially for a range restricted replacement. For example, a workload like gem_concurrent_blit will populate the entire GTT and then cause aperture thrashing. Since the GTT is a mix of active and inactive tiny objects, we have to search through

Re: [Intel-gfx] [alsa-devel] [PATCH v4 0/3] support DP MST audio

On Wed, 11 Jan 2017 08:39:13 +0100, Daniel Vetter wrote: > > On Tue, Jan 10, 2017 at 9:49 AM, Takashi Iwai wrote: > > On Tue, 10 Jan 2017 09:45:31 +0100, > >> >-Original Message- > >> >From: Takashi Iwai [mailto:ti...@suse.de] > >> >Sent: Tuesday, January 10, 2017 4:19 PM

Re: [Intel-gfx] [PATCHv2] drm/i915: Remove WaDisableLSQCROPERFforOCL KBL workaround.

On Mon, Jan 09, 2017 at 01:07:56PM -0800, Francisco Jerez wrote: > The WaDisableLSQCROPERFforOCL workaround has the side effect of > disabling an L3SQ optimization that has huge performance implications > and is unlikely to be necessary for the correct functioning of usual > graphic workloads.

Re: [Intel-gfx] [alsa-devel] [PATCH v4 0/3] support DP MST audio

Hi Daniel, OK, I will resend the patches tomorrow. Thanks. Hi Takashi, In case you still need the patches for i915, it is on git://anongit.freedesktop.org/drm-tip:drm-tip My patches are: commit 9a148a96fc3a654ddcf142a7ab7db37b972ba5d8 drm/i915/debugfs: add dp mst info commit

[Intel-gfx] [PATCH] drm/probe-helpers: Drop locking from poll_enable

It was only needed to protect the connector_list walking, see commit 8c4ccc4ab6f64e859d4ff8d7c02c2ed2e956e07f Author: Daniel Vetter Date: Thu Jul 9 23:44:26 2015 +0200 drm/probe-helper: Grab mode_config.mutex in poll_init/enable Unfortunately the commit message of

[Intel-gfx] [PATCH 3/4] lib/scatterlist: Introduce and export __sg_alloc_table_from_pages

From: Tvrtko Ursulin Drivers like i915 benefit from being able to control the maxium size of the sg coallesced segment while building the scatter- gather list. Introduce and export the __sg_alloc_table_from_pages function which will allow it that control. v2: Reorder

[Intel-gfx] [PATCH 4/4] drm/i915: Use __sg_alloc_table_from_pages for userptr allocations

From: Tvrtko Ursulin With the addition of __sg_alloc_table_from_pages we can control the maximum coallescing size and eliminate a separate path for allocating backing store here. Similar to 871dfbd67d4e ("drm/i915: Allow compaction upto SWIOTLB max segment size") this

[Intel-gfx] [PATCH 2/4] lib/scatterlist: Avoid potential scatterlist entry overflow

From: Tvrtko Ursulin Since the scatterlist length field is an unsigned int, make sure that sg_alloc_table_from_pages does not overflow it while coallescing pages to a single entry. v2: Drop reference to future use. Use UINT_MAX. v3: max_segment must be page aligned.

[Intel-gfx] [PATCH 1/4] lib/scatterlist: Fix offset type in sg_alloc_table_from_pages

From: Tvrtko Ursulin Scatterlist entries have an unsigned int for the offset so correct the sg_alloc_table_from_pages function accordingly. Since these are offsets withing a page, unsigned int is wide enough. Also converts callers which were using unsigned long

Re: [Intel-gfx] [PATCH 4/6] drm/dp: Introduce DP MST topology manager state to track DP link bw

On Sat, Jan 07, 2017 at 12:35:36AM +, Pandiyan, Dhinakaran wrote: > On Thu, 2017-01-05 at 09:24 +0100, Daniel Vetter wrote: > > On Thu, Jan 05, 2017 at 03:54:54AM +, Pandiyan, Dhinakaran wrote: > > > On Wed, 2017-01-04 at 19:20 +, Pandiyan, Dhinakaran wrote: > > > > On Wed, 2017-01-04

Re: [Intel-gfx] [PATCH] [RFC i-g-t] Test Design to verify mipi enable/disable sequence.

On Mon, Jan 09, 2017 at 11:00:02AM +0200, Jani Nikula wrote: > On Sat, 07 Jan 2017, Yadav Jyoti wrote: > > From: Jenkins Val > > > > This place here is for the commit message, where you should explain > *why* we need this change. > > Where do you get

Re: [Intel-gfx] [alsa-devel] [PATCH v4 0/3] support DP MST audio

On Wed, Jan 11, 2017 at 09:00:27AM +0100, Takashi Iwai wrote: > On Wed, 11 Jan 2017 08:39:13 +0100, > Daniel Vetter wrote: > > > > On Tue, Jan 10, 2017 at 9:49 AM, Takashi Iwai wrote: > > > On Tue, 10 Jan 2017 09:45:31 +0100, > > >> >-Original Message- > > >> >From:

Re: [Intel-gfx] [PATCH] drm/i915/bxt: Add MST support when do DPLL calculation

On Wed, 11 Jan 2017, "Lee, Shawn C" wrote: > From: "Lee, Shawn C" > > Kernel oops was trigger by DP MST monitor/hub connected. Copy paste the oops to the commit message please. It's *much* easier to match bug reports and fixes this way. There's

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915/bxt: Add MST support when do DPLL calculation

== Series Details == Series: drm/i915/bxt: Add MST support when do DPLL calculation URL : https://patchwork.freedesktop.org/series/17815/ State : warning == Summary == Series 17815v1 drm/i915/bxt: Add MST support when do DPLL calculation

[Intel-gfx] [PATCH 1/5] drm/edid: Have drm_edid.h include hdmi.h

From: Ville Syrjälä drm_edid.h depends on hdmi.h on account of enum hdmi_picture_aspect, so let's just include hdmi.h and drop some useless struct declarations. Signed-off-by: Ville Syrjälä --- include/drm/drm_edid.h | 3 +-- 1

[Intel-gfx] [PATCH 0/5] drm/edid: Improve RGB limited range handling a bit

From: Ville Syrjälä While reading the HDMI 2.0 spec I noticed some new things related to the RGB quantization range stuff, and after cross checking with CEA-861-F I spotted a some other things as well. So I figured I should pimp up the code a bit. And since we now

[Intel-gfx] [PATCH 1/3] drm/i915: Invalidate the guc ggtt TLB upon insertion

Move the GuC invalidation of its ggtt TLB to where we perform the ggtt modification rather than proliferate it into all the callers of the insert (which may or may not in fact have to do the insertion). v2: Just do the guc invalidate unconditionally, (afaict) it has no impact without the guc

[Intel-gfx] [PATCH 2/3] drm/i915/scheduler: emulate a scheduler for guc

This emulates execlists on top of the GuC in order to defer submission of requests to the hardware. This deferral allows time for high priority requests to gazump their way to the head of the queue, however it nerfs the GuC by converting it back into a simple execlist (where the CPU has to wake up

[Intel-gfx] [PATCH 3/3] HAX enable guc submission for CI

--- drivers/gpu/drm/i915/i915_params.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c index 0e280fbd52f1..1d3766cfc837 100644 --- a/drivers/gpu/drm/i915/i915_params.c +++

Re: [Intel-gfx] [PATCHv2] drm/i915: Remove WaDisableLSQCROPERFforOCL KBL workaround.

Daniel Vetter writes: > On Mon, Jan 09, 2017 at 01:07:56PM -0800, Francisco Jerez wrote: >> The WaDisableLSQCROPERFforOCL workaround has the side effect of >> disabling an L3SQ optimization that has huge performance implications >> and is unlikely to be necessary for the correct

[Intel-gfx] [PATCH] drm/i915: Suppress switch_mm emission between the same aliasing_ppgtt

When switching between contexts using the aliasing_ppgtt, the VM is shared. We don't need to reload the PD registers unless they are dirty. Martin Peres reported an issue that looks like corruption between Haswell context switches, bisecting to commit f9326be5f1d3 ("drm/i915: Rearrange

Re: [Intel-gfx] [PATCH v2 1/3] drm/i915: Use the MRU stack search after evicting

On Wed, Jan 11, 2017 at 02:04:53PM +0200, Joonas Lahtinen wrote: > On ke, 2017-01-11 at 11:23 +, Chris Wilson wrote: > > When we evict from the GTT to make room for an object, the hole we > > create is put onto the MRU stack inside the drm_mm range manager. On the > > next search pass, we can

Re: [Intel-gfx] [PATCHv2] drm/i915: Remove WaDisableLSQCROPERFforOCL KBL workaround.

On Wed, Jan 11, 2017 at 02:07:37PM +0200, Mika Kuoppala wrote: > Daniel Vetter writes: > > > On Mon, Jan 09, 2017 at 01:07:56PM -0800, Francisco Jerez wrote: > >> The WaDisableLSQCROPERFforOCL workaround has the side effect of > >> disabling an L3SQ optimization that has huge

Re: [Intel-gfx] [PATCHv2] drm/i915: Remove WaDisableLSQCROPERFforOCL KBL workaround.

Chris Wilson writes: > On Wed, Jan 11, 2017 at 02:07:37PM +0200, Mika Kuoppala wrote: >> Daniel Vetter writes: >> >> > On Mon, Jan 09, 2017 at 01:07:56PM -0800, Francisco Jerez wrote: >> >> The WaDisableLSQCROPERFforOCL workaround has the side effect

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Suppress switch_mm emission between the same aliasing_ppgtt

== Series Details == Series: drm/i915: Suppress switch_mm emission between the same aliasing_ppgtt URL : https://patchwork.freedesktop.org/series/17823/ State : failure == Summary == Series 17823v1 drm/i915: Suppress switch_mm emission between the same aliasing_ppgtt

[Intel-gfx] [PATCH 2/5] drm/edid: Introduce drm_default_rgb_quant_range()

From: Ville Syrjälä Make the code selecting the RGB quantization range a little less magicy by wrapping it up in a small helper. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/drm_edid.c| 18 ++

[Intel-gfx] [PATCH 5/5] drm/edid: Set YQ bits in the AVI infoframe according to CEA-861-F

From: Ville Syrjälä CEA-861-F tells us: "When transmitting any RGB colorimetry, the Source should set the YQ-field to match the RGB Quantization Range being transmitted (e.g., when Limited Range RGB, set YQ=0 or when Full Range RGB, set YQ=1) and the Sink shall

[Intel-gfx] [PATCH 3/5] drm/edid: Introduce drm_hdmi_avi_infoframe_quant_range()

From: Ville Syrjälä Pull the logic to populate the quantization range information in the AVI infoframe into a small helper. We'll be adding a bit more logic to it, and having it in a central place seems like a good idea since it's based on the CEA-861 spec.

[Intel-gfx] [PATCH 4/5] drm/edid: Set AVI infoframe Q even when QS=0

From: Ville Syrjälä HDMI 2.0 recommends that we set the Q bits in the AVI infoframe even when the sink does not support quantization range selection (QS=0). According to CEA-861 we can do that as long as the Q we send matches the default quantization range for the

Re: [Intel-gfx] [PATCH] drm/i915: Suppress switch_mm emission between the same aliasing_ppgtt

On ke, 2017-01-11 at 12:14 +, Chris Wilson wrote: > When switching between contexts using the aliasing_ppgtt, the VM is > shared. We don't need to reload the PD registers unless they are dirty. > > Martin Peres reported an issue that looks like corruption between > Haswell context switches,

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Suppress switch_mm emission between the same aliasing_ppgtt

On Wed, Jan 11, 2017 at 12:56:03PM -, Patchwork wrote: > == Series Details == > > Series: drm/i915: Suppress switch_mm emission between the same aliasing_ppgtt > URL : https://patchwork.freedesktop.org/series/17823/ > State : failure > > == Summary == > > Series 17823v1 drm/i915: Suppress

[Intel-gfx] [PATCH] drm/i915/huc: Add HuC fw loading support

The HuC loading process is similar to GuC. The intel_uc_fw_fetch() is used for both cases. HuC loading needs to be before GuC loading. The WOPCM setting must be done early before loading any of them. v2: rebased on-top of drm-intel-nightly. removed if(HAS_GUC()) before the guc call.

Re: [Intel-gfx] [PATCHv2] drm/i915: Remove WaDisableLSQCROPERFforOCL KBL workaround.

On Wed, Jan 11, 2017 at 12:24:59PM +, Chris Wilson wrote: > On Wed, Jan 11, 2017 at 02:07:37PM +0200, Mika Kuoppala wrote: > > Daniel Vetter writes: > > > > > On Mon, Jan 09, 2017 at 01:07:56PM -0800, Francisco Jerez wrote: > > >> The WaDisableLSQCROPERFforOCL workaround has

[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/3] drm/i915: Use the MRU stack search after evicting (rev3)

== Series Details == Series: series starting with [1/3] drm/i915: Use the MRU stack search after evicting (rev3) URL : https://patchwork.freedesktop.org/series/17784/ State : warning == Summary == Series 17784v3 Series without cover letter

[Intel-gfx] [PATCH v2 2/3] drm/i915: Extract reserving space in the GTT to a helper

Extract drm_mm_reserve_node + calling i915_gem_evict_for_node into its own routine so that it can be shared rather than duplicated. v2: Kerneldoc Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Cc: igvt-g-...@lists.01.org Reviewed-by:

[Intel-gfx] [PATCH v2 1/3] drm/i915: Use the MRU stack search after evicting

When we evict from the GTT to make room for an object, the hole we create is put onto the MRU stack inside the drm_mm range manager. On the next search pass, we can speed up a PIN_HIGH allocation by referencing that stack for the new hole. v2: Pull together the 3 identical implements (ahem, a

[Intel-gfx] [PATCH v2 3/3] drm/i915: Prefer random replacement before eviction search

Performing an eviction search can be very, very slow especially for a range restricted replacement. For example, a workload like gem_concurrent_blit will populate the entire GTT and then cause aperture thrashing. Since the GTT is a mix of active and inactive tiny objects, we have to search through

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915/guc: Make sure vma containing firmware is GuC mappable

== Series Details == Series: drm/i915/guc: Make sure vma containing firmware is GuC mappable URL : https://patchwork.freedesktop.org/series/17836/ State : warning == Summary == Series 17836v1 drm/i915/guc: Make sure vma containing firmware is GuC mappable

[Intel-gfx] [PATCH] dim: Update docs

- Remove branch overview, instead link to drm-intel and drm-misc pages. - Move quickstart to the top, to make it easier to find. - Make quickstart generic, we use dim for other stuff than drm-intel now. - s/drm-intel-rerere/drm-rerere/ - Remove the section about resolving conflicts, that's

[Intel-gfx] [PATCH i-g-t rfc 26/29] tests/kms_sink_crc_basic: Add support for dynamic number of planes

Add changes reflecting the new support for dynamic number of planes per pipe. Signed-off-by: Robert Foss --- tests/kms_sink_crc_basic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/kms_sink_crc_basic.c b/tests/kms_sink_crc_basic.c index

[Intel-gfx] [PATCH i-g-t rfc 28/29] tests/kms_vblank: Add support for dynamic number of planes

Add changes reflecting the new support for dynamic number of planes per pipe. Signed-off-by: Robert Foss --- tests/kms_vblank.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tests/kms_vblank.c b/tests/kms_vblank.c index 9bc49296..73b3b2ad

[Intel-gfx] [PATCH i-g-t rfc 27/29] tests/kms_universal_plane: Add support for dynamic number of planes

Add changes reflecting the new support for dynamic number of planes per pipe. Signed-off-by: Robert Foss --- tests/kms_universal_plane.c | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/tests/kms_universal_plane.c

[Intel-gfx] [PATCH i-g-t rfc 25/29] tests/kms_rotation_crc: Add support for dynamic number of planes

Add changes reflecting the new support for dynamic number of planes per pipe. Signed-off-by: Robert Foss --- tests/kms_rotation_crc.c | 63 1 file changed, 32 insertions(+), 31 deletions(-) diff --git

[Intel-gfx] [PATCH i-g-t rfc 29/29] tests/prime_mmap_kms: Add support for dynamic number of planes

Add changes reflecting the new support for dynamic number of planes per pipe. Signed-off-by: Robert Foss --- tests/prime_mmap_kms.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/prime_mmap_kms.c b/tests/prime_mmap_kms.c index

[Intel-gfx] [PATCH i-g-t rfc 16/29] tests/kms_panel_fitting: Add support for dynamic number of planes

Add changes reflecting the new support for dynamic number of planes per pipe. Signed-off-by: Robert Foss --- tests/kms_panel_fitting.c | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/tests/kms_panel_fitting.c

[Intel-gfx] [PATCH i-g-t rfc 21/29] tests/kms_properties: Add support for dynamic number of planes

Add changes reflecting the new support for dynamic number of planes per pipe. Signed-off-by: Robert Foss --- tests/kms_properties.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/tests/kms_properties.c b/tests/kms_properties.c index

[Intel-gfx] [PATCH i-g-t rfc 24/29] tests/kms_rmfb: Add support for dynamic number of planes

Add changes reflecting the new support for dynamic number of planes per pipe. Signed-off-by: Robert Foss --- tests/kms_rmfb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/kms_rmfb.c b/tests/kms_rmfb.c index 17a3065a..5753d74c 100644 ---

[Intel-gfx] [PATCH i-g-t rfc 19/29] tests/kms_plane_multiple: Add support for dynamic number of planes

Add changes reflecting the new support for dynamic number of planes per pipe. Signed-off-by: Robert Foss --- tests/kms_plane_multiple.c | 203 - 1 file changed, 125 insertions(+), 78 deletions(-) diff --git

[Intel-gfx] [PATCH i-g-t rfc 14/29] tests/kms_mmap_write_crc: Add support for dynamic number of planes

Add changes reflecting the new support for dynamic number of planes per pipe. Signed-off-by: Robert Foss --- tests/kms_mmap_write_crc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/kms_mmap_write_crc.c b/tests/kms_mmap_write_crc.c index

[Intel-gfx] [PATCH i-g-t rfc 20/29] tests/kms_plane_scaling: Add support for dynamic number of planes

Add changes reflecting the new support for dynamic number of planes per pipe. Signed-off-by: Robert Foss --- tests/kms_plane_scaling.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/tests/kms_plane_scaling.c

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/37] drm: Provide a driver hook for drm_dev_release()

== Series Details == Series: series starting with [01/37] drm: Provide a driver hook for drm_dev_release() URL : https://patchwork.freedesktop.org/series/17852/ State : success == Summary == Series 17852v1 Series without cover letter

Re: [Intel-gfx] 4.10-rc2 oops in DRM connector code

On Wed, Jan 11, 2017 at 08:16:56AM -0800, Dave Hansen wrote: > On 01/11/2017 07:39 AM, Daniel Vetter wrote: > > Hm, just cherry-picked it on top of Linus' latest 4.10 git, applies > > cleanly there. The substituation was for 4.9. I can send you the patch > > here, but seems all fine from what I

Re: [Intel-gfx] [PATCH] drm/i915/guc: Make sure vma containing firmware is GuC mappable

On 11/01/17 07:17, Michał Winiarski wrote: Since commit 4741da925fa3 ("drm/i915/guc: Assert that all GGTT offsets used by the GuC are mappable"), we're asserting that GuC firmware is in the GuC mappable range. Except we're not pinning the object with bias, which means it's possible to trigger

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915: Invalidate the guc ggtt TLB upon insertion (rev3)

== Series Details == Series: series starting with [1/3] drm/i915: Invalidate the guc ggtt TLB upon insertion (rev3) URL : https://patchwork.freedesktop.org/series/17829/ State : failure == Summary == Series 17829v3 Series without cover letter

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] drm/i915: Name the anonymous structs inside i915_ggtt_view

== Series Details == Series: series starting with [1/6] drm/i915: Name the anonymous structs inside i915_ggtt_view URL : https://patchwork.freedesktop.org/series/17858/ State : success == Summary == Series 17858v1 Series without cover letter

[Intel-gfx] [PATCH 08/10] drm/i915/psr: enable psr2 for y cordinate panels

Psr2 is enabled only for y cordinate panels.Once GTC (global time code) is implemented,this restriction is removed so that psr2 can work on panels without y cordinate support. v2: (Rodrigo) - Move the check to intel_psr_match_conditions v3: (Rodrigo) - add return false v4: rebase Cc: Rodrigo

Re: [Intel-gfx] [PATCH v2 9/9] drm/i915: Add render decompression support

On Wed, Jan 11, 2017 at 1:49 PM, Jason Ekstrand wrote: > On Tue, Jan 10, 2017 at 9:04 AM, Ville Syrjälä < > ville.syrj...@linux.intel.com> wrote: > >> On Mon, Jan 09, 2017 at 11:20:57AM -0800, Jason Ekstrand wrote: >> > On Thu, Jan 5, 2017 at 7:14 AM,

Re: [Intel-gfx] [PATCH 2/5] drm/edid: Introduce drm_default_rgb_quant_range()

On Wed, Jan 11, 2017 at 05:16:54PM +0100, Daniel Vetter wrote: > On Wed, Jan 11, 2017 at 02:57:22PM +0200, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > Make the code selecting the RGB quantization range a little less magicy > > by wrapping

Re: [Intel-gfx] [PATCH 2/3] drm/i915/scheduler: emulate a scheduler for guc

On 11/01/2017 13:13, Chris Wilson wrote: This emulates execlists on top of the GuC in order to defer submission of > requests to the hardware. This deferral allows time for high priority requests to gazump their way to the head of the queue, however it nerfs the GuC by converting it back

Re: [Intel-gfx] [PATCH v6] drm: add fourcc codes for 16bit R and RG

On Wed, Jan 11, 2017 at 07:44:05AM -0800, Ben Widawsky wrote: > On 17-01-11 17:05:04, Ville Syrjälä wrote: > >On Thu, Jan 05, 2017 at 02:45:37PM +0100, Christian König wrote: > >> Am 05.01.2017 um 12:37 schrieb Ville Syrjälä: > >> > On Wed, Jan 04, 2017 at 07:38:55PM +0100, Rainer Hochecker wrote:

Re: [Intel-gfx] [PATCH 2/3] drm/i915/scheduler: emulate a scheduler for guc

On Wed, Jan 11, 2017 at 04:55:46PM +, Tvrtko Ursulin wrote: > > On 11/01/2017 13:13, Chris Wilson wrote: > >This emulates execlists on top of the GuC in order to defer submission of > > requests to the hardware. This deferral allows time for high priority > >requests to gazump their way to

Re: [Intel-gfx] [PATCHv2] drm/i915: Remove WaDisableLSQCROPERFforOCL KBL workaround.

Daniel Vetter writes: > On Mon, Jan 09, 2017 at 01:07:56PM -0800, Francisco Jerez wrote: >> The WaDisableLSQCROPERFforOCL workaround has the side effect of >> disabling an L3SQ optimization that has huge performance implications >> and is unlikely to be necessary for the correct

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for GET_PLANE2 w/ i915 implementation

This is expected because it's based on Ville's patch series to define the new modifiers. On 17-01-12 01:01:31, Patchwork wrote: == Series Details == Series: GET_PLANE2 w/ i915 implementation URL : https://patchwork.freedesktop.org/series/17873/ State : failure == Summary == LD [M]

Re: [Intel-gfx] [PATCHv2] drm/i915: Remove WaDisableLSQCROPERFforOCL KBL workaround.

Daniel Vetter writes: > On Wed, Jan 11, 2017 at 12:24:59PM +, Chris Wilson wrote: >> On Wed, Jan 11, 2017 at 02:07:37PM +0200, Mika Kuoppala wrote: >> > Daniel Vetter writes: >> > >> > > On Mon, Jan 09, 2017 at 01:07:56PM -0800, Francisco Jerez wrote: >> >

[Intel-gfx] [PATCH 3/3] drm/i915: Add support for GET_PLANE2 CCS modifiers

Cc: Kristian Høgsberg Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/intel_display.c | 10 -- drivers/gpu/drm/i915/intel_sprite.c | 2 ++ 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c

[Intel-gfx] [PATCH 1/3] drm: Add new DRM_IOCTL_MODE_GETPLANE2

Originally based off of a patch by Kristian. This new ioctl extends DRM_IOCTL_MODE_GETPLANE, by returning information about the modifiers that will work with each format. It's modified from Kristian's patch in that the modifiers and formats are setup by the driver, and then a callback is used to

[Intel-gfx] [PATCH 0/3] GET_PLANE2 w/ i915 implementation

This patch series implements GET_PLANE2 support for Intel platforms and defines the new kernel UAPI. The idea was originally introduced by Kristian. Ultimately, the purpose of the new API is to provide the ability to query per-plane modifiers in KMS. These modifiers, which are just fb modifiers,

[Intel-gfx] [PATCH 2/3] drm/i915: Add format modifiers for Intel

This was based on a patch originally by Kristian. It has been modified pretty heavily to use the new callbacks from the previous patch. Cc: Kristian H. Kristensen Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/intel_display.c | 109

[Intel-gfx] ✗ Fi.CI.BAT: failure for GET_PLANE2 w/ i915 implementation

== Series Details == Series: GET_PLANE2 w/ i915 implementation URL : https://patchwork.freedesktop.org/series/17873/ State : failure == Summary == LD [M] sound/pci/hda/snd-hda-codec-generic.o LD lib/built-in.o LD sound/pci/built-in.o LD drivers/acpi/built-in.o LD

[Intel-gfx] ✗ Fi.CI.BAT: warning for 4.10-rc2 oops in DRM connector code (rev2)

== Series Details == Series: 4.10-rc2 oops in DRM connector code (rev2) URL : https://patchwork.freedesktop.org/series/17563/ State : warning == Summary == Series 17563v2 4.10-rc2 oops in DRM connector code https://patchwork.freedesktop.org/api/1.0/series/17563/revisions/2/mbox/ Test

Re: [Intel-gfx] [PATCH 0/2] drm: link status property and DP link training failure handling

On Tue, Dec 20, 2016 at 10:30:17AM +0100, Daniel Vetter wrote: > On Mon, Dec 19, 2016 at 11:15:40PM +, Pandiyan, Dhinakaran wrote: > > On Sun, 2016-12-18 at 14:43 +0100, Daniel Vetter wrote: > > > On Sat, Dec 17, 2016 at 05:47:56AM +, Pandiyan, Dhinakaran wrote: > > > > On Fri, 2016-12-16

[Intel-gfx] [PATCH i-g-t rfc 17/29] tests/kms_pipe_color: Add support for dynamic number of planes

Add changes reflecting the new support for dynamic number of planes per pipe. Signed-off-by: Robert Foss --- tests/kms_pipe_color.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tests/kms_pipe_color.c b/tests/kms_pipe_color.c index

[Intel-gfx] [PATCH i-g-t rfc 22/29] tests/kms_psr_sink_crc: Add support for dynamic number of planes

Add changes reflecting the new support for dynamic number of planes per pipe. Signed-off-by: Robert Foss --- tests/kms_psr_sink_crc.c | 52 +--- 1 file changed, 23 insertions(+), 29 deletions(-) diff --git

[Intel-gfx] [PATCH i-g-t rfc 00/29] lib/igt_kms: Implement dynamic plane count support

Coverletter: This series implements dynamic plane count support in lib/igt_kms and modifies all of the tests that rely on a static plane count. Currently it has only been tested on vc4, but testing reveals no new failures. This series can be found here:

[Intel-gfx] [PATCH i-g-t rfc 01/29] lib/igt_debugfs: Prevent buffer overflow

buf array may overflow with when writing '\0' if MAX_LINE_LEN bytes are read during read(). Signed-off-by: Robert Foss --- lib/igt_debugfs.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/lib/igt_debugfs.c b/lib/igt_debugfs.c index

[Intel-gfx] [PATCH i-g-t rfc 09/29] tests/kms_cursor_legacy: Add support for dynamic number of planes

Add changes reflecting the new support for dynamic number of planes per pipe. Signed-off-by: Robert Foss --- tests/kms_cursor_legacy.c | 30 +- 1 file changed, 17 insertions(+), 13 deletions(-) diff --git a/tests/kms_cursor_legacy.c

[Intel-gfx] [PATCH i-g-t rfc 23/29] tests/kms_pwrite_crc: Add support for dynamic number of planes

Add changes reflecting the new support for dynamic number of planes per pipe. Signed-off-by: Robert Foss --- tests/kms_pwrite_crc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/kms_pwrite_crc.c b/tests/kms_pwrite_crc.c index

[Intel-gfx] [PATCH i-g-t rfc 18/29] tests/kms_plane: Add support for dynamic number of planes

Add changes reflecting the new support for dynamic number of planes per pipe. Signed-off-by: Robert Foss --- tests/kms_plane.c | 94 ++- 1 file changed, 52 insertions(+), 42 deletions(-) diff --git

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