[Intel-gfx] [PATCH 09/27] drm/i915: Confirm the request is still active before adding it to the await

Although we do check the completion-status of the request before actually adding a wait on it (either to its submit fence or its completion dma-fence), we currently do not check before adding it to the dependency lists. Signed-off-by: Chris Wilson Reviewed-by: Michał

[Intel-gfx] [PATCH 12/27] drm/i915: Only report a wakeup if the waiter was truly asleep

If we attempt to wake up a waiter, who is currently checking the seqno it will be in the TASK_INTERRUPTIBLE state and ttwu will report success. However, it is actually awake and functioning -- so delay reporting the actual wake up until it sleeps. v2: Defend against !CONFIG_SMP v3: Don't filter

[Intel-gfx] [PATCH 14/27] drm/i915: Don't mark an execlists context-switch when idle

If we *know* that the engine is idle, i.e. we have not more contexts in lift, we can skip any spurious CSB idle interrupts. These spurious interrupts seem to arrive long after we assert that the engines are completely idle, triggering later assertions: [ 178.896646] intel_engine_is_idle(bcs):

[Intel-gfx] [PATCH 04/27] drm/i915: Lift timeline ordering to await_dma_fence

Currently we filter out repeated use of the same timeline in the low level i915_gem_request_await_request(), after having added the dependency on the old request. However, we can lift this to i915_gem_request_await_dma_fence() (before the dependency is added) using the observation that requests

[Intel-gfx] [PATCH 03/27] drm/i915: Mark up clflushes as belonging to an unordered timeline

2 clflushes on two different objects are not ordered, and so do not belong to the same timeline (context). Either we use a unique context for each, or we reserve a special global context to mean unordered. Ideally, we would reserve 0 to mean unordered (DMA_FENCE_NO_CONTEXT) to have the same

[Intel-gfx] [PATCH 16/27] drm/i915: Reinstate reservation_object zapping for batch_pool objects

I removed the zapping of the reservation_object->fence array of shared fences prematurely. We don't yet have the code to zap that array when retiring the object, and so currently it remains possible to continually grow the shared array trapping requests when reusing the batch_pool object across

[Intel-gfx] [PATCH 15/27] drm/i915: Split execlist priority queue into rbtree + linked list

All the requests at the same priority are executed in FIFO order. They do not need to be stored in the rbtree themselves, as they are a simple list within a level. If we move the requests at one priority into a list, we can then reduce the rbtree to the set of priorities. This should keep the

Re: [Intel-gfx] [PATCH v6 1/3] ACPI / bus: Introduce a list of ids for "always present" devices

Hi, On 18-04-17 15:34, Rafael J. Wysocki wrote: On Tue, Apr 18, 2017 at 1:54 PM, Hans de Goede wrote: Several Cherry Trail devices (all of which ship with Windows 10) hide the LPSS PWM controller in ACPI, typically the _STA method looks like this: Method (_STA, 0,

Re: [Intel-gfx] [PATCH i-g-t] tests/meta_test: Add a meta test for sanity checks of CI systems

On Wed, Apr 05, 2017 at 01:11:53PM +0300, Marta Lofstedt wrote: > The intention of this test is use it to test that the CI system > that runs IGT is collecting the results correctly. > > For: VIZ-10281 > > Signed-off-by: Marta Lofstedt > --- > tests/Makefile.sources

[Intel-gfx] [PATCH 18/27] drm/i915: Use vma->exec_entry as our double-entry placeholder

This has the benefit of not requiring us to manipulate the vma->exec_link list when tearing down the execbuffer, and is a marginally cheaper test to detect the user error. Signed-off-by: Chris Wilson Reviewed-by: Joonas Lahtinen ---

Re: [Intel-gfx] [PATCH 16/22] xen-blkfront: Make use of the new sg_map helper function

From: Logan Gunthorpe > Sent: 13 April 2017 23:05 > Straightforward conversion to the new helper, except due to > the lack of error path, we have to warn if unmapable memory > is ever present in the sgl. > > Signed-off-by: Logan Gunthorpe > --- >

Re: [Intel-gfx] [PATCH v4] ACPI / bus: Introduce a list of ids for "always present" devices

Hi, On 18-04-17 10:31, Andy Shevchenko wrote: On Mon, 2017-04-10 at 17:49 +0200, Hans de Goede wrote: Several cherrytrail devices (all of which ship with windows 10) hide the lpss pwm controller in ACPI, typically the _STA method looks like this: CherryTrail PWM LPSS All fixed.

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