[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/dp: Do not prune the last mode on the connector

== Series Details == Series: drm/dp: Do not prune the last mode on the connector URL : https://patchwork.freedesktop.org/series/31018/ State : failure == Summary == Series 31018v1 drm/dp: Do not prune the last mode on the connector

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/3] Fix rlim_cur compiler warnings when building on ARM.

== Series Details == Series: series starting with [1/3] Fix rlim_cur compiler warnings when building on ARM. URL : https://patchwork.freedesktop.org/series/30992/ State : failure == Summary == Test kms_frontbuffer_tracking: Subgroup fbcpsr-2p-primscrn-cur-indfb-draw-blt:

Re: [Intel-gfx] [PATCH] drm/dp: Do not prune the last mode on the connector

Manasi Navare writes: > This patch fixes this problem by checking if the mode being pruned > is the last mode on that connector and if so doesnt prune it. I think you want to stop pruning when you've gotten to a single mode on the list, not at the last mode in the

[Intel-gfx] ✓ Fi.CI.BAT: success for Fix compilation on some distros

== Series Details == Series: Fix compilation on some distros URL : https://patchwork.freedesktop.org/series/31012/ State : success == Summary == IGT patchset tested on top of latest successful build 2885b10f99b4beeb046e75af8b8488c229f629d3 igt/gem_exec_schedule: Ignore set-priority failures

Re: [Intel-gfx] [PATCH v7] drm/i915/edp: Be less aggressive about changing link config on eDP

On Wed, Sep 27, 2017 at 12:23:32PM +, Mika Kahola wrote: > On Tue, 2017-09-19 at 12:55 -0700, Rodrigo Vivi wrote: > > On Fri, Sep 15, 2017 at 06:19:12PM +, Manasi Navare wrote: > > > > > > The patch looks good for eDP link training optimizations. > > > > > > Reviewed-by: Manasi Navare

Re: [Intel-gfx] [PATCH] drm/dp: Do not prune the last mode on the connector

On Wed, Sep 27, 2017 at 05:31:56PM -0700, Keith Packard wrote: > Manasi Navare writes: > > > This patch fixes this problem by checking if the mode being pruned > > is the last mode on that connector and if so doesnt prune it. > > I think you want to stop pruning when

[Intel-gfx] [PATCH] drm/i915/cnl: Avoid WA_SET_BIT_MASK on write-only CNL_HDC_CHICKEN0.

On CNL, HDC_CHICKEN0 "is write-only from LRI command. However, it is readable for context save." So we have no ways to check the coherency by reading it back on our tests. So let's just write that bit directly without saving it to dev_priv->workarounds. Bugzilla:

Re: [Intel-gfx] [PATCH v2 05/11] drm/i915/execlists: Distinguish the incomplete context notifies

Thanks for the patch. :) -Original Message- From: Chris Wilson [mailto:ch...@chris-wilson.co.uk] Sent: Wednesday, September 27, 2017 7:45 PM To: intel-gfx@lists.freedesktop.org Cc: Chris Wilson ; Zhenyu Wang ; Wang, Zhi A

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Enhanced for initialize partially filled pagetables

== Series Details == Series: drm/i915: Enhanced for initialize partially filled pagetables URL : https://patchwork.freedesktop.org/series/31029/ State : success == Summary == shard-hswtotal:2429 pass:1332 dwarn:4 dfail:0 fail:10 skip:1083 time:9949s == Logs == For more details

[Intel-gfx] ✗ Fi.CI.BAT: failure for GEM/GuC Suspend/Resume/Reset fixes and restructuring (rev4)

== Series Details == Series: GEM/GuC Suspend/Resume/Reset fixes and restructuring (rev4) URL : https://patchwork.freedesktop.org/series/30802/ State : failure == Summary == Series 30802v4 GEM/GuC Suspend/Resume/Reset fixes and restructuring

Re: [Intel-gfx] [PATCH] drm/i915: Add has_psr-flag to gen9lp

On Wed, Sep 27, 2017 at 5:14 AM David Weinehall < david.weineh...@linux.intel.com> wrote: > On Tue, Aug 08, 2017 at 12:50:51PM -0700, Rodrigo Vivi wrote: > > a long time ago I had agreed with Daniel that we would only add new > > platforms after it was enabled by default on previous platforms. >

[Intel-gfx] ✗ Fi.CI.IGT: warning for Fix compilation on some distros

== Series Details == Series: Fix compilation on some distros URL : https://patchwork.freedesktop.org/series/31012/ State : warning == Summary == Test gem_mmap_gtt: Subgroup basic-copy: skip -> PASS (shard-hsw) Subgroup basic-write-read-distinct:

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Also discard second CRC on gen8+ platforms.

== Series Details == Series: drm/i915: Also discard second CRC on gen8+ platforms. URL : https://patchwork.freedesktop.org/series/31023/ State : success == Summary == Test perf: Subgroup blocking: fail -> PASS (shard-hsw) fdo#102252 +1 Test kms_setmode:

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/cnl: Allow 2 pixel per clock on Cannonlake.

== Series Details == Series: drm/i915/cnl: Allow 2 pixel per clock on Cannonlake. URL : https://patchwork.freedesktop.org/series/30924/ State : success == Summary == Test kms_setmode: Subgroup basic: fail -> PASS (shard-hsw) fdo#99912 Test kms_flip:

Re: [Intel-gfx] [RFC 2/2] drm/i915: Make intel_guc_wopcm_size() inline

Looks good to me. Nitpicks: 1. s/dev_priv/i915 in intel_guc_wopcm_size 2. We are updating the parameter type of intel_guc_wopcm_size. Will it be necessary to update that change log and intent in the commit message? Thanks Sagar On 9/26/2017 10:18 PM, Michal Wajdeczko wrote: It's small and

Re: [Intel-gfx] [PATCH] drm/i915: Avoid using dev_priv->info.gen directly.

On Tue, 26 Sep 2017, Rodrigo Vivi wrote: > On Tue, Sep 26, 2017 at 09:21:43PM +, Paulo Zanoni wrote: >> Em Ter, 2017-09-26 às 14:13 -0700, Rodrigo Vivi escreveu: >> > Let's stop this usage before it spreads so much. >> > >> > 1. This check is not part of usual

Re: [Intel-gfx] [RFC 1/2] drm/i915/uc: Move uC related types into dedicated header

Like this change as now headers becomes easy to read. Minor inputs suggested below. On 9/26/2017 10:18 PM, Michal Wajdeczko wrote: In old header structure we were mixing type definitions and declarations that prevent us from exposing some functions as inline. Lets try to fix that.

Re: [Intel-gfx] [PATCH 02/22] drm/i915: introduce simple gemfs

On Tue, 2017-09-26 at 23:34 +0200, Greg Kroah-Hartman wrote: > On Tue, Sep 26, 2017 at 04:21:47PM +0300, Joonas Lahtinen wrote: > > On Tue, 2017-09-26 at 09:52 +0200, Greg Kroah-Hartman wrote: > > > On Mon, Sep 25, 2017 at 07:47:17PM +0100, Matthew Auld wrote: > > > > Not a fully blown gemfs, just

Re: [Intel-gfx] [PATCH 7/8] drm/i915/pmu: Wire up engine busy stats to PMU

On 26/09/2017 19:46, Rogozhkin, Dmitry V wrote: On Tue, 2017-09-26 at 13:32 +0100, Tvrtko Ursulin wrote: On 25/09/2017 18:48, Chris Wilson wrote: Quoting Tvrtko Ursulin (2017-09-25 16:15:42) From: Tvrtko Ursulin We can use engine busy stats instead of the MMIO

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Avoid using dev_priv->info.gen directly.

== Series Details == Series: drm/i915: Avoid using dev_priv->info.gen directly. URL : https://patchwork.freedesktop.org/series/30926/ State : success == Summary == Test kms_setmode: Subgroup basic: fail -> PASS (shard-hsw) fdo#99912 Test perf:

Re: [Intel-gfx] [PATCH 7/8] drm/i915/pmu: Wire up engine busy stats to PMU

On 26/09/2017 21:05, Chris Wilson wrote: Quoting Tvrtko Ursulin (2017-09-26 13:32:25) On 25/09/2017 18:48, Chris Wilson wrote: Quoting Tvrtko Ursulin (2017-09-25 16:15:42) From: Tvrtko Ursulin We can use engine busy stats instead of the MMIO sampling timer for

Re: [Intel-gfx] [PATCH 4/6] drm/i915: Set our shrinker->batch to 4096 (~16MiB)

On Tue, 2017-09-26 at 16:02 +0100, Chris Wilson wrote: > Quoting Joonas Lahtinen (2017-09-20 14:28:40) > > On Wed, 2017-08-16 at 14:55 +0100, Chris Wilson wrote: > > > Quoting Joonas Lahtinen (2017-08-16 14:39:00) > > > > On Sat, 2017-08-12 at 12:51 +0100, Chris Wilson wrote: > > > > > Prefer to

Re: [Intel-gfx] [PATCH igt 2/3] benchmarks/gem_syslatency: Apply vmpressure, measure page allocation

On Mon, 2017-09-25 at 21:26 +0100, Chris Wilson wrote: > Signed-off-by: Chris Wilson > --- > benchmarks/gem_syslatency.c | 86 > +++-- > 1 file changed, 83 insertions(+), 3 deletions(-) > > diff --git

Re: [Intel-gfx] [PATCH 4/6] drm/i915: Set our shrinker->batch to 4096 (~16MiB)

Quoting Joonas Lahtinen (2017-09-27 09:38:20) > On Tue, 2017-09-26 at 16:02 +0100, Chris Wilson wrote: > > Quoting Joonas Lahtinen (2017-09-20 14:28:40) > > > On Wed, 2017-08-16 at 14:55 +0100, Chris Wilson wrote: > > > > Quoting Joonas Lahtinen (2017-08-16 14:39:00) > > > > > On Sat, 2017-08-12

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/cnl: allow HDMI 2.0 clock rates

== Series Details == Series: drm/i915/cnl: allow HDMI 2.0 clock rates URL : https://patchwork.freedesktop.org/series/30929/ State : failure == Summary == Test kms_plane: Subgroup plane-panning-bottom-right-suspend-pipe-A-planes: pass -> SKIP (shard-hsw)

Re: [Intel-gfx] [PATCH v14 5/7] vfio: ABI for mdev display dma-buf operation

It's really tricky to handle the cached dmabuf_obj's life-cycle without touching other kernel modules (e.g. i915 or dmabuf).The proposed two ioctls will be helpful. So, there is a problem about the releasing cached dmabuf_obj. We cannot rely on the drm_i915_gem_object_ops.release() to release

Re: [Intel-gfx] [PATCH] drm/i915/cnl: WaForceContextSaveRestoreNonCoherent

Quoting Rodrigo Vivi (2017-08-23 00:27:15) > To avoid a potential hang condition with TLB invalidation > we need to enable masked bit 5 of MMIO 0xE5F0 at boot. > > Same workaround was in place for previous platforms, > but the change for CNL is more on the register offset. > But also BSpec

Re: [Intel-gfx] [maintainer-tools PATCH] qf: Handle unused patches on sub-directories.

On Tue, Sep 26, 2017 at 04:52:21PM -0700, Rodrigo Vivi wrote: > Most of internal patches are nowadays organized in > quilt subdirectories, but qf was never updated to check > for unused patches there. > > Cc: Paulo Zanoni > Signed-off-by: Rodrigo Vivi

[Intel-gfx] [PATCH v10 2/9] drm/i915: Update GEM suspend/resume flows considering GuC and GEM fences

This patch moves GuC suspend/resume handlers to corresponding GEM handlers and orders them properly in the runtime and system suspend/resume flows. i915_gem_restore_fences is GEM resumption task hence it is moved to i915_gem_resume from i915_restore_state. v2: Removed documentation of

[Intel-gfx] [PATCH v10 0/9] GEM/GuC Suspend/Resume/Reset fixes and restructuring

Older series can be found at https://patchwork.freedesktop.org/series/30715/ https://patchwork.freedesktop.org/series/30502/ https://patchwork.freedesktop.org/series/30351/ v1-v8: Part of above three series. v9: Fixed patch 1 based on review inputs from Michal Winiarski. Rebased all patches.

[Intel-gfx] [PATCH v10 1/9] drm/i915: Create GEM runtime resume helper and handle GEM suspend/resume errors

These changes are preparation to handle GuC suspend/resume. Prepared helper i915_gem_runtime_resume to reinitialize suspended gem setup. Returning status from i915_gem_runtime_suspend and i915_gem_resume. This will be placeholder for handling any errors from uC suspend/resume in upcoming patches.

[Intel-gfx] [PATCH v10 3/9] drm/i915: Create uC runtime and system suspend/resume helpers

Prepared generic helpers intel_uc_suspend, intel_uc_resume, intel_uc_runtime_suspend, intel_uc_runtime_resume. These are called from respective GEM functions. Only exception is intel_uc_resume that needs to be called w/ or w/o GuC loaded in i915_drm_resume path. Changes to add WOPCM condition

[Intel-gfx] [PATCH v10 8/9] drm/i915/guc: Disable GuC submission and suspend it prior to i915 reset

Before i915 reset, we need to disable GuC submission and suspend GuC operations as it is recreated during intel_uc_init_hw. We can't reuse the intel_uc_suspend functionality as reset path already holds struct_mutex. v2: Rebase w.r.t removal of GuC code restructuring. Updated reset_prepare

[Intel-gfx] [PATCH v10 5/9] drm/i915/guc: Update GuC ggtt.invalidate/interrupts/communication across RPM suspend/resume

Apart from configuring interrupts, we need to update the ggtt invalidate interface and GuC communication on suspend/resume. This functionality can be reused for other suspend and reset paths. v2: Rebase w.r.t removal of GuC code restructuring. v3: Removed GuC specific helpers as tasks other than

[Intel-gfx] [PATCH v10 7/9] drm/i915/guc: Update GuC suspend functionality in intel_uc_suspend

With this patch we disable GuC submission in i915_drm_suspend path. This will destroy the client which will be setup back again. We also reuse the complete sanitization done via intel_uc_runtime_suspend in this path. Post i915_drm_resume, this state is recreated by intel_uc_init_hw hence we need

[Intel-gfx] [PATCH v10 6/9] drm/i915/guc: Check execbuf client to disable submission and don't depend on enable_guc_submission

We should check dependent state setup by enable path to run disable path and not depend on the user parameters. i915_guc_submission_disable now checks if execbuf client is setup and then goes ahead with disabling. Suggested-by: Chris Wilson Signed-off-by: Sagar Arun

[Intel-gfx] [PATCH v10 9/9] drm/i915/guc: Fix GuC cleanup in unload path

We ensure that GuC is completely suspended and client is destroyed in i915_gem_suspend during i915_driver_unload. So now intel_uc_fini_hw should just take care of cleanup, hence s/intel_uc_fini_hw/intel_uc_cleanup. Correspondingly we also updated as

[Intel-gfx] [PATCH v10 4/9] drm/i915/guc: Update GuC load status as NONE on GPU reset

Currently GPU is reset at the end of suspend via i915_gem_sanitize. On resume, GuC will not be loaded until intel_uc_init_hw happens during GEM resume flow but action to exit sleep can be sent to GuC considering the FW load status. To make sure we don't invoke that action update GuC FW load status

[Intel-gfx] [PATCH 1/2] drm/i915: Remove pre-production Broxton register workarounds

We've begun excluding pre-production Broxton machines since commit 0102ba1fd8af ("drm/i915: Add early BXT sdv to the list of preproduction machines"), now remove the list of workaround register values for those early machines. Signed-off-by: Chris Wilson ---

[Intel-gfx] [PATCH 2/2] drm/i915: Unconditionally apply the Broxton register workaround set

Having removed the preproduction Broxton support (see commit 0102ba1fd8af ("drm/i915: Add early BXT sdv to the list of preproduction machines")), we know we then always need the production Broxton workaround set and do not need a predicate upon revision. Signed-off-by: Chris Wilson

Re: [Intel-gfx] [PATCH igt 2/3] benchmarks/gem_syslatency: Apply vmpressure, measure page allocation

Quoting Joonas Lahtinen (2017-09-27 09:52:42) > On Mon, 2017-09-25 at 21:26 +0100, Chris Wilson wrote: > > Signed-off-by: Chris Wilson > > --- > > benchmarks/gem_syslatency.c | 86 > > +++-- > > 1 file changed, 83 insertions(+),

Re: [Intel-gfx] [PATCH igt 2/3] benchmarks/gem_syslatency: Apply vmpressure, measure page allocation

Quoting Joonas Lahtinen (2017-09-27 09:52:42) > On Mon, 2017-09-25 at 21:26 +0100, Chris Wilson wrote: > > +static void *sys_thp_alloc(void *arg) > > +{ > > + struct sys_wait *w = arg; > > + struct timespec now; > > + > > + clock_gettime(CLOCK_MONOTONIC, ); > > + while (!done) { >

[Intel-gfx] [PATCH 2/3] dim: auto-add remotes

Well, bother to at least prompt. Prep work for adding drm-amd.git. Signed-off-by: Daniel Vetter --- dim | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/dim b/dim index 4d75c7a7fb0e..6ebbad2b6dfd 100755 --- a/dim +++ b/dim @@ -274,7 +274,14 @@

[Intel-gfx] [PATCH 3/3] dim: add drm-amd.git

Unfortunately there's a little bit of hardcoded stuff still. Cc: Alex Deucher Cc: Harry Wentland Signed-off-by: Daniel Vetter --- dim | 1 + 1 file changed, 1 insertion(+) diff --git a/dim b/dim index

[Intel-gfx] [PATCH 1/3] dim: redo the author sob checks

This reverts commit 41dddc0287bb9ef14be8de3c3185ed6aaa809d98 and then tries a different approach because from the commit that originally introduced this: commit 3dd25f235c73f7855dc570585eb2551961a1911a Author: Benjamin Gaignard Date: Wed Jul 26 14:07:49 2017 +0200

Re: [Intel-gfx] [PATCH 1/2] drm/i915/execlists: Notify context-out for lost requests

Quoting Chris Wilson (2017-09-26 11:17:19) > When cancelling requests, also send the notification to any listeners > (gvt) that the request is no longer scheduler on hw. They may require to > keep the in/out exactly balanced, and so the reuse after the reset may > confuse the listener. > > Fixes:

Re: [Intel-gfx] [RFC 1/2] drm/i915/uc: Move uC related types into dedicated header

On Tue, 2017-09-26 at 16:48 +, Michal Wajdeczko wrote: > In old header structure we were mixing type definitions and > declarations that prevent us from exposing some functions > as inline. Lets try to fix that. > > Suggested-by: Chris Wilson > Signed-off-by: Michal

[Intel-gfx] ✓ Fi.CI.BAT: success for GEM/GuC Suspend/Resume/Reset fixes and restructuring (rev3)

== Series Details == Series: GEM/GuC Suspend/Resume/Reset fixes and restructuring (rev3) URL : https://patchwork.freedesktop.org/series/30802/ State : success == Summary == Series 30802v3 GEM/GuC Suspend/Resume/Reset fixes and restructuring

Re: [Intel-gfx] [PATCH] drm/i915: Don't mix inline functions with declarations

On Tue, 2017-09-26 at 14:37 +, Michal Wajdeczko wrote: > We group function forward declarations by file. There is no > reason to mix these declarations with our unline functions. I'd rather like to avoid these megaheaders completely, so that intel_uc.h would be a base header with common

Re: [Intel-gfx] [PATCH igt 2/3] benchmarks/gem_syslatency: Apply vmpressure, measure page allocation

On Wed, 2017-09-27 at 10:41 +0100, Chris Wilson wrote: > Quoting Joonas Lahtinen (2017-09-27 09:52:42) > > On Mon, 2017-09-25 at 21:26 +0100, Chris Wilson wrote: > > > +static void *sys_thp_alloc(void *arg) > > > +{ > > > + struct sys_wait *w = arg; > > > + struct timespec now; > > > + > >

Re: [Intel-gfx] [PATCH v14 5/7] vfio: ABI for mdev display dma-buf operation

Hi, > So, there is a problem about the releasing cached dmabuf_obj. We > cannot rely on the drm_i915_gem_object_ops.release() to release the > cached dmabuf_obj, > as this release operation is running in another thread, which leads > to a racing condition and tricky to be solved without

Re: [Intel-gfx] [PATCH] drm/i915/cnl: WaForceContextSaveRestoreNonCoherent

Chris Wilson writes: > Quoting Rodrigo Vivi (2017-08-23 00:27:15) >> To avoid a potential hang condition with TLB invalidation >> we need to enable masked bit 5 of MMIO 0xE5F0 at boot. >> >> Same workaround was in place for previous platforms, >> but the change for CNL

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Remove pre-production Broxton register workarounds

== Series Details == Series: series starting with [1/2] drm/i915: Remove pre-production Broxton register workarounds URL : https://patchwork.freedesktop.org/series/30952/ State : success == Summary == Series 30952v1 series starting with [1/2] drm/i915: Remove pre-production Broxton register

Re: [Intel-gfx] [RFC 1/2] drm/i915/uc: Move uC related types into dedicated header

On Wed, 27 Sep 2017 09:22:35 +0200, Sagar Arun Kamble wrote: Like this change as now headers becomes easy to read. Minor inputs suggested below. On 9/26/2017 10:18 PM, Michal Wajdeczko wrote: In old header structure we were mixing type definitions and

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Miscellaneous fixes to reduce dependency for I915_MAX_PIPES

== Series Details == Series: drm/i915: Miscellaneous fixes to reduce dependency for I915_MAX_PIPES URL : https://patchwork.freedesktop.org/series/30336/ State : success == Summary == Series 30336v1 drm/i915: Miscellaneous fixes to reduce dependency for I915_MAX_PIPES

Re: [Intel-gfx] [PATCH igt 2/3] benchmarks/gem_syslatency: Apply vmpressure, measure page allocation

Quoting Joonas Lahtinen (2017-09-27 11:02:08) > On Wed, 2017-09-27 at 10:41 +0100, Chris Wilson wrote: > > Quoting Joonas Lahtinen (2017-09-27 09:52:42) > > > On Mon, 2017-09-25 at 21:26 +0100, Chris Wilson wrote: > > > > +static void *sys_thp_alloc(void *arg) > > > > +{ > > > > + struct

[Intel-gfx] [PATCH v2 1/2] drm/i915/uc: Move uC related types into dedicated header

In old header structure we were mixing type definitions and declarations that prevent us from exposing some functions as inline. Lets try to fix that. v2: keep old order of the structs, pull fwif.h (Sagar) Suggested-by: Chris Wilson Signed-off-by: Michal Wajdeczko

[Intel-gfx] [PATCH v2 2/2] drm/i915: Make intel_guc_wopcm_size() inline

While here fix param and var types to match new naming rules. v2: update names and commit message (Sagar) Signed-off-by: Michal Wajdeczko Cc: Sagar Arun Kamble --- drivers/gpu/drm/i915/intel_guc_loader.c | 11 ---

Re: [Intel-gfx] [PATCH i-g-t 5/6] tests/kms_panel_fitting: Skip sprite test if we exceed sprite scaling limits

On Thu, Sep 21, 2017 at 05:39:32PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > g4x-bdw surface isn't allowed to exceed 2kx2k pixels when scaling, and > the stride must not exceed 4k bytes. The test tries to scale a 1920x1080 > 32bpp image which exceeds

Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/uc: Move uC related types into dedicated header

On Wed, 2017-09-27 at 11:22 +, Michal Wajdeczko wrote: > In old header structure we were mixing type definitions and > declarations that prevent us from exposing some functions > as inline. Lets try to fix that. > > v2: keep old order of the structs, pull fwif.h (Sagar) > > Suggested-by:

Re: [Intel-gfx] [PATCH i-g-t 6/6] tests/kms_draw_crc: Skip tests for unsupported formats

On Thu, Sep 21, 2017 at 05:39:33PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > 10bpc formats aren't supported on all platforms, so skip the test when > we can't create the framebuffer. > > Signed-off-by: Ville Syrjälä

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915/uc: Move uC related types into dedicated header

== Series Details == Series: series starting with [v2,1/2] drm/i915/uc: Move uC related types into dedicated header URL : https://patchwork.freedesktop.org/series/30957/ State : success == Summary == Series 30957v1 series starting with [v2,1/2] drm/i915/uc: Move uC related types into

[Intel-gfx] [PATCH i-g-t 1/2] igt: Add a helper function to mark BOs purgeable

Signed-off-by: Boris Brezillon --- lib/igt_vc4.c | 12 lib/igt_vc4.h | 1 + 2 files changed, 13 insertions(+) diff --git a/lib/igt_vc4.c b/lib/igt_vc4.c index c4682f5688f1..b75c063204ec 100644 --- a/lib/igt_vc4.c +++ b/lib/igt_vc4.c @@ -128,3

[Intel-gfx] [PATCH i-g-t 2/2] igt: Add VC4 purgeable BO tests

Signed-off-by: Boris Brezillon --- tests/Makefile.sources | 1 + tests/vc4_purgeable_bo.c | 274 +++ 2 files changed, 275 insertions(+) create mode 100644 tests/vc4_purgeable_bo.c diff --git

[Intel-gfx] [PATCH i-g-t 0/2] igt: Add a testsuite to validate VC4 MADV ioctl

Hello, This patchset adds VC4 specific tests to validate the DRM_IOCTL_VC4_GEM_MADVISE ioctl. Note that this series depends on kernel/libdrm code that has not been accepted yet and is just provided to show reviewers how the ioctl can be used and what to expect from it. Please do not

Re: [Intel-gfx] [PATCH i-g-t 1/6] lib/igt_kms: Don't assert on non-existent plane

On Thu, Sep 21, 2017 at 05:39:28PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > Skip when a test can't find a plane by the index. Previously > in commit 5426dc0a889a ("lib/kms: Skip rather than fail when > a suitable plane can't be found") we added similar

Re: [Intel-gfx] [PATCH i-g-t 2/2] igt: Add VC4 purgeable BO tests

On Wed, Sep 27, 2017 at 01:51:18PM +0200, Boris Brezillon wrote: > Signed-off-by: Boris Brezillon > --- > tests/Makefile.sources | 1 + > tests/vc4_purgeable_bo.c | 274 > +++ > 2 files changed, 275

Re: [Intel-gfx] [PATCH i-g-t 2/2] igt: Add VC4 purgeable BO tests

Quoting Boris Brezillon (2017-09-27 12:51:18) > Signed-off-by: Boris Brezillon > --- > tests/Makefile.sources | 1 + > tests/vc4_purgeable_bo.c | 274 > +++ > 2 files changed, 275 insertions(+) > create mode

Re: [Intel-gfx] [PATCH] drm/i915: Add has_psr-flag to gen9lp

On Tue, Aug 08, 2017 at 12:50:51PM -0700, Rodrigo Vivi wrote: > a long time ago I had agreed with Daniel that we would only add new > platforms after it was enabled by default on previous platforms. > a big reason for that is that we was willing to reduce the platforms > to validate and do better

Re: [Intel-gfx] [PATCH] dim: Accept author x signed-off based on email.

On Tue, Sep 26, 2017 at 09:55:44AM -0700, Rodrigo Vivi wrote: > On Tue, Sep 26, 2017 at 01:24:35PM +, Jani Nikula wrote: > > On Tue, 26 Sep 2017, Daniel Vetter wrote: > > > On Thu, Sep 21, 2017 at 06:27:28AM -0700, Rodrigo Vivi wrote: > > >> On Thu, Sep 21, 2017 at 11:12:52AM

Re: [Intel-gfx] [PATCH] drm/i915/cnl: Fix SSEU Device Status.

On Tue, Sep 26, 2017 at 01:06:22PM -0700, Rodrigo Vivi wrote: > On Fri, Sep 22, 2017 at 06:32:04PM +, Rodrigo Vivi wrote: > > On Fri, Sep 22, 2017 at 04:44:38PM +, Oscar Mateo wrote: > > > > > > > > > On 09/22/2017 06:15 AM, Rodrigo Vivi wrote: > > > > CNL adds an extra register for

Re: [Intel-gfx] Intel-gfx related suspend-to-ram issues on IBM R31

Hi Ville, Thanks for the pointers. However, which branch of mesa does this drm-tip + https://patchwork.freedesktop.org/patch/176870/ patch apply to? I assume it is the intel-drm-nightly? Tried that, without success. While the 4.9.xx reaches at least S1, this one gets stuck earlier, with

[Intel-gfx] [PATCH 3/4] drm/i915: Register perf_ ioctls directly in i915_perf file.

From: Marius Vlad Signed-off-by: Marius Vlad Signed-off-by: Marius-Adrian Negreanu --- drivers/gpu/drm/i915/i915_drv.c | 3 --- drivers/gpu/drm/i915/i915_perf.c | 21 + 2 files changed, 21 insertions(+), 3

Re: [Intel-gfx] [PATCH v2 6/6] drm/atomic: Make async plane update checks work as intended, v2.

On 04.09.2017 13:48, Maarten Lankhorst wrote: > By always keeping track of the last commit in plane_state, we know > whether there is an active update on the plane or not. With that > information we can reject the fast update, and force the slowpath > to be used as was originally intended. > > We

[Intel-gfx] [PATCH] drm/i915/opregion: Remove null check before kfree

kfree on NULL pointer is a no-op and therefore checking is redundant. Signed-off-by: Himanshu Jha --- drivers/gpu/drm/i915/intel_opregion.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_opregion.c

Re: [Intel-gfx] Supporting Intel GPU tracing in gpuvis

On Wed, Sep 6, 2017, at 03:09 AM, Chris Wilson wrote: > We already have those tracepoint equivs and a script to generate a > similar visualisation: intel-gpu-tools/scripts/trace.pl, but only > looking at the scheduling issue from the gpu pov. But it's really only a > dev toy atm, plugging the gap

Re: [Intel-gfx] [PATCH 00/13] mmu_notifier kill invalidate_page callback

On 2017-08-31 09:59 AM, Jerome Glisse wrote: > [Adding Intel folks as they might be interested in this discussion] > > On Wed, Aug 30, 2017 at 05:51:52PM -0400, Felix Kuehling wrote: >> Hi Jérôme, >> >> I have some questions about the potential range-start-end race you >> mentioned. >> >> On

Re: [Intel-gfx] [PATCH] drm/atomic: Make async plane update checks actually work as intended.

On 25.09.2017 09:43, Maarten Lankhorst wrote: > Op 24-09-17 om 16:33 schreef Dmitry Osipenko: >> On 04.09.2017 13:48, Maarten Lankhorst wrote: >>> By always keeping track of the last commit in plane_state, we know >>> whether there is an active update on the plane or not. With that >>> information

Re: [Intel-gfx] [request] bugfix patch for inclusion in the Linux 4.9 LTS series

On 09/18/2017 05:00 PM, Jani Nikula wrote: On Mon, 18 Sep 2017, Aaditya Bagga wrote: Hi there! With the Linux 4.9 series (upto 4.9.50), the GPU hangs upon resume from disk (hibernation) on a laptop with Intel Broadwell graphics. I filed a bug [1] and got to know

[Intel-gfx] [PATCH 0/4] RFC: drm: Allow driver-specific ioctls to be registered

From: Marius Vlad Currently driver-specific ioctls have to be declared static and are confined to DRM core driver. This patch series provides the means to remove those constrains and allow to register driver-specific ioctls dynamically by keeping a list of registered

Re: [Intel-gfx] [PATCH 00/13] mmu_notifier kill invalidate_page callback

On 2017-08-31 03:00 PM, Jerome Glisse wrote: > I was not saying you should not use mmu_notifier. For achieving B you need > mmu_notifier. Note that if you do like ODP/KVM then you do not need to > pin page. I would like that. I've thought about it before. The one problem I couldn't figure out is,

[Intel-gfx] [PATCH 1/4] drm/: Support registering driver-specific ioctls dynamically

From: Marius Vlad Signed-off-by: Marius Vlad Signed-off-by: Marius-Adrian Negreanu --- drivers/gpu/drm/drm_drv.c | 1 + drivers/gpu/drm/drm_ioctl.c | 99 +++-- include/drm/drm_drv.h

[Intel-gfx] [PATCH 05/14] i915: Use %pS printk format for direct addresses

Use the %pS printk format for printing symbols from direct addresses. This is important for the ia64, ppc64 and parisc64 architectures, while on other architectures there is no difference between %pS and %pF. Fix it for consistency across the kernel. Signed-off-by: Helge Deller

[Intel-gfx] Intel-gfx related suspend-to-ram issues on IBM R31

Hi Daniel, hi Ville, thanks for integrating my patches of the DVO chip of my old IBM R31. With this patch in place, dithering on the laptop works now. However, I recently upgraded to Debian Stretch, and since then, I'm having either issues with 3D acceleration or with suspend-to-RAM. Details

[Intel-gfx] [PATCH 2/4] drm/i915: Convert i915 to use ioctl_register/ioctl_deregister.

From: Marius Vlad Signed-off-by: Marius Vlad Signed-off-by: Marius-Adrian Negreanu --- drivers/gpu/drm/i915/i915_drv.c | 145 +--- 1 file changed, 78 insertions(+), 67 deletions(-) diff

[Intel-gfx] [PATCH 4/4] drm/i915: Register GEM ioctls directly in i915_gem file.

From: Marius Vlad Signed-off-by: Marius Vlad Signed-off-by: Marius-Adrian Negreanu --- drivers/gpu/drm/i915/i915_drv.c | 35 --- drivers/gpu/drm/i915/i915_gem.c | 52

Re: [Intel-gfx] [PATCH v7] drm/i915/edp: Be less aggressive about changing link config on eDP

On Tue, 2017-09-19 at 12:55 -0700, Rodrigo Vivi wrote: > On Fri, Sep 15, 2017 at 06:19:12PM +, Manasi Navare wrote: > > > > The patch looks good for eDP link training optimizations. > > > > Reviewed-by: Manasi Navare > I haven't merged this patch yet because I'd

[Intel-gfx] ✗ Fi.CI.IGT: warning for GEM/GuC Suspend/Resume/Reset fixes and restructuring (rev3)

== Series Details == Series: GEM/GuC Suspend/Resume/Reset fixes and restructuring (rev3) URL : https://patchwork.freedesktop.org/series/30802/ State : warning == Summary == Test perf: Subgroup blocking: fail -> PASS (shard-hsw) fdo#102252 Test

Re: [Intel-gfx] [PATCH 05/14] i915: Use %pS printk format for direct addresses

On Wed, Sep 06, 2017 at 10:27:52PM +0200, Helge Deller wrote: > Use the %pS printk format for printing symbols from direct addresses. > This is important for the ia64, ppc64 and parisc64 architectures, while on > other architectures there is no difference between %pS and %pF. > Fix it for

Re: [Intel-gfx] [PATCH igt] igt/gem_exec_scheduler: HAS_SCHEDULER no longer means HAS_PREEMPTION

Quoting Joonas Lahtinen (2017-09-26 13:14:39) > On Tue, 2017-09-26 at 10:32 +0100, Chris Wilson wrote: > > Michal wants to limit machines that can do preemption, which means that > > we no longer can assume that if we have a scheduler for execbuf, that > > implies we have preemption. > > > > v2:

[Intel-gfx] ✓ Fi.CI.BAT: success for igt: Add a testsuite to validate VC4 MADV ioctl

== Series Details == Series: igt: Add a testsuite to validate VC4 MADV ioctl URL : https://patchwork.freedesktop.org/series/30959/ State : success == Summary == IGT patchset tested on top of latest successful build 2885b10f99b4beeb046e75af8b8488c229f629d3 igt/gem_exec_schedule: Ignore

Re: [Intel-gfx] [PATCH i-g-t 2/2] igt: Add VC4 purgeable BO tests

Hi Chris, On Wed, 27 Sep 2017 13:07:28 +0100 Chris Wilson wrote: > Quoting Boris Brezillon (2017-09-27 12:51:18) > > Signed-off-by: Boris Brezillon > > --- > > tests/Makefile.sources | 1 + > > tests/vc4_purgeable_bo.c | 274 >

Re: [Intel-gfx] [PATCH i-g-t 2/2] igt: Add VC4 purgeable BO tests

On Wed, 27 Sep 2017 14:57:05 +0300 Petri Latvala wrote: > On Wed, Sep 27, 2017 at 01:51:18PM +0200, Boris Brezillon wrote: > > Signed-off-by: Boris Brezillon > > --- > > tests/Makefile.sources | 1 + > > tests/vc4_purgeable_bo.c

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/opregion: Remove null check before kfree

== Series Details == Series: drm/i915/opregion: Remove null check before kfree URL : https://patchwork.freedesktop.org/series/30964/ State : success == Summary == Series 30964v1 drm/i915/opregion: Remove null check before kfree

Re: [Intel-gfx] [PATCH i-g-t 2/2] igt: Add VC4 purgeable BO tests

Quoting Boris Brezillon (2017-09-27 13:41:41) > Hi Chris, > > On Wed, 27 Sep 2017 13:07:28 +0100 > Chris Wilson wrote: > > > Quoting Boris Brezillon (2017-09-27 12:51:18) > > > +static void igt_vc4_trigger_purge(int fd) > > > +{ > > > > May I suggest a

Re: [Intel-gfx] [PATCH i-g-t 2/2] igt: Add VC4 purgeable BO tests

On Wed, 27 Sep 2017 13:50:30 +0100 Chris Wilson wrote: > Quoting Boris Brezillon (2017-09-27 13:41:41) > > Hi Chris, > > > > On Wed, 27 Sep 2017 13:07:28 +0100 > > Chris Wilson wrote: > > > > > Quoting Boris Brezillon (2017-09-27 12:51:18)

[Intel-gfx] ✓ Fi.CI.BAT: success for RFC: drm: Allow driver-specific ioctls to be registered

== Series Details == Series: RFC: drm: Allow driver-specific ioctls to be registered URL : https://patchwork.freedesktop.org/series/30962/ State : success == Summary == Series 30962v1 RFC: drm: Allow driver-specific ioctls to be registered

[Intel-gfx] [PATCH i-g-t] benchmarks: Actually build LIBDRM_INTEL_BENCHMARKS

Adding LIBDRM_INTEL_BENCHMARKS into benchmarks_PROGRAMS had a tab before the assignment, making the line be inserted into the Makefile as is instead of being evaluated by automake. Signed-off-by: Petri Latvala --- benchmarks/Makefile.am | 2 +- 1 file changed, 1

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Remove pre-production Broxton register workarounds

On Wed, 27 Sep 2017, Chris Wilson wrote: > We've begun excluding pre-production Broxton machines since commit > 0102ba1fd8af ("drm/i915: Add early BXT sdv to the list of preproduction > machines"), now remove the list of workaround register values for those > early

[Intel-gfx] ✓ Fi.CI.BAT: success for benchmarks: Actually build LIBDRM_INTEL_BENCHMARKS

== Series Details == Series: benchmarks: Actually build LIBDRM_INTEL_BENCHMARKS URL : https://patchwork.freedesktop.org/series/30970/ State : success == Summary == IGT patchset tested on top of latest successful build 2885b10f99b4beeb046e75af8b8488c229f629d3 igt/gem_exec_schedule: Ignore

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