[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/icl: remove port A/E lane sharing limitation. (rev2)

== Series Details == Series: drm/i915/icl: remove port A/E lane sharing limitation. (rev2) URL : https://patchwork.freedesktop.org/series/37325/ State : success == Summary == Test kms_flip: Subgroup plain-flip-ts-check: pass -> FAIL (shard-hsw) fdo#100368

[Intel-gfx] [PATCH] disable-gem-trace

--- drivers/gpu/drm/i915/i915_gem.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_gem.h b/drivers/gpu/drm/i915/i915_gem.h index e920dab7f1b8..4e46a9fdabd0 100644 --- a/drivers/gpu/drm/i915/i915_gem.h +++ b/drivers/gpu/drm/i915/i915_gem.h @@ -48,7

Re: [Intel-gfx] [PATCH v2] drm/i915: Move the scheduler feature bits into the purview of the engines

Chris Wilson writes: > Rather than having the high level ioctl interface guess the underlying > implementation details, having the implementation declare what > capabilities it exports. We define an intel_driver_caps, similar to the > intel_device_info, which instead of

Re: [Intel-gfx] [PATCH] drm/i915: Enable inject_load_failure only in DEBUG config

Quoting Michal Wajdeczko (2018-02-01 17:32:48) > We're using i915_inject_load_failure() to inject dummy > faults during driver load, but since this is debug utility > we shouldn't expose it in default config as it consumes > both code and data. > > add/remove: 0/1 grow/shrink: 0/2 up/down: 0/-302

Re: [Intel-gfx] [PATCH 4/8] drm/i915: Retry HDCP BKSV read

On Friday 02 February 2018 07:46 PM, Sean Paul wrote: On Fri, Feb 02, 2018 at 04:15:16PM +0530, Ramalingam C wrote: When BKSV is invalid, to mitigate any communication errors, BKSV is read once again. Why is the Bksv read any more volatile than other reads? If the channel is noisy, the

Re: [Intel-gfx] [PATCH 7/8] drm/i915: Reauthenticate HDCP on failure

On Fri, Feb 02, 2018 at 04:15:19PM +0530, Ramalingam C wrote: > When HDCP authentication fails, we add two more reauthentication. > This will address all reauth expectation from compliance perspective. > > Signed-off-by: Ramalingam C > --- >

Re: [Intel-gfx] [PATCH 2/8] drm/i915: Stop encryption for repeater with no sink

On Friday 02 February 2018 08:18 PM, Sean Paul wrote: On Fri, Feb 02, 2018 at 07:42:47PM +0530, Ramalingam C wrote: On Friday 02 February 2018 07:43 PM, Sean Paul wrote: On Fri, Feb 02, 2018 at 04:15:14PM +0530, Ramalingam C wrote: If a HDCP repeater is detected with zero hdcp

Re: [Intel-gfx] [PATCH 2/8] drm/i915: Stop encryption for repeater with no sink

On Fri, Feb 02, 2018 at 08:33:38PM +0530, Ramalingam C wrote: > > > On Friday 02 February 2018 08:18 PM, Sean Paul wrote: > > On Fri, Feb 02, 2018 at 07:42:47PM +0530, Ramalingam C wrote: > > > > > > On Friday 02 February 2018 07:43 PM, Sean Paul wrote: > > > > On Fri, Feb 02, 2018 at

Re: [Intel-gfx] [PATCH 5/8] drm/i915: Optimize HDCP key load

On Fri, Feb 2, 2018 at 9:33 AM, Ramalingam C wrote: > > > On Friday 02 February 2018 07:48 PM, Sean Paul wrote: >> >> On Fri, Feb 02, 2018 at 04:15:17PM +0530, Ramalingam C wrote: >>> >>> HDCP key need not be cleared on each hdcp disable. And HDCP key Load >>> is skipped

[Intel-gfx] [PATCH] drm/i915/icl: remove port A/E lane sharing limitation.

Platforms before Gen11 were sharing lanes between port-A & port-E. This limitation is no more there. Changes since V1: - optimize the code (Shashank/Jani) - create helper function to get max lanes (ville) Changes since V2: - Include BIOS fail fix-up in same helper function (ville)

Re: [Intel-gfx] [PATCH] drm/i915/icl: remove port A/E lane sharing limitation.

On Fri, 02 Feb 2018, Mahesh Kumar wrote: > Platforms before Gen11 were sharing lanes between port-A & port-E. > This limitation is no more there. > > Changes since V1: > - optimize the code (Shashank/Jani) > - create helper function to get max lanes (ville) > Changes

Re: [Intel-gfx] [PATCH 4/8] drm/i915: Retry HDCP BKSV read

On Fri, Feb 02, 2018 at 04:15:16PM +0530, Ramalingam C wrote: > When BKSV is invalid, to mitigate any communication errors, > BKSV is read once again. Why is the Bksv read any more volatile than other reads? If the channel is noisy, the retries should be done in the shim implementation (I think

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with disable-gem-trace (rev3)

== Series Details == Series: series starting with disable-gem-trace (rev3) URL : https://patchwork.freedesktop.org/series/37473/ State : success == Summary == Series 37473v3 series starting with disable-gem-trace https://patchwork.freedesktop.org/api/1.0/series/37473/revisions/3/mbox/ Test

Re: [Intel-gfx] [PATCH v2] drm/i915: Move the scheduler feature bits into the purview of the engines

So the functional purpose of this patch is to provide capabilities (including preemption status) within error information. I agree this is required. On 2018-02-01 20:02, Chris Wilson wrote: Rather than having the high level ioctl interface guess the underlying implementation details, having

Re: [Intel-gfx] [PATCH 1/8] drm/i915: Handle failure from 2nd stage HDCP auth

On Friday 02 February 2018 07:39 PM, Sean Paul wrote: On Fri, Feb 02, 2018 at 04:15:13PM +0530, Ramalingam C wrote: We enable the HDCP encryption as a part of first stage authentication. So when second stage authentication fails, we need to disable the HDCP encryption and signalling. This

[Intel-gfx] [PATCH] drm/crc: Add support for polling on the data fd.

This will make it possible for userspace to know whether reading will block, without blocking on the fd. This makes it possible to drain all queued CRC's in blocking mode, without having to reopen the fd. Signed-off-by: Maarten Lankhorst ---

[Intel-gfx] ✓ Fi.CI.BAT: success for tools/intel_reg: Fix segfault in intel_reg dump (rev2)

== Series Details == Series: tools/intel_reg: Fix segfault in intel_reg dump (rev2) URL : https://patchwork.freedesktop.org/series/37537/ State : success == Summary == IGT patchset tested on top of latest successful build a20a69e25a18ec63236633b804d89cc0c0cea259 overlay: fix invalid pointer

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/icl: remove port A/E lane sharing limitation. (rev2)

== Series Details == Series: drm/i915/icl: remove port A/E lane sharing limitation. (rev2) URL : https://patchwork.freedesktop.org/series/37325/ State : success == Summary == Series 37325v2 drm/i915/icl: remove port A/E lane sharing limitation.

Re: [Intel-gfx] [PATCH v4 7/7] drm/i915: Add YCBCR 4:2:0/4:4:4 support for LSPCON

On Fri, Feb 02, 2018 at 11:44:01AM +0530, Sharma, Shashank wrote: > Regards > > Shashank > > > On 2/2/2018 12:39 AM, Ville Syrjälä wrote: > > On Tue, Jan 30, 2018 at 03:06:03PM +0530, Shashank Sharma wrote: > >> From: "Sharma, Shashank" > >> > >> LSPCON chips can

Re: [Intel-gfx] [PATCH 4/8] drm/i915: Retry HDCP BKSV read

On Fri, Feb 02, 2018 at 07:56:22PM +0530, Ramalingam C wrote: > > > On Friday 02 February 2018 07:46 PM, Sean Paul wrote: > > On Fri, Feb 02, 2018 at 04:15:16PM +0530, Ramalingam C wrote: > > > When BKSV is invalid, to mitigate any communication errors, > > > BKSV is read once again. > > Why is

Re: [Intel-gfx] [PATCH 6/8] drm/i915: Detect panel's hdcp capability

On Friday 02 February 2018 07:54 PM, Sean Paul wrote: On Fri, Feb 02, 2018 at 04:15:18PM +0530, Ramalingam C wrote: As a first step of HDCP authentication detects the panel's HDCP capability. This is mandated for DP HDCP1.4. For DP 0th Bit of Bcaps register indicates the panel's hdcp

Re: [Intel-gfx] [PATCH 1/8] drm/i915: Handle failure from 2nd stage HDCP auth

On Friday 02 February 2018 08:15 PM, Sean Paul wrote: On Fri, Feb 02, 2018 at 07:52:24PM +0530, Ramalingam C wrote: On Friday 02 February 2018 07:39 PM, Sean Paul wrote: On Fri, Feb 02, 2018 at 04:15:13PM +0530, Ramalingam C wrote: We enable the HDCP encryption as a part of first stage

Re: [Intel-gfx] [PATCH v4 1/7] drm/i915: Add CRTC output format YCBCR 4:2:0

On Fri, Feb 02, 2018 at 11:38:07AM +0530, Sharma, Shashank wrote: > Thanks for the comments, mine inline. > > Regards > Shashank > On 2/2/2018 12:39 AM, Ville Syrjälä wrote: > > On Tue, Jan 30, 2018 at 03:05:57PM +0530, Shashank Sharma wrote: > >> From: "Sharma, Shashank"

Re: [Intel-gfx] [PATCH 3/8] drm/i915: Connector info in HDCP debug msgs

On Fri, Feb 02, 2018 at 04:15:15PM +0530, Ramalingam C wrote: > When HDCP authentication is triggered on multiple connector, having > connector name and ID in debug message will be more informative. > > Signed-off-by: Ramalingam C > --- >

Re: [Intel-gfx] [PATCH 5/8] drm/i915: Optimize HDCP key load

On Fri, Feb 02, 2018 at 04:15:17PM +0530, Ramalingam C wrote: > HDCP key need not be cleared on each hdcp disable. And HDCP key Load > is skipped if key is already loaded. > I had previously encountered issues without clearing the key in my testing. IIRC, without clearing the keys things acted

Re: [Intel-gfx] [PATCH 2/8] drm/i915: Stop encryption for repeater with no sink

On Friday 02 February 2018 07:43 PM, Sean Paul wrote: On Fri, Feb 02, 2018 at 04:15:14PM +0530, Ramalingam C wrote: If a HDCP repeater is detected with zero hdcp authenticated downstream devices, there are two option as below: 1. Dont continue on second stage authentication. Disable

Re: [Intel-gfx] [PATCH 1/8] drm/i915: Handle failure from 2nd stage HDCP auth

On Fri, Feb 02, 2018 at 07:52:24PM +0530, Ramalingam C wrote: > > > On Friday 02 February 2018 07:39 PM, Sean Paul wrote: > > On Fri, Feb 02, 2018 at 04:15:13PM +0530, Ramalingam C wrote: > > > We enable the HDCP encryption as a part of first stage authentication. > > > So when second stage

[Intel-gfx] [CI] drm/i915: reduce indent in pch detection

Save some horizontal space. Reviewed-by: David Weinehall Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_drv.c | 189 1 file changed, 96 insertions(+), 93 deletions(-) diff --git

[Intel-gfx] ✓ Fi.CI.IGT: success for tools/intel_reg: Fix segfault in intel_reg dump

== Series Details == Series: tools/intel_reg: Fix segfault in intel_reg dump URL : https://patchwork.freedesktop.org/series/37537/ State : success == Summary == Test kms_cursor_legacy: Subgroup flip-vs-cursor-toggle: pass -> FAIL (shard-snb) fdo#102670 Test

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: reduce indent in pch detection

== Series Details == Series: drm/i915: reduce indent in pch detection URL : https://patchwork.freedesktop.org/series/37547/ State : success == Summary == Series 37547v1 drm/i915: reduce indent in pch detection https://patchwork.freedesktop.org/api/1.0/series/37547/revisions/1/mbox/

Re: [Intel-gfx] [PATCH i-g-t] tools/intel_reg: Fix segfault in intel_reg dump

Mika Kuoppala writes: > We need to zero out the builtin reg spec we are parsing into. > Otherwise engine will be uninitialized and we segfault when trying > to find engine and accessing reg->engine in later stage. > Chris combined both file and builting based

Re: [Intel-gfx] [PATCH 1/8] drm/i915: Handle failure from 2nd stage HDCP auth

On Fri, Feb 02, 2018 at 04:15:13PM +0530, Ramalingam C wrote: > We enable the HDCP encryption as a part of first stage authentication. > So when second stage authentication fails, we need to disable the HDCP > encryption and signalling. > > This patch handles above requirement. > > For reusing

Re: [Intel-gfx] [PATCH 6/8] drm/i915: Detect panel's hdcp capability

On Fri, Feb 02, 2018 at 04:15:18PM +0530, Ramalingam C wrote: > As a first step of HDCP authentication detects the panel's HDCP > capability. This is mandated for DP HDCP1.4. > > For DP 0th Bit of Bcaps register indicates the panel's hdcp capability > For HDMI valid BKSV indicates the panel's

Re: [Intel-gfx] [PATCH 2/8] drm/i915: Stop encryption for repeater with no sink

On Fri, Feb 02, 2018 at 07:42:47PM +0530, Ramalingam C wrote: > > > On Friday 02 February 2018 07:43 PM, Sean Paul wrote: > > On Fri, Feb 02, 2018 at 04:15:14PM +0530, Ramalingam C wrote: > > > If a HDCP repeater is detected with zero hdcp authenticated > > > downstream devices, there are two

Re: [Intel-gfx] [PATCH 1/8] drm/i915: Handle failure from 2nd stage HDCP auth

On Fri, Feb 2, 2018 at 9:51 AM, Ramalingam C wrote: > > > On Friday 02 February 2018 08:15 PM, Sean Paul wrote: >> >> On Fri, Feb 02, 2018 at 07:52:24PM +0530, Ramalingam C wrote: >>> >>> >>> On Friday 02 February 2018 07:39 PM, Sean Paul wrote: On Fri, Feb 02,

Re: [Intel-gfx] clang warning: implicit conversion in intel_ddi.c:1481

On Fri, Feb 02, 2018 at 12:44:38PM +0200, Jani Nikula wrote: > > +Knut, Fengguang > > On Fri, 02 Feb 2018, Greg KH wrote: > > - If clang now builds the kernel "cleanly", yes, I want to take > > warning fixes in the stable tree. And even better yet, if you

[Intel-gfx] [PATCH i-g-t] tools/intel_reg: Fix segfault in intel_reg dump

We need to zero out the builtin reg spec we are parsing into. Otherwise engine will be uninitialized and we segfault when trying to find engine and accessing reg->engine in later stage. v2: use {} (Jani) Fixes: 7f0be0e7d9be ("tools/intel_reg: Add reading and writing registers through engine")

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: reduce indent in pch detection

== Series Details == Series: drm/i915: reduce indent in pch detection URL : https://patchwork.freedesktop.org/series/37547/ State : success == Summary == Test kms_vblank: Subgroup pipe-a-ts-continuation-suspend: fail -> PASS (shard-hsw) fdo#104783 Test

Re: [Intel-gfx] [PATCH 8/8] drm/i915: fix misalignment in HDCP register def

On Fri, Feb 02, 2018 at 04:15:20PM +0530, Ramalingam C wrote: > This patch aligns all definitions of hdcp registers and their bits. Ah, thanks! I think these got mangled when I dropped the SKL_ prefix. Reviewed-by: Sean Paul > > Signed-off-by: Ramalingam C

Re: [Intel-gfx] clang warning: implicit conversion in intel_ddi.c:1481

On Fri, 02 Feb 2018, Greg KH wrote: > On Fri, Feb 02, 2018 at 12:44:38PM +0200, Jani Nikula wrote: >> >> +Knut, Fengguang >> >> On Fri, 02 Feb 2018, Greg KH wrote: >> >- If clang now builds the kernel "cleanly", yes, I want to take >>

Re: [Intel-gfx] [PATCH 5/8] drm/i915: Optimize HDCP key load

On Friday 02 February 2018 07:48 PM, Sean Paul wrote: On Fri, Feb 02, 2018 at 04:15:17PM +0530, Ramalingam C wrote: HDCP key need not be cleared on each hdcp disable. And HDCP key Load is skipped if key is already loaded. I had previously encountered issues without clearing the key in my

Re: [Intel-gfx] [PATCH] drm/crc: Add support for polling on the data fd.

On Fri, Feb 02, 2018 at 03:27:43PM +0100, Maarten Lankhorst wrote: > This will make it possible for userspace to know whether reading > will block, without blocking on the fd. This makes it possible to > drain all queued CRC's in blocking mode, without having to reopen > the fd. > >

[Intel-gfx] [PATCH] drm/i915/execlists: Flush GTIIR on clearing CS interrupts during reset

Be paranoid and flush the GTIIR after clearing the CS interrupt to be sure it has taken before we re-enable the interrupt handler. We still see early interrupts following reset, the tasklet handling the mmio read before it has been written by the CS. This hopefully reduces the frequency to 0...

Re: [Intel-gfx] [PATCH 7/8] drm/i915: Reauthenticate HDCP on failure

On Friday 02 February 2018 08:07 PM, Sean Paul wrote: On Fri, Feb 02, 2018 at 04:15:19PM +0530, Ramalingam C wrote: When HDCP authentication fails, we add two more reauthentication. This will address all reauth expectation from compliance perspective. Signed-off-by: Ramalingam C

[Intel-gfx] ✗ Fi.CI.IGT: failure for Adhering to HDCP1.4 Compliance Test Spec

== Series Details == Series: Adhering to HDCP1.4 Compliance Test Spec URL : https://patchwork.freedesktop.org/series/37539/ State : failure == Summary == Test perf: Subgroup blocking: fail -> PASS (shard-hsw) fdo#102252 Subgroup oa-exponents:

Re: [Intel-gfx] [PATCH 2/8] drm/i915: Stop encryption for repeater with no sink

On Fri, Feb 02, 2018 at 04:15:14PM +0530, Ramalingam C wrote: > If a HDCP repeater is detected with zero hdcp authenticated > downstream devices, there are two option as below: > > 1. Dont continue on second stage authentication. Disable encryption. > 2. Continue with second stage authentication

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/crc: Add support for polling on the data fd.

== Series Details == Series: drm/crc: Add support for polling on the data fd. URL : https://patchwork.freedesktop.org/series/37550/ State : warning == Summary == Series 37550v1 drm/crc: Add support for polling on the data fd.

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Flush GTIIR on clearing CS interrupts during reset

== Series Details == Series: drm/i915/execlists: Flush GTIIR on clearing CS interrupts during reset URL : https://patchwork.freedesktop.org/series/37552/ State : success == Summary == Series 37552v1 drm/i915/execlists: Flush GTIIR on clearing CS interrupts during reset

[Intel-gfx] ✗ Fi.CI.BAT: failure for ICL display initialization and some plane bits (rev4)

== Series Details == Series: ICL display initialization and some plane bits (rev4) URL : https://patchwork.freedesktop.org/series/36993/ State : failure == Summary == Series 36993v4 ICL display initialization and some plane bits

[Intel-gfx] [PATCH] sna: CustomEDID fix

Hello, For my HTPC setup, I'm using the option "CustomEDID". With this option, output attaching and destroying events leads to crashes. The following sequence leads to a crash: - In xorg.conf: Option "CustomEDID" "HDMI2:/etc/my_edid.bin" - Starting Xorg - Connect HDMI2 - Disconnect HDMI2 -

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Free memdup-ed bios data structures on driver_unload

On Mon, Jan 29, 2018 at 03:47:34PM +0100, Hans de Goede wrote: > Add a new intel_bios_cleanup function to free memdup-ed bios data > structures and call it from i915_driver_unload(). > > Signed-off-by: Hans de Goede > --- > drivers/gpu/drm/i915/i915_drv.c | 2 ++ >

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Remove spurious DRM_ERROR for cancelled interrupts

== Series Details == Series: drm/i915: Remove spurious DRM_ERROR for cancelled interrupts URL : https://patchwork.freedesktop.org/series/37558/ State : success == Summary == Series 37558v1 drm/i915: Remove spurious DRM_ERROR for cancelled interrupts

Re: [Intel-gfx] [PATCH] drm/i915: Remove Firmware URL.

>-Original Message- >From: Chris Wilson [mailto:ch...@chris-wilson.co.uk] >Sent: Tuesday, January 30, 2018 1:06 AM >To: Vivi, Rodrigo >Cc: Srivatsa, Anusha ; intel- >g...@lists.freedesktop.org >Subject: Re: [Intel-gfx] [PATCH] drm/i915:

[Intel-gfx] [PATCH] drm/i915: Remove spurious DRM_ERROR for cancelled interrupts

As we ourselves cancel interrupts during reset by clearing the GTIIR, it is possible for the master IIR to indicate a pending IRQ for which we have already cleared from the GTIIR. In this case, the DRM_ERROR are intended and should not be flagged as an error. Signed-off-by: Chris Wilson

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Fix DSI panels with v1 MIPI sequences without a DEASSERT sequence v3

On Mon, Jan 29, 2018 at 03:47:35PM +0100, Hans de Goede wrote: > So far models of the Dell Venue 8 Pro, with a panel with MIPI panel > index = 3, one of which has been kindly provided to me by Jan Brummer, > where not working with the i915 driver, giving a black screen on the > first modeset. > >

[Intel-gfx] ✗ Fi.CI.IGT: warning for tools/intel_reg: Fix segfault in intel_reg dump (rev2)

== Series Details == Series: tools/intel_reg: Fix segfault in intel_reg dump (rev2) URL : https://patchwork.freedesktop.org/series/37537/ State : warning == Summary == Test kms_flip_tiling: Subgroup flip-changes-tiling-yf: pass -> FAIL (shard-apl)

Re: [Intel-gfx] [PATCH] drm/i915: Remove spurious DRM_ERROR for cancelled interrupts

Quoting Ville Syrjälä (2018-02-02 16:03:36) > On Fri, Feb 02, 2018 at 03:34:48PM +, Chris Wilson wrote: > > As we ourselves cancel interrupts during reset by clearing the GTIIR, it > > is possible for the master IIR to indicate a pending IRQ for which we > > have already cleared from the

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with disable-gem-trace (rev3)

== Series Details == Series: series starting with disable-gem-trace (rev3) URL : https://patchwork.freedesktop.org/series/37473/ State : failure == Summary == Test kms_flip: Subgroup 2x-flip-vs-blocking-wf-vblank: pass -> FAIL (shard-hsw) Subgroup

[Intel-gfx] [PATCH 02/17] drm/i915/icl: add ICL support to cnl_set_procmon_ref_values

On ICL we have two sets of registers: one for port A and another for port B. The set of port A registers is the same as the CNL registers. Since the procmon table on ICL is the same we want to reuse the CNL function. To do that we add a port argument and make CNL always call the function passing

Re: [Intel-gfx] [PATCH] drm/i915/execlists: Flush GTIIR on clearing CS interrupts during reset

On 2/2/2018 6:54 AM, Chris Wilson wrote: Be paranoid and flush the GTIIR after clearing the CS interrupt to be sure it has taken before we re-enable the interrupt handler. We still see early interrupts following reset, the tasklet handling the mmio read before it has been written by the CS. This

[Intel-gfx] ✗ Fi.CI.BAT: failure for ICL display initialization and some plane bits (rev4)

== Series Details == Series: ICL display initialization and some plane bits (rev4) URL : https://patchwork.freedesktop.org/series/36993/ State : failure == Summary == Series 36993v4 ICL display initialization and some plane bits

Re: [Intel-gfx] [PATCH] drm/i915/execlists: Flush GTIIR on clearing CS interrupts during reset

Quoting Michel Thierry (2018-02-02 16:49:49) > On 2/2/2018 6:54 AM, Chris Wilson wrote: > > Be paranoid and flush the GTIIR after clearing the CS interrupt to be > > sure it has taken before we re-enable the interrupt handler. We still > > see early interrupts following reset, the tasklet handling

Re: [Intel-gfx] [PATCH 02/17] drm/i915/icl: add ICL support to cnl_set_procmon_ref_values

On Fri, Feb 02, 2018 at 02:23:04PM -0200, Paulo Zanoni wrote: > On ICL we have two sets of registers: one for port A and another for > port B. The set of port A registers is the same as the CNL registers. > > Since the procmon table on ICL is the same we want to reuse the CNL > function. To do

Re: [Intel-gfx] [PATCH 1/8] drm/i915: Handle failure from 2nd stage HDCP auth

On Friday 02 February 2018 08:52 PM, Sean Paul wrote: On Fri, Feb 2, 2018 at 9:51 AM, Ramalingam C wrote: On Friday 02 February 2018 08:15 PM, Sean Paul wrote: On Fri, Feb 02, 2018 at 07:52:24PM +0530, Ramalingam C wrote: On Friday 02 February 2018 07:39 PM, Sean

Re: [Intel-gfx] [PATCH 6/8] drm/i915: Detect panel's hdcp capability

On Fri, Feb 02, 2018 at 08:08:44PM +0530, Ramalingam C wrote: > > > On Friday 02 February 2018 07:54 PM, Sean Paul wrote: > > On Fri, Feb 02, 2018 at 04:15:18PM +0530, Ramalingam C wrote: > > > As a first step of HDCP authentication detects the panel's HDCP > > > capability. This is mandated for

Re: [Intel-gfx] [PATCH] drm/i915: Remove spurious DRM_ERROR for cancelled interrupts

On Fri, Feb 02, 2018 at 05:31:57PM +, Chris Wilson wrote: > Quoting Ville Syrjälä (2018-02-02 16:03:36) > > On Fri, Feb 02, 2018 at 03:34:48PM +, Chris Wilson wrote: > > > As we ourselves cancel interrupts during reset by clearing the GTIIR, it > > > is possible for the master IIR to

Re: [Intel-gfx] clang warning: implicit conversion in intel_ddi.c:1481

On Fri, Feb 02, 2018 at 04:37:55PM +0200, Jani Nikula wrote: > On Fri, 02 Feb 2018, Greg KH wrote: > > On Fri, Feb 02, 2018 at 12:44:38PM +0200, Jani Nikula wrote: > >> > >> +Knut, Fengguang > >> > >> On Fri, 02 Feb 2018, Greg KH wrote: >

Re: [Intel-gfx] [PATCH] drm/i915: Remove spurious DRM_ERROR for cancelled interrupts

On Fri, Feb 02, 2018 at 03:34:48PM +, Chris Wilson wrote: > As we ourselves cancel interrupts during reset by clearing the GTIIR, it > is possible for the master IIR to indicate a pending IRQ for which we > have already cleared from the GTIIR. In this case, the DRM_ERROR are > intended and

[Intel-gfx] [PATCH] drm/i915/pmu: Fix PMU enable vs execlists tasklet race

From: Tvrtko Ursulin Commit 99e48bf98dd0 ("drm/i915: Lock out execlist tasklet while peeking inside for busy-stats") added a tasklet_disable call in busy stats enabling, but we failed to understand that the PMU enable callback runs as an hard IRQ (IPI). Consequence of

[Intel-gfx] [PATCH v2 3/8] drm/i915: Connector info in HDCP debug msgs

When HDCP authentication is triggered on multiple connector, having connector name and ID in debug message will be more informative. v2: Added logs with connector info at the start of en/disable [Seanpaul] Added the connector info into Check link failure msgs too. Signed-off-by: Ramalingam C

[Intel-gfx] [PATCH v2 1/8] drm/i915: Handle failure from 2nd stage HDCP auth

We enable the HDCP encryption as a part of first stage authentication. So when second stage authentication fails, we need to disable the HDCP encryption and signalling. This patch ensures that, when hdcp authentication fails, HDCP encryption and signalling is turned off. v2: Dropped connector

[Intel-gfx] [PATCH v2 4/8] drm/i915: Retry HDCP bksv read

HDCP specification says that when bksv is identified as invalid (not with 20 1s), bksv should be re-read and verified. This patch adds the above mentioned re-read for bksv. v2: Rephrased the commit msg [Seanpaul] Signed-off-by: Ramalingam C ---

[Intel-gfx] [PATCH v2 2/8] drm/i915: Stop encryption for repeater with no sink

If a HDCP repeater is detected with zero downstream devices, HDCP spec approves either of below actions: 1. Dont continue on second stage authentication. Disable encryption. 2. Continue with second stage authentication excluding the KSV list and on success, continue encryption. Since disable

[Intel-gfx] ✗ Fi.CI.BAT: warning for Adhering to HDCP1.4 Compliance Test Spec (rev2)

== Series Details == Series: Adhering to HDCP1.4 Compliance Test Spec (rev2) URL : https://patchwork.freedesktop.org/series/37539/ State : warning == Summary == Series 37539v2 Adhering to HDCP1.4 Compliance Test Spec https://patchwork.freedesktop.org/api/1.0/series/37539/revisions/2/mbox/

[Intel-gfx] ✗ Fi.CI.BAT: failure for ICL display initialization and some plane bits (rev5)

== Series Details == Series: ICL display initialization and some plane bits (rev5) URL : https://patchwork.freedesktop.org/series/36993/ State : failure == Summary == Series 36993v5 ICL display initialization and some plane bits

Re: [Intel-gfx] [PATCH xf86-video-intel] sna/video: Try to use hw scaling with SKL+ sprites

Quoting Ville Syrjala (2018-02-02 20:42:52) > From: Ville Syrjälä > > SKL reintroduced plane scaling once more. Let's try to make use of it. > > The one annoying caveat is that you can't do colorkeying and scaling at > the same time :( For now we'll leave the

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/pmu: Fix PMU enable vs execlists tasklet race

== Series Details == Series: drm/i915/pmu: Fix PMU enable vs execlists tasklet race URL : https://patchwork.freedesktop.org/series/37575/ State : success == Summary == Test perf: Subgroup enable-disable: fail -> PASS (shard-apl) fdo#103715 Subgroup

Re: [Intel-gfx] [PATCH] drm/i915/pmu: Fix PMU enable vs execlists tasklet race

Quoting Tvrtko Ursulin (2018-02-02 18:38:16) > From: Tvrtko Ursulin > > Commit 99e48bf98dd0 ("drm/i915: Lock out execlist tasklet while peeking > inside for busy-stats") added a tasklet_disable call in busy stats > enabling, but we failed to understand that the PMU

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Fix DSI panels with v1 MIPI sequences without a DEASSERT sequence v3

On Fri, 02 Feb 2018, Ville Syrjälä wrote: > On Mon, Jan 29, 2018 at 03:47:35PM +0100, Hans de Goede wrote: >> So far models of the Dell Venue 8 Pro, with a panel with MIPI panel >> index = 3, one of which has been kindly provided to me by Jan Brummer, >> where not

Re: [Intel-gfx] [PATCH] sna: CustomEDID fix

On Fri, 02 Feb 2018, dom.const...@free.fr wrote: > For my HTPC setup, I'm using the option "CustomEDID". > With this option, output attaching and destroying events leads to crashes. > > The following sequence leads to a crash: > - In xorg.conf: Option "CustomEDID" "HDMI2:/etc/my_edid.bin" I know

Re: [Intel-gfx] i915 PSR test results and cursor lag

On Fri, Feb 2, 2018 at 1:24 AM, Andy Lutomirski wrote: > On Thu, Feb 1, 2018 at 9:20 PM, Chris Wilson wrote: >> Quoting Andy Lutomirski (2018-02-01 21:04:30) >>> I got this after a recent suspend/resume: >>> >>> Feb 01 09:44:34 laptop

[Intel-gfx] [PATCH 01/17] drm/i915/icl: add the main CDCLK functions

This commit adds the basic CDCLK functions, but it's still missing pieces of the display initialization sequence. v2: - Implement the voltage levels. - Rebase. v3: - Adjust to the new "bypass" clock (Imre). - Call intel_dump_cdclk_state() too. - Rename a variable to avoid confusion. -

[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Remove spurious DRM_ERROR for cancelled interrupts

== Series Details == Series: drm/i915: Remove spurious DRM_ERROR for cancelled interrupts URL : https://patchwork.freedesktop.org/series/37558/ State : warning == Summary == Test kms_flip: Subgroup 2x-plain-flip-ts-check: fail -> PASS (shard-hsw)

Re: [Intel-gfx] [PATCH v2 4/8] drm/i915: Retry HDCP bksv read

On Sat, Feb 03, 2018 at 01:41:32AM +0530, Ramalingam C wrote: > HDCP specification says that when bksv is identified as invalid > (not with 20 1s), bksv should be re-read and verified. > > This patch adds the above mentioned re-read for bksv. > > v2: > Rephrased the commit msg [Seanpaul] > >

Re: [Intel-gfx] [PATCH] sna: CustomEDID fix

Quoting dom.const...@free.fr (2018-02-02 18:37:12) > Hello, > > For my HTPC setup, I'm using the option "CustomEDID". > With this option, output attaching and destroying events leads to crashes. > > The following sequence leads to a crash: > - In xorg.conf: Option "CustomEDID"

Re: [Intel-gfx] i915 PSR test results and cursor lag

Quoting Andy Lutomirski (2018-02-02 19:23:33) > On Fri, Feb 2, 2018 at 7:18 PM, Andy Lutomirski wrote: > > On Fri, Feb 2, 2018 at 1:24 AM, Andy Lutomirski wrote: > >> Anyway, this is all on a 4.14 kernel. I should update to 4.16 and see > >> what happens. > > >

[Intel-gfx] [RFC 0/3] drm/i915: nuke pch type :o

I was wondering how to clean up intel_virt_detect_pch(), also in a more future compatible manner, and came up with this idea. Is the text size increase in patch 3/3 too bad, that is the question. BR, Jani. Jani Nikula (3): drm/i915: introduce INTEL_PCH_ID() and use it drm/i915/debugfs:

[Intel-gfx] [RFC 1/3] drm/i915: introduce INTEL_PCH_ID() and use it

Prepare for more widespread use of PCH id. No functional changes. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_drv.h | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h

[Intel-gfx] [RFC 2/3] drm/i915/debugfs: print PCH id instead of PCH type in i915 capabilities

Preparation for future patches. Split this out to highlight the debugfs change. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_debugfs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c

[Intel-gfx] [RFC 3/3] drm/i915: obliterate PCH types in favour of direct PCH id use

The PCH type is an unnecessary level of abstraction that's an extra maintenance burden. Switch to using PCH ids directly. This also simplifies the virtual PCH detection. The downside is code size increase for conditions that match several PCH ids: text data bss dec hex

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/execlists: Flush GTIIR on clearing CS interrupts during reset

== Series Details == Series: drm/i915/execlists: Flush GTIIR on clearing CS interrupts during reset URL : https://patchwork.freedesktop.org/series/37552/ State : success == Summary == Test perf: Subgroup blocking: fail -> PASS (shard-hsw) fdo#102252

[Intel-gfx] [PATCH] drm/i915: Deprecate I915_SET_COLORKEY_NONE

From: Ville Syrjälä Deprecate the silly I915_SET_COLORKEY_NONE flag. The obvious way to disable colorkey is to just set flags to 0, which is exactly what the intel ddx has been doing all along. Currently when userspace sets the flags to 0, we end up in a funny

[Intel-gfx] [PATCH xf86-video-intel] sna/video: Try to use hw scaling with SKL+ sprites

From: Ville Syrjälä SKL reintroduced plane scaling once more. Let's try to make use of it. The one annoying caveat is that you can't do colorkeying and scaling at the same time :( For now we'll leave the choice of colorkey vs. scaling to the user via that

Re: [Intel-gfx] [PATCH v2 2/8] drm/i915: Stop encryption for repeater with no sink

On Sat, Feb 03, 2018 at 01:41:30AM +0530, Ramalingam C wrote: > If a HDCP repeater is detected with zero downstream devices, > HDCP spec approves either of below actions: > > 1. Dont continue on second stage authentication. Disable encryption. > 2. Continue with second stage authentication

Re: [Intel-gfx] [PATCH v2 3/8] drm/i915: Connector info in HDCP debug msgs

On Sat, Feb 03, 2018 at 01:41:31AM +0530, Ramalingam C wrote: > When HDCP authentication is triggered on multiple connector, having > connector name and ID in debug message will be more informative. > > v2: > Added logs with connector info at the start of en/disable [Seanpaul] > Added the

Re: [Intel-gfx] [PATCH] drm/i915: Deprecate I915_SET_COLORKEY_NONE

Quoting Ville Syrjala (2018-02-02 20:42:31) > From: Ville Syrjälä > > Deprecate the silly I915_SET_COLORKEY_NONE flag. The obvious > way to disable colorkey is to just set flags to 0, which is > exactly what the intel ddx has been doing all along. I can confirm

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pmu: Fix PMU enable vs execlists tasklet race

== Series Details == Series: drm/i915/pmu: Fix PMU enable vs execlists tasklet race URL : https://patchwork.freedesktop.org/series/37575/ State : success == Summary == Series 37575v1 drm/i915/pmu: Fix PMU enable vs execlists tasklet race

Re: [Intel-gfx] i915 PSR test results and cursor lag

On Fri, Feb 2, 2018 at 7:18 PM, Andy Lutomirski wrote: > On Fri, Feb 2, 2018 at 1:24 AM, Andy Lutomirski wrote: >> On Thu, Feb 1, 2018 at 9:20 PM, Chris Wilson >> wrote: >>> Quoting Andy Lutomirski (2018-02-01 21:04:30) I got

Re: [Intel-gfx] [PATCH] drm/i915: Remove spurious DRM_ERROR for cancelled interrupts

Quoting Ville Syrjälä (2018-02-02 17:44:58) > On Fri, Feb 02, 2018 at 05:31:57PM +, Chris Wilson wrote: > > I think we're okay with just using the master IIR for IRQ_NONE / > > IRQ_HANDLED as that is the interrupt generator aiui. If the child > > sources disagree that's another issue, but as

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: nuke pch type :o

== Series Details == Series: drm/i915: nuke pch type :o URL : https://patchwork.freedesktop.org/series/37581/ State : success == Summary == Series 37581v1 drm/i915: nuke pch type :o https://patchwork.freedesktop.org/api/1.0/series/37581/revisions/1/mbox/ Test debugfs_test: Subgroup

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