[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/audio: Fix audio detection issue on GLK (rev3)

== Series Details == Series: drm/i915/audio: Fix audio detection issue on GLK (rev3) URL : https://patchwork.freedesktop.org/series/41334/ State : failure == Summary == Applying: drm/i915/audio: Fix audio detection issue on GLK Using index info to reconstruct a base tree... M

Re: [Intel-gfx] [PATCH v3] drm/i915: set minimum CD clock to twice the BCLK.

On Tue, 17 Apr 2018, "Kumar, Abhay" wrote: > On 4/17/2018 12:06 PM, Abhay Kumar wrote: >> In glk when device boots with only 1366x768 panel, HDA codec doesn't comeup. >> This result in no audio forever as cdclk is < 96Mhz. >> This change will ensure CD clock to be twice of

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/audio: Fix audio detection issue on GLK (rev3)

== Series Details == Series: drm/i915/audio: Fix audio detection issue on GLK (rev3) URL : https://patchwork.freedesktop.org/series/41334/ State : failure == Summary == Applying: drm/i915/audio: Fix audio detection issue on GLK Using index info to reconstruct a base tree... M

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Don't use -ETIMEDOUT from inside a test

== Series Details == Series: drm/i915/selftests: Don't use -ETIMEDOUT from inside a test URL : https://patchwork.freedesktop.org/series/41828/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4063_full -> Patchwork_8720_full = == Summary - WARNING == Minor unknown changes

[Intel-gfx] [PATCH 2/3] drm/i915: Move fiddling with engine->last_retired_context

Move the knowledge about resetting the current context tracking on the engine from inside i915_gem_context.c into intel_engine_cs.c Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem_context.c | 12 ++-- drivers/gpu/drm/i915/intel_engine_cs.c | 24

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Wait for vblank after register read

== Series Details == Series: drm/i915: Wait for vblank after register read URL : https://patchwork.freedesktop.org/series/41877/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4066 -> Patchwork_8731 = == Summary - SUCCESS == No regressions found. External URL:

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/icl: Adjust BSD2 semantics to mean any second VCS instance

== Series Details == Series: drm/i915/icl: Adjust BSD2 semantics to mean any second VCS instance URL : https://patchwork.freedesktop.org/series/41883/ State : warning == Summary == $ dim checkpatch origin/drm-tip 7f451ce363f7 drm/i915/icl: Adjust BSD2 semantics to mean any second VCS instance

Re: [Intel-gfx] [PATCH 3/3] just some guess work to findout the culprit. If this breaks then we know what do.

On Wed, 14 Feb 2018, "Kumar, Abhijeet" wrote: > On 2/14/2018 4:48 PM, Takashi Iwai wrote: >> On Wed, 14 Feb 2018 10:06:19 +0100, >> Kumar, Abhijeet wrote: >>> >>> >>> On 2/14/2018 2:17 PM, Chris Wilson wrote: Quoting Kumar, Abhijeet (2018-02-14 04:53:57) > On

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/audio: set minimum CD clock to twice the BCLK

== Series Details == Series: drm/i915/audio: set minimum CD clock to twice the BCLK URL : https://patchwork.freedesktop.org/series/41888/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915/audio: set minimum CD clock to twice the BCLK

Re: [Intel-gfx] [PATCH] drm/crc: Only report a single overflow when a CRC fd is opened

On Wed, Apr 18, 2018 at 02:51:21PM +0200, Maarten Lankhorst wrote: > This reduces the amount of spam when you debug a CRC reading > program. > > Signed-off-by: Maarten Lankhorst > --- > drivers/gpu/drm/drm_debugfs_crc.c | 9 - >

Re: [Intel-gfx] [PATCH v3] drm/i915: set minimum CD clock to twice the BCLK.

On Wed, Apr 18, 2018 at 01:49:23PM +0300, Jani Nikula wrote: > On Tue, 17 Apr 2018, "Kumar, Abhay" wrote: > > On 4/17/2018 12:06 PM, Abhay Kumar wrote: > >> In glk when device boots with only 1366x768 panel, HDA codec doesn't > >> comeup. > >> This result in no audio

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t v2 00/11] trace.pl fixes

On 06/03/2018 12:43, Tvrtko Ursulin wrote: From: Tvrtko Ursulin Collection of fixes on top of John's recent work. Problems were mostly in the request split logic which had several issues both in my original version, and also after John's improvements. Handling of

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/3] drm/i915: Move the priotree struct to its own headers (rev2)

== Series Details == Series: series starting with [v2,1/3] drm/i915: Move the priotree struct to its own headers (rev2) URL : https://patchwork.freedesktop.org/series/41827/ State : warning == Summary == $ dim checkpatch origin/drm-tip 690cae7b1c87 drm/i915: Move the priotree struct to its

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/3] drm/i915: Move the priotree struct to its own headers (rev2)

== Series Details == Series: series starting with [v2,1/3] drm/i915: Move the priotree struct to its own headers (rev2) URL : https://patchwork.freedesktop.org/series/41827/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4066 -> Patchwork_8734 = == Summary - SUCCESS ==

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/fbdev: Enable late fbdev initial configuration (rev3)

== Series Details == Series: drm/i915/fbdev: Enable late fbdev initial configuration (rev3) URL : https://patchwork.freedesktop.org/series/41851/ State : failure == Summary == Applying: drm/i915/fbdev: Enable late fbdev initial configuration error: patch failed:

Re: [Intel-gfx] [PATCH v3 1/2] drm/i915/gmbus: Increase the Bytes per Rd/Wr Op

On Wed, Apr 18, 2018 at 09:20:23AM +0300, Jani Nikula wrote: > On Wed, 18 Apr 2018, Ramalingam C wrote: > > On Tuesday 17 April 2018 11:39 PM, Ville Syrjälä wrote: > >> On Tue, Apr 17, 2018 at 02:25:32PM +0530, Ramalingam C wrote: > >>> >From Gen9 onwards Bspec says HW

Re: [Intel-gfx] [PATCH v4 6/6] drm/i915: Add skl_check_nv12_surface for NV12

On Wed, Apr 18, 2018 at 09:38:13AM +0530, Vidya Srinivas wrote: > From: Maarten Lankhorst > > We skip src trunction/adjustments for > NV12 case and handle the sizes directly. > Without this, pipe fifo underruns are seen on APL/KBL. > > v2: For NV12, making the

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/icl: Adjust BSD2 semantics to mean any second VCS instance

== Series Details == Series: drm/i915/icl: Adjust BSD2 semantics to mean any second VCS instance URL : https://patchwork.freedesktop.org/series/41883/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4066 -> Patchwork_8733 = == Summary - SUCCESS == No regressions found.

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/3] drm/i915: Move the priotree struct to its own headers (rev2)

== Series Details == Series: series starting with [v2,1/3] drm/i915: Move the priotree struct to its own headers (rev2) URL : https://patchwork.freedesktop.org/series/41827/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: Move the priotree struct to its own

Re: [Intel-gfx] [PATCH v2] drm/i915: Pack params to engine->schedule() into a struct

Quoting Chris Wilson (2018-04-18 12:41:49) > Today we only want to pass along the priority to engine->schedule(), but > in the future we want to have much more control over the various aspects > of the GPU during a context's execution, for example controlling the > frequency allowed. As we need an

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v9,1/2] drm/i915: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads (rev13)

== Series Details == Series: series starting with [v9,1/2] drm/i915: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads (rev13) URL : https://patchwork.freedesktop.org/series/40503/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4063 -> Patchwork_8724 = == Summary -

[Intel-gfx] [PATCH] gpu: drm: i915: Change return type to vm_fault_t

Use new return type vm_fault_t for fault handler. For now, this is just documenting that the function returns a VM_FAULT value rather than an errno. Once all instances are converted, vm_fault_t will become a distinct type. Reference id -> 1c8f422059ae ("mm: change return type to vm_fault_t")

Re: [Intel-gfx] [PATCH] gpu: drm: i915: Change return type to vm_fault_t

Not exactly. The plan for these patches is to introduce new vm_fault_t type in vm_operations_struct fault handlers. It's now available in 4.17-rc1. We will push all the required drivers/filesystem changes through different maintainers to linus tree. Once everything is converted into vm_fault_t

[Intel-gfx] [PATCH v2] gpu: drm: i915: Change return type to vm_fault_t

Use new return type vm_fault_t for fault handler. For now, this is just documenting that the function returns a VM_FAULT value rather than an errno. Once all instances are converted, vm_fault_t will become a distinct type. Reference id -> 1c8f422059ae ("mm: change return type to vm_fault_t")

Re: [Intel-gfx] [PATCH] gpu: drm: i915: Change return type to vm_fault_t

On 17-Apr-2018 9:45 PM, "Matthew Wilcox" wrote: > > On Tue, Apr 17, 2018 at 09:14:32PM +0530, Souptick Joarder wrote: > > Not exactly. The plan for these patches is to introduce new vm_fault_t type > > in vm_operations_struct fault handlers. It's now available in 4.17-rc1. We

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: set minimum CD clock to twice the BCLK. (rev4)

== Series Details == Series: drm/i915: set minimum CD clock to twice the BCLK. (rev4) URL : https://patchwork.freedesktop.org/series/32657/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4063_full -> Patchwork_8723_full = == Summary - WARNING == Minor unknown changes

[Intel-gfx] [PATCH igt v3] igt/gem_exec_schedule: Exercise "deep" preemption

In investigating the issue with having to force preemption within the executing ELSP[], we want to trigger preemption between all elements of that array. To that end, we issue a series of requests with different priorities to fill the in-flight ELSP[] and then demand preemption into the middle of

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Don't use -ETIMEDOUT from inside a test

== Series Details == Series: drm/i915/selftests: Don't use -ETIMEDOUT from inside a test URL : https://patchwork.freedesktop.org/series/41828/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4065 -> Patchwork_8728 = == Summary - SUCCESS == No regressions found.

[Intel-gfx] [PATCH 3/3] drm/i915: Store a pointer to intel_context in i915_request

To ease the frequent and ugly pointer dance of >gem_context->engine[request->engine->id] during request submission, store that pointer as request->hw_context. One major advantage that we will exploit later is that this decouples the logical context state from the engine itself. Signed-off-by:

[Intel-gfx] [PATCH 1/3] drm/i915: Move request->ctx aside

In the next patch, we want to store the intel_context pointer inside i915_request, as it is frequently access via a convoluted dance when submitting the request to hw. Having two context pointers inside i915_request leads to confusion so first rename the existing i915_gem_context pointer to

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: set minimum CD clock to twice the BCLK. (rev4)

== Series Details == Series: drm/i915: set minimum CD clock to twice the BCLK. (rev4) URL : https://patchwork.freedesktop.org/series/32657/ State : warning == Summary == $ dim checkpatch origin/drm-tip 969c984b9819 drm/i915: set minimum CD clock to twice the BCLK. -:6:

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Fix error checking for wait_var_timeout

Chris Wilson writes: > The old wait_on_atomic_t used a custom callback to perform the > schedule(), which used my return semantics of reporting an error code on > timeout. wait_var_event_timeout() uses the schedule() return semantics > of reporting the remaining jiffies

[Intel-gfx] [PATCH] drm/i915/audio: set minimum CD clock to twice the BCLK

From: Abhay Kumar In GLK when the device boots with only 1366x768 panel without audio, HDA codec doesn't come up. In this case, the CDCLK is less than twice the BCLK. Even though audio isn't being enabled, having a too low CDCLK leads to audio probe failing altogether.

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Fix error checking for wait_var_timeout

== Series Details == Series: drm/i915/selftests: Fix error checking for wait_var_timeout URL : https://patchwork.freedesktop.org/series/41835/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4063 -> Patchwork_8727 = == Summary - WARNING == Minor unknown changes coming

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: set minimum CD clock to twice the BCLK. (rev4)

== Series Details == Series: drm/i915: set minimum CD clock to twice the BCLK. (rev4) URL : https://patchwork.freedesktop.org/series/32657/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4063_full -> Patchwork_8725_full = == Summary - WARNING == Minor unknown changes

Re: [Intel-gfx] [PATCH] drm/i915: Fix LSPCON TMDS output buffer enabling from low-power state

On Mon, 16 Apr 2018, Clint Taylor wrote: > On 04/16/2018 08:53 AM, Imre Deak wrote: >> LSPCON adapters in low-power state may ignore the first I2C write during >> TMDS output buffer enabling, resulting in a blank screen even with an >> otherwise enabled pipe. Fix this

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Fix error checking for wait_var_timeout

== Series Details == Series: drm/i915/selftests: Fix error checking for wait_var_timeout URL : https://patchwork.freedesktop.org/series/41835/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4063 -> Patchwork_8721 = == Summary - WARNING == Minor unknown changes coming

Re: [Intel-gfx] [PATCH v2 3/3] drm/i915: Pack params to engine->schedule() into a struct

Quoting Joonas Lahtinen (2018-04-18 10:46:27) > Quoting Chris Wilson (2018-04-17 17:31:32) > > +static void print_sched_attr(struct drm_printer *m, > > +const struct drm_i915_private *i915, > > +const struct i915_sched_attr *attr) > > +{ > >

Re: [Intel-gfx] [PATCH v2 2/2] i915: content-type property for HDMI connector

On 04/18/18 18:51, StanLis wrote: > From: Stanislav Lisovskiy > > Added encoding of drm content_type property from > drm_connector_state within AVI infoframe in order to properly handle > external HDMI TV content-type setting. > > Signed-off-by: Stanislav

Re: [Intel-gfx] [PATCH v2 1/2] drm: content-type property for HDMI connector

On 04/18/18 18:51, StanLis wrote: > From: Stanislav Lisovskiy > > Added content_type property to > drm_connector_state in order to properly handle > external HDMI TV content-type setting. > > Signed-off-by: Stanislav Lisovskiy > ---

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enabling content-type setting for HDMI displays.

== Series Details == Series: Enabling content-type setting for HDMI displays. URL : https://patchwork.freedesktop.org/series/41876/ State : warning == Summary == $ dim checkpatch origin/drm-tip ffb3db0b7c7e drm: content-type property for HDMI connector -:78: CHECK:PARENTHESIS_ALIGNMENT:

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: set minimum CD clock to twice the BCLK. (rev4)

== Series Details == Series: drm/i915: set minimum CD clock to twice the BCLK. (rev4) URL : https://patchwork.freedesktop.org/series/32657/ State : warning == Summary == $ dim checkpatch origin/drm-tip 25a822b03178 drm/i915: set minimum CD clock to twice the BCLK. -:6:

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: set minimum CD clock to twice the BCLK. (rev4)

== Series Details == Series: drm/i915: set minimum CD clock to twice the BCLK. (rev4) URL : https://patchwork.freedesktop.org/series/32657/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: set minimum CD clock to twice the BCLK.

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: set minimum CD clock to twice the BCLK. (rev4)

== Series Details == Series: drm/i915: set minimum CD clock to twice the BCLK. (rev4) URL : https://patchwork.freedesktop.org/series/32657/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4063 -> Patchwork_8725 = == Summary - SUCCESS == No regressions found. External

Re: [Intel-gfx] [PATCH v2 2/2] i915: content-type property for HDMI connector

Hi, Please see my reply inline: From: dri-devel [dri-devel-boun...@lists.freedesktop.org] on behalf of Hans Verkuil [hverk...@xs4all.nl] Sent: Wednesday, April 18, 2018 2:35 PM To: Lisovskiy, Stanislav; dri-de...@lists.freedesktop.org Cc:

Re: [Intel-gfx] [PATCH v2 2/2] i915: content-type property for HDMI connector

From: Hans Verkuil [hverk...@xs4all.nl] Sent: Wednesday, April 18, 2018 3:35 PM To: Lisovskiy, Stanislav; dri-de...@lists.freedesktop.org Cc: intel-gfx@lists.freedesktop.org Subject: Re: [PATCH v2 2/2] i915: content-type property for HDMI connector >> Is

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/crc: make locking and source check more robust

== Series Details == Series: drm/i915/crc: make locking and source check more robust URL : https://patchwork.freedesktop.org/series/41821/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4065 -> Patchwork_8729 = == Summary - FAILURE == Serious unknown changes coming with

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: set minimum CD clock to twice the BCLK. (rev4)

== Series Details == Series: drm/i915: set minimum CD clock to twice the BCLK. (rev4) URL : https://patchwork.freedesktop.org/series/32657/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4063 -> Patchwork_8723 = == Summary - WARNING == Minor unknown changes coming with

Re: [Intel-gfx] [PATCH v3 2/2] drm/i915/gmbus: Enable burst read

Thanks ville for reviewing this change. On Wednesday 18 April 2018 12:12 AM, Ville Syrjälä wrote: On Tue, Apr 17, 2018 at 02:25:33PM +0530, Ramalingam C wrote: Support for Burst read in HW is added for HDCP2.2 compliance requirement. This patch enables the burst read for all the gmbus read of

Re: [Intel-gfx] [PATCH v4 6/6] drm/i915: Add skl_check_nv12_surface for NV12

On Wed, 2018-04-18 at 09:38 +0530, Vidya Srinivas wrote: > From: Maarten Lankhorst > > We skip src trunction/adjustments for > NV12 case and handle the sizes directly. > Without this, pipe fifo underruns are seen on APL/KBL. > > v2: For NV12, making the src

Re: [Intel-gfx] [PATCH v2 2/2] i915: content-type property for HDMI connector

On 04/18/18 14:01, Lisovskiy, Stanislav wrote: > Hi, > > Please see my reply inline: > > From: dri-devel [dri-devel-boun...@lists.freedesktop.org] on behalf of Hans > Verkuil [hverk...@xs4all.nl] > Sent: Wednesday, April 18, 2018 2:35 PM > To: Lisovskiy,

Re: [Intel-gfx] [PATCH] drm/i915/icl: Adjust BSD2 semantics to mean any second VCS instance

Quoting Tvrtko Ursulin (2018-04-18 12:33:42) > From: Tvrtko Ursulin > > Currently our driver assumes BSD2 means hardware engine instance number > two. This does not work for Icelake parts with two VCS engines, but which > are hardware instances 0 and 2, and not 0 and 1

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/3] drm/i915: Move the priotree struct to its own headers

== Series Details == Series: series starting with [v2,1/3] drm/i915: Move the priotree struct to its own headers URL : https://patchwork.freedesktop.org/series/41827/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4063_full -> Patchwork_8719_full = == Summary - FAILURE ==

Re: [Intel-gfx] [PATCH] drm/i915: Refine the has_audio assignment

On Fri, 13 Apr 2018, Chris Wilson wrote: > Quoting Yang (2018-04-13 05:06:45) >> From: Yang Shi >> >> Refine the has_audio assignment for dp and hdmi. > > s/Refine/Ignore the user override for/ > > Why? Yang, we'll need the explanation before we

Re: [Intel-gfx] [PATCH igt] igt/gem_exec_schedule: Exercise "deep" preemption

On Wed, Apr 11, 2018 at 11:13:56AM +0100, Chris Wilson wrote: > In investigating the issue with having to force preemption within the > executing ELSP[], we want to trigger preemption between all elements of > that array. To that end, we issue a series of requests with different > priorities to

[Intel-gfx] ✓ Fi.CI.BAT: success for Enabling content-type setting for HDMI displays.

== Series Details == Series: Enabling content-type setting for HDMI displays. URL : https://patchwork.freedesktop.org/series/41876/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4065 -> Patchwork_8730 = == Summary - SUCCESS == No regressions found. External URL:

[Intel-gfx] ✓ Fi.CI.BAT: success for gpu: drm: i915: Change return type to vm_fault_t (rev2)

== Series Details == Series: gpu: drm: i915: Change return type to vm_fault_t (rev2) URL : https://patchwork.freedesktop.org/series/41893/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4066 -> Patchwork_8736 = == Summary - SUCCESS == No regressions found. External

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/crc: Only report a single overflow when a CRC fd is opened

== Series Details == Series: drm/crc: Only report a single overflow when a CRC fd is opened URL : https://patchwork.freedesktop.org/series/41897/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4066 -> Patchwork_8737 = == Summary - SUCCESS == No regressions found.

[Intel-gfx] ✓ Fi.CI.IGT: success for Enabling content-type setting for HDMI displays.

== Series Details == Series: Enabling content-type setting for HDMI displays. URL : https://patchwork.freedesktop.org/series/41876/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4065_full -> Patchwork_8730_full = == Summary - WARNING == Minor unknown changes coming with

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 06/11] trace.pl: Move sortQueue near its user

Reviewed-by: Lionel Landwerlin On 06/03/18 04:43, Tvrtko Ursulin wrote: From: Tvrtko Ursulin Just to clear up some space for incoming code refactoring. Signed-off-by: Tvrtko Ursulin Cc: John Harrison

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 07/11] trace.pl: Move min/max timestamp lookup to last loop

Reviewed-by: Lionel Landwerlin On 06/03/18 04:43, Tvrtko Ursulin wrote: From: Tvrtko Ursulin It makes sense to fetch the min and max timestamp only after the last sort of the array. Signed-off-by: Tvrtko Ursulin

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v4,1/4] drm/i915: Always do WOPCM partitioning based on real firmware sizes

== Series Details == Series: series starting with [v4,1/4] drm/i915: Always do WOPCM partitioning based on real firmware sizes URL : https://patchwork.freedesktop.org/series/41909/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4066 -> Patchwork_8739 = == Summary - SUCCESS

Re: [Intel-gfx] [PATCH] drm: Print unadorned pointers

On Wed, Apr 18, 2018 at 12:24:50PM +0300, Alexey Brodkin wrote: > After commit ad67b74 ("printk: hash addresses printed with %p") > pointers are being hashed when printed. However, this makes > debug output completely useless. Switch to %px in order to see the > unadorned kernel pointers. > >

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915: Move request->ctx aside

== Series Details == Series: series starting with [1/3] drm/i915: Move request->ctx aside URL : https://patchwork.freedesktop.org/series/41903/ State : failure == Summary == Applying: drm/i915: Move request->ctx aside error: sha1 information is lacking or useless

Re: [Intel-gfx] [PATCH v9 1/2] drm/i915: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads

Quoting Oscar Mateo (2018-04-18 17:30:41) > > > On 4/17/2018 3:58 PM, Yunwei Zhang wrote: > > + /* > > + * HW expects MCR to be programed to a enabled slice/subslice pair > > + * before any MMIO read into slice/subslice register > > + */ > > The comment above makes more sense

Re: [Intel-gfx] [PATCH v9 1/2] drm/i915: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads

On 4/18/2018 9:45 AM, Oscar Mateo wrote: On 4/18/2018 9:38 AM, Chris Wilson wrote: Quoting Oscar Mateo (2018-04-18 17:30:41) On 4/17/2018 3:58 PM, Yunwei Zhang wrote: + /* +  * HW expects MCR to be programed to a enabled slice/subslice pair +  * before any MMIO read into

Re: [Intel-gfx] [PATCH] drm/i915/fbdev: Enable late fbdev initial configuration

Quoting Souza, Jose (2018-04-18 17:42:47) > On Wed, 2018-04-18 at 09:26 +0100, Chris Wilson wrote: > > Quoting Souza, Jose (2018-04-18 01:07:16) > > > On Wed, 2018-04-18 at 00:44 +0100, Chris Wilson wrote: > > > > Quoting José Roberto de Souza (2018-04-17 23:34:18) > > > > > If the initial fbdev >

Re: [Intel-gfx] [PATCH v9 2/2] drm/i915: Implement WaProgramMgsrForL3BankSpecificMmioReads

On 4/18/2018 9:40 AM, Oscar Mateo wrote: On 4/17/2018 3:59 PM, Yunwei Zhang wrote: L3Bank could be fused off in hardware for debug purpose, and it is possible that subslice is enabled while its corresponding L3Bank pairs are disabled. In such case, if MCR packet control register(0xFDC) is

[Intel-gfx] [PATCH v4 4/4] HAX enable guc for CI

Signed-off-by: Jackie Li --- drivers/gpu/drm/i915/i915_params.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index c963603..53037b5 100644 ---

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/crc: Only report a single overflow when a CRC fd is opened

== Series Details == Series: drm/crc: Only report a single overflow when a CRC fd is opened URL : https://patchwork.freedesktop.org/series/41897/ State : warning == Summary == $ dim checkpatch origin/drm-tip e17f1c739f3f drm/crc: Only report a single overflow when a CRC fd is opened -:52:

Re: [Intel-gfx] [PATCH v9 1/2] drm/i915: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads

On 4/17/2018 3:58 PM, Yunwei Zhang wrote: WaProgramMgsrForCorrectSliceSpecificMmioReads dictate that before any MMIO read into Slice/Subslice specific registers, MCR packet control register(0xFDC) needs to be programmed to point to any enabled slice/subslice pair. Otherwise, incorrect value

[Intel-gfx] [PATCH v4 1/4] drm/i915: Always do WOPCM partitioning based on real firmware sizes

After enabled the WOPCM write-once registers locking status checking, reloading of the i915 module will fail with modparam enable_guc set to 3 (enable GuC and HuC firmware loading) if the module was originally loaded with enable_guc set to 1 (only enable GuC firmware loading). This is because

[Intel-gfx] [PATCH v4 3/4] drm/i915: Add code to accept valid locked WOPCM register values

In current code, we only compare the locked WOPCM register values with the calculated values. However, we can continue loading GuC/HuC firmware if the locked (or partially locked) values were valid for current GuC/HuC firmware sizes. This patch added a new code path to verify whether the locked

[Intel-gfx] [PATCH v4 2/4] drm/i915: Always set HUC_LOADING_AGENT_GUC bit in WOPCM offset register

The enable_guc modparam is used to enable/disable GuC/HuC FW uploading dynamically during i915 module loading. If WOPCM offset register was locked without having HUC_LOADING_AGENT_GUC bit set to 1, the module reloading with both GuC and HuC FW will fail since we need to set this bit to 1 for HuC

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/audio: set minimum CD clock to twice the BCLK

== Series Details == Series: drm/i915/audio: set minimum CD clock to twice the BCLK URL : https://patchwork.freedesktop.org/series/41888/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4066 -> Patchwork_8735 = == Summary - SUCCESS == No regressions found. External

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for gpu: drm: i915: Change return type to vm_fault_t (rev2)

== Series Details == Series: gpu: drm: i915: Change return type to vm_fault_t (rev2) URL : https://patchwork.freedesktop.org/series/41893/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: gpu: drm: i915: Change return type to vm_fault_t

Re: [Intel-gfx] [PATCH v10 10/11] drm: Add aspect ratio parsing in DRM layer

On 4/17/2018 11:17 PM, Ville Syrjälä wrote: On Tue, Apr 17, 2018 at 10:45:07AM +0530, Nautiyal, Ankit K wrote: On 4/6/2018 11:14 PM, Ville Syrjälä wrote: On Fri, Apr 06, 2018 at 10:55:14PM +0530, Nautiyal, Ankit K wrote: This patch is causing failure of IGT test kms_3d. The kms_3d test

Re: [Intel-gfx] [PATCH v9 2/2] drm/i915: Implement WaProgramMgsrForL3BankSpecificMmioReads

On 4/17/2018 3:59 PM, Yunwei Zhang wrote: L3Bank could be fused off in hardware for debug purpose, and it is possible that subslice is enabled while its corresponding L3Bank pairs are disabled. In such case, if MCR packet control register(0xFDC) is programed to point to a disabled bank pair, a

Re: [Intel-gfx] [PATCH i-g-t 09/11] trace.pl: Add support for colouring context execution

One suggestion below, otherwise : Reviewed-by: Lionel Landwerlin On 06/03/18 04:43, Tvrtko Ursulin wrote: From: Tvrtko Ursulin Add the command line switch which uses different colours for different context execution boxes.

Re: [Intel-gfx] [PATCH] drm: Print unadorned pointers

On 2018-04-18 05:24 AM, Alexey Brodkin wrote: > After commit ad67b74 ("printk: hash addresses printed with %p") > pointers are being hashed when printed. However, this makes > debug output completely useless. Switch to %px in order to see the > unadorned kernel pointers. My understanding of the

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for gpu: drm: i915: Change return type to vm_fault_t (rev2)

== Series Details == Series: gpu: drm: i915: Change return type to vm_fault_t (rev2) URL : https://patchwork.freedesktop.org/series/41893/ State : warning == Summary == $ dim checkpatch origin/drm-tip 045e647f1204 gpu: drm: i915: Change return type to vm_fault_t -:11: ERROR:GIT_COMMIT_ID:

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Don't use -ETIMEDOUT from inside a test

== Series Details == Series: drm/i915/selftests: Don't use -ETIMEDOUT from inside a test URL : https://patchwork.freedesktop.org/series/41828/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4065_full -> Patchwork_8728_full = == Summary - WARNING == Minor unknown changes

Re: [Intel-gfx] [PATCH] drm/i915/fbdev: Enable late fbdev initial configuration

On Wed, 2018-04-18 at 09:26 +0100, Chris Wilson wrote: > Quoting Souza, Jose (2018-04-18 01:07:16) > > On Wed, 2018-04-18 at 00:44 +0100, Chris Wilson wrote: > > > Quoting José Roberto de Souza (2018-04-17 23:34:18) > > > > If the initial fbdev > > > > configuration(intel_fbdev_initial_config()) >

Re: [Intel-gfx] [PATCH v9 1/2] drm/i915: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads

On 4/18/2018 9:38 AM, Chris Wilson wrote: Quoting Oscar Mateo (2018-04-18 17:30:41) On 4/17/2018 3:58 PM, Yunwei Zhang wrote: + /* + * HW expects MCR to be programed to a enabled slice/subslice pair + * before any MMIO read into slice/subslice register + */ The comment

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: set minimum CD clock to twice the BCLK. (rev4)

== Series Details == Series: drm/i915: set minimum CD clock to twice the BCLK. (rev4) URL : https://patchwork.freedesktop.org/series/32657/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: set minimum CD clock to twice the BCLK.

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Fix error checking for wait_var_timeout

== Series Details == Series: drm/i915/selftests: Fix error checking for wait_var_timeout URL : https://patchwork.freedesktop.org/series/41835/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4063_full -> Patchwork_8721_full = == Summary - WARNING == Minor unknown changes

[Intel-gfx] [PATCH] drm/crc: Only report a single overflow when a CRC fd is opened

This reduces the amount of spam when you debug a CRC reading program. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/drm_debugfs_crc.c | 9 - include/drm/drm_debugfs_crc.h | 3 ++- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Fix error checking for wait_var_timeout

== Series Details == Series: drm/i915/selftests: Fix error checking for wait_var_timeout URL : https://patchwork.freedesktop.org/series/41835/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4063_full -> Patchwork_8727_full = == Summary - WARNING == Minor unknown changes

[Intel-gfx] [PATCH v10 2/2] drm/i915: Implement WaProgramMgsrForL3BankSpecificMmioReads

L3Bank could be fused off in hardware for debug purpose, and it is possible that subslice is enabled while its corresponding L3Bank pairs are disabled. In such case, if MCR packet control register(0xFDC) is programed to point to a disabled bank pair, a MMIO read into L3Bank range will return 0

Re: [Intel-gfx] [PATCH v10 1/2] drm/i915: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads

On 4/18/2018 1:23 PM, Yunwei Zhang wrote: WaProgramMgsrForCorrectSliceSpecificMmioReads dictate that before any MMIO read into Slice/Subslice specific registers, MCR packet control register(0xFDC) needs to be programmed to point to any enabled slice/subslice pair. Otherwise, incorrect value

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/crc: Only report a single overflow when a CRC fd is opened

== Series Details == Series: drm/crc: Only report a single overflow when a CRC fd is opened URL : https://patchwork.freedesktop.org/series/41897/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4066_full -> Patchwork_8737_full = == Summary - WARNING == Minor unknown

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/audio: set minimum CD clock to twice the BCLK

== Series Details == Series: drm/i915/audio: set minimum CD clock to twice the BCLK URL : https://patchwork.freedesktop.org/series/41888/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4066_full -> Patchwork_8735_full = == Summary - WARNING == Minor unknown changes

[Intel-gfx] [PATCH v10 1/2] drm/i915: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads

WaProgramMgsrForCorrectSliceSpecificMmioReads dictate that before any MMIO read into Slice/Subslice specific registers, MCR packet control register(0xFDC) needs to be programmed to point to any enabled slice/subslice pair. Otherwise, incorrect value will be returned. However, that means each

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v10,1/2] drm/i915: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads (rev15)

== Series Details == Series: series starting with [v10,1/2] drm/i915: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads (rev15) URL : https://patchwork.freedesktop.org/series/40503/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4066 -> Patchwork_8741 = == Summary -

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v10,1/2] drm/i915: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads (rev15)

== Series Details == Series: series starting with [v10,1/2] drm/i915: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads (rev15) URL : https://patchwork.freedesktop.org/series/40503/ State : warning == Summary == $ dim checkpatch origin/drm-tip 4d91b554a00a drm/i915: Implement

Re: [Intel-gfx] [PATCH v10 2/2] drm/i915: Implement WaProgramMgsrForL3BankSpecificMmioReads

On 4/18/2018 1:23 PM, Yunwei Zhang wrote: L3Bank could be fused off in hardware for debug purpose, and it is possible that subslice is enabled while its corresponding L3Bank pairs are disabled. In such case, if MCR packet control register(0xFDC) is programed to point to a disabled bank pair, a

[Intel-gfx] ✓ Fi.CI.IGT: success for gpu: drm: i915: Change return type to vm_fault_t (rev2)

== Series Details == Series: gpu: drm: i915: Change return type to vm_fault_t (rev2) URL : https://patchwork.freedesktop.org/series/41893/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4066_full -> Patchwork_8736_full = == Summary - WARNING == Minor unknown changes

Re: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for gpu: drm: i915: Change return type to vm_fault_t (rev2)

On Wed, Apr 18, 2018 at 9:24 PM, Patchwork wrote: > == Series Details == > > Series: gpu: drm: i915: Change return type to vm_fault_t (rev2) > URL : https://patchwork.freedesktop.org/series/41893/ > State : warning > > == Summary == > > $ dim checkpatch

[Intel-gfx] [CI 3/3] drm/i915: Pack params to engine->schedule() into a struct

Today we only want to pass along the priority to engine->schedule(), but in the future we want to have much more control over the various aspects of the GPU during a context's execution, for example controlling the frequency allowed. As we need an ever growing number of parameters for scheduling,

[Intel-gfx] [CI 2/3] drm/i915: Rename priotree to sched

Having moved the priotree struct into i915_scheduler.h, identify it as the scheduling element and rebrand into i915_sched. This becomes more useful as we start attaching more information we require to propagate through the scheduler. v2: Use i915_sched_node for future distinctiveness

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