Re: [Intel-gfx] [PATCH v2 5/5] drm/i915: Bump gen4+ fb size limits to 32kx32k

2018-09-20 Thread Chris Wilson
Quoting Ville Syrjälä (2018-09-20 20:41:30) > On Thu, Sep 20, 2018 at 09:09:03AM +0100, Chris Wilson wrote: > > Quoting Ville Syrjälä (2018-09-19 17:59:51) > > > On Thu, Sep 13, 2018 at 11:01:40PM +0300, Ville Syrjala wrote: > > > > From: Ville Syrjälä > > > > > > > > With gtt remapping in place

[Intel-gfx] [PATCH 8/8] drm/i915/psr: Remove alpm from i915_psr

2018-09-20 Thread José Roberto de Souza
ALPM is a requirement and we don't need to keep it's cached, what were done in commit 97c9de66ca80 ("drm/i915/psr: Fix ALPM cap check for PSR2") but the alpm was not removed from i915_psr. Cc: Dhinakaran Pandiyan Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_drv.h | 1 - 1

[Intel-gfx] [PATCH 2/8] drm/i915/psr: Do not set MASK_DISP_REG_WRITE in ICL

2018-09-20 Thread José Roberto de Souza
ICL spec states that this bit is now reserved. Spec: 7722 Cc: Dhinakaran Pandiyan Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_reg.h | 4 ++-- drivers/gpu/drm/i915/intel_psr.c | 17 +++-- 2 files changed, 13 insertions(+), 8 deletions(-) diff --git

[Intel-gfx] [PATCH 7/8] drm/i915/psr: Don't tell sink that main link will be active in PSR2

2018-09-20 Thread José Roberto de Souza
For PSR2 we don't have the option to keep main link enabled while PSR2 is active, so don't configure sink DPCD with a wrong value. Cc: Dhinakaran Pandiyan Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/intel_psr.c | 9 + 1 file changed, 5 insertions(+), 4 deletions(-)

[Intel-gfx] [PATCH 5/8] drm/i915/psr: Do not enable PSR2 if sink requires selective update X granularity

2018-09-20 Thread José Roberto de Souza
According to eDP spec, sink could required a granularity in the start of x coordinate or in the width of the selective update region. As it is not supported by hardware, lets not enable PSR2 in sinks that requires it. Cc: Dhinakaran Pandiyan Signed-off-by: José Roberto de Souza ---

[Intel-gfx] [PATCH 6/8] drm/i915/psr: Use WA to force HW tracking to exit PSR2

2018-09-20 Thread José Roberto de Souza
This WA also works fine for PSR2, triggering a selective update when possible. Cc: Dhinakaran Pandiyan Cc: Rodrigo Vivi Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/intel_psr.c | 24 ++-- 1 file changed, 10 insertions(+), 14 deletions(-) diff --git

[Intel-gfx] [PATCH 4/8] drm/i915/psr: Remove PSR2 TODO error handling

2018-09-20 Thread José Roberto de Souza
We are already handling all PSR2 errors, so we can drop this TODO. Cc: Dhinakaran Pandiyan Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/intel_psr.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index

[Intel-gfx] [PATCH 1/8] drm/i915/psr: Share PSR and PSR2 exit mask

2018-09-20 Thread José Roberto de Souza
Now both PSR and PSR2 have the same exit mask, so let's share then instead of have the same code 2 times. Cc: Dhinakaran Pandiyan Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/intel_psr.c | 34 1 file changed, 13 insertions(+), 21 deletions(-)

[Intel-gfx] [CI] drm/i915/execlists: Onion unwind for logical_ring_init() failure

2018-09-20 Thread Chris Wilson
Fix up the error unwind for logical_ring_init() failing by moving the cleanup into the callers who own the various bits of state during initialisation, so we don't forget to free the state allocated by the caller. Signed-off-by: Chris Wilson Reviewed-by: Mika Kuoppala ---

Re: [Intel-gfx] [PATCH 11/40] drm/i915/execlists: Onion unwind for logical_ring_init() failure

2018-09-20 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-09-20 15:21:47) > > On 19/09/2018 20:55, Chris Wilson wrote: > > Fix up the error unwind for logical_ring_init() failing by moving the > > Could you say in the commit what was broken? We didn't cleanup all the state we allocated in the caller. -Chris

[Intel-gfx] [PATCH 06/18] video/hdmi: Handle the MPEG Source infoframe

2018-09-20 Thread Ville Syrjala
From: Ville Syrjälä Add the code to deal with the MPEG source infoframe. Blindly typed from the spec, and totally untested. Cc: Thierry Reding Cc: Hans Verkuil Cc: linux-me...@vger.kernel.org Signed-off-by: Ville Syrjälä --- drivers/video/hdmi.c | 229

[Intel-gfx] [PATCH 09/18] drm/i915: Pass intel_encoder to infoframe functions

2018-09-20 Thread Ville Syrjala
From: Ville Syrjälä Make life simpler by passing around intel_encoder instead of drm_encoder. @r1@ identifier F =~ "infoframe"; identifier I, M; @@ F( - struct drm_encoder *I + struct intel_encoder *I , ...) { <... ( - I->M + I->base.M | - I + >base ) ...> } @r2@ identifier F =~ "infoframe";

[Intel-gfx] [PATCH 13/18] drm/i915: Precompute HDMI infoframes

2018-09-20 Thread Ville Syrjala
From: Ville Syrjälä Store the infoframes in the crtc state and precompute them in .compute_config(). While precomputing we'll also fill out the inforames.enable bitmask appropriately. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_ddi.c | 1 + drivers/gpu/drm/i915/intel_drv.h

[Intel-gfx] [PATCH 14/18] drm/i915: Read out HDMI infoframes

2018-09-20 Thread Ville Syrjala
From: Ville Syrjälä Add code to read the infoframes from the video DIP and unpack them into the crtc state. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_ddi.c | 17 drivers/gpu/drm/i915/intel_drv.h | 10 ++ drivers/gpu/drm/i915/intel_hdmi.c | 203

[Intel-gfx] [PATCH 15/18] drm/i915/sdvo: Precompute HDMI infoframes

2018-09-20 Thread Ville Syrjala
From: Ville Syrjälä As with regular HDMI encoders, let's precompute the infoframes (actually just AVI infoframe for the time being) with SDVO HDMI encoders. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_sdvo.c | 58 +-- 1 file changed, 43

[Intel-gfx] [PATCH 17/18] drm/i915: Check infoframe state in intel_pipe_config_compare()

2018-09-20 Thread Ville Syrjala
From: Ville Syrjälä Check the infoframes and infoframe enable state when comparing two crtc states. We'll use the infoframe logging functions from video/hdmi.c to show the infoframes as part of the state dump. TODO: Try to better integrate the infoframe dumps with drm state dumps v2:

[Intel-gfx] [PATCH 16/18] drm/i915/sdvo: Read out HDMI infoframes

2018-09-20 Thread Ville Syrjala
From: Ville Syrjälä Read the HDMI infoframes from the hbuf and unpack them into the crtc state. Well, actually just AVI infoframe for now but let's write the infoframe readout code in a more generic fashion in case we expand this later. Signed-off-by: Ville Syrjälä ---

[Intel-gfx] [PATCH 10/18] drm/i915: Add the missing HDMI gamut metadata packet stuff

2018-09-20 Thread Ville Syrjala
From: Ville Syrjälä We have definitions and low level code for everything except the gamut metadata HDMI packet. Add the missing bits. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_reg.h | 4 +++- drivers/gpu/drm/i915/intel_hdmi.c | 12 2 files changed, 15

[Intel-gfx] [PATCH 18/18] drm/i915: Include infoframes in the crtc state dump

2018-09-20 Thread Ville Syrjala
From: Ville Syrjälä Dump out the infoframes in the normal crtc state dump. TODO: Try to better integrate the infoframe dumps with drm state dumps Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 26 ++ 1 file changed, 26 insertions(+)

Re: [Intel-gfx] [PATCH] drm/i915: Make sure fb gtt offsets stay within 32bits

2018-09-20 Thread Chris Wilson
Quoting Ville Syrjala (2018-09-20 20:10:18) > From: Ville Syrjälä > > Let's try to make sure the fb offset computations never hit > an integer overflow by making sure the entire fb stays > below 32bits. framebuffer_check() in the core already does > the same check, but as it doesn't know about

Re: [Intel-gfx] [PATCH 2/2] drm/amdgpu: Use per-device driver_features to disable atomic

2018-09-20 Thread Harry Wentland
On 2018-09-13 12:31 PM, Ville Syrjala wrote: > From: Ville Syrjälä > > Disable atomic on a per-device basis instead of for all devices. > Made possible by the new device.driver_features thing. > > Cc: Alex Deucher > Cc: "Christian König" > Cc: "David (ChunMing) Zhou" > Cc: Harry Wentland >

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Infoframe precompute/check

2018-09-20 Thread Patchwork
== Series Details == Series: drm/i915: Infoframe precompute/check URL : https://patchwork.freedesktop.org/series/49983/ State : warning == Summary == $ dim checkpatch origin/drm-tip a017fc23cf36 video/hdmi: Constify 'buffer' to the unpack functions 0a03b408d82f video/hdmi: Pass buffer size to

[Intel-gfx] [PATCH] drm/i915: Make sure fb gtt offsets stay within 32bits

2018-09-20 Thread Ville Syrjala
From: Ville Syrjälä Let's try to make sure the fb offset computations never hit an integer overflow by making sure the entire fb stays below 32bits. framebuffer_check() in the core already does the same check, but as it doesn't know about tiling some things can slip through. Repeat the check in

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Make sure fb gtt offsets stay within 32bits

2018-09-20 Thread Patchwork
== Series Details == Series: drm/i915: Make sure fb gtt offsets stay within 32bits URL : https://patchwork.freedesktop.org/series/49985/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4852 -> Patchwork_10243 = == Summary - SUCCESS == No regressions found. External

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Park the GPU on module load (rev2)

2018-09-20 Thread Patchwork
== Series Details == Series: drm/i915: Park the GPU on module load (rev2) URL : https://patchwork.freedesktop.org/series/49693/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4852_full -> Patchwork_10241_full = == Summary - SUCCESS == No regressions found. == Known

Re: [Intel-gfx] [PATCH v2 5/5] drm/i915: Bump gen4+ fb size limits to 32kx32k

2018-09-20 Thread Ville Syrjälä
On Thu, Sep 20, 2018 at 09:09:03AM +0100, Chris Wilson wrote: > Quoting Ville Syrjälä (2018-09-19 17:59:51) > > On Thu, Sep 13, 2018 at 11:01:40PM +0300, Ville Syrjala wrote: > > > From: Ville Syrjälä > > > > > > With gtt remapping in place we can use arbitraily large framebuffers. > > > Let's

[Intel-gfx] [PATCH 3/8] drm/i915/psr: Enable sink to trigger a interruption on PSR2 CRC mismatch

2018-09-20 Thread José Roberto de Souza
eDP spec states 2 different bits to enable sink to trigger a interruption when there is a CRC mismatch. DP_PSR_CRC_VERIFICATION is for PSR only and DP_PSR_IRQ_HPD_WITH_CRC_ERRORS is for PSR2 only. Cc: Dhinakaran Pandiyan Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/intel_psr.c

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Live tests emit requests and so require rpm

2018-09-20 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Live tests emit requests and so require rpm URL : https://patchwork.freedesktop.org/series/49972/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4851_full -> Patchwork_10240_full = == Summary - WARNING == Minor unknown

[Intel-gfx] [PATCH 11/18] drm/i915: Return the mask of enabled infoframes from ->inforame_enabled()

2018-09-20 Thread Ville Syrjala
From: Ville Syrjälä We want to start tracking which infoframes are enabled, so let's replace the boolean flag with a bitmask. We'll abstract the bitmask so that it's not platform dependent. That will allow us to examine the bitmask later in platform independent code. Signed-off-by: Ville

[Intel-gfx] [PATCH 04/18] video/hdmi: Constify infoframe passed to the pack functions

2018-09-20 Thread Ville Syrjala
From: Ville Syrjälä Let's make the infoframe pack functions usable with a const infoframe structure. This allows us to precompute the infoframe earlier, and still pack it later when we're no longer allowed to modify the structure. So now we end up with a _check()+_pack_only() or _pack()

[Intel-gfx] [PATCH 05/18] video/hdmi: Add an enum for HDMI packet types

2018-09-20 Thread Ville Syrjala
From: Ville Syrjälä We'll be wanting to send more than just infoframes over HDMI. So add an enum for other packet types. TODO: Maybe just include the infoframe types in the packet type enum and get rid of the infoframe type enum? Cc: Thierry Reding Cc: Hans Verkuil Cc:

[Intel-gfx] [PATCH 12/18] drm/i915: Store mask of enabled infoframes in the crtc state

2018-09-20 Thread Ville Syrjala
From: Ville Syrjälä Store the mask of enabled infoframes in the crtc state. We'll start with just the readout for HDMI encoder, and we'll expand this to compute the bitmask in .compute_config() later. SDVO will also follow later. Signed-off-by: Ville Syrjälä ---

[Intel-gfx] [PATCH 07/18] video/hdmi: Handle the NTSC VBI infoframe

2018-09-20 Thread Ville Syrjala
From: Ville Syrjälä Add the code to deal with the NTSC VBI infoframe. I decided against parsing the PES_data_field and just leave it as an opaque blob, just dumping it out as hex in the log. Blindly typed from the spec, and totally untested. Cc: Thierry Reding Cc: Hans Verkuil Cc:

[Intel-gfx] [PATCH 08/18] drm/i915: Use memmove() for punching the hole into infoframes

2018-09-20 Thread Ville Syrjala
From: Ville Syrjälä Replace the hand rolled memmove() with the real thing. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_hdmi.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index

[Intel-gfx] [PATCH 03/18] video/hdmi: Constify infoframe passed to the log functions

2018-09-20 Thread Ville Syrjala
From: Ville Syrjälä The log functions don't modify the passed in infoframe so make it const. Cc: Thierry Reding Cc: Hans Verkuil Cc: linux-me...@vger.kernel.org Signed-off-by: Ville Syrjälä --- drivers/video/hdmi.c | 22 +++--- include/linux/hdmi.h | 2 +- 2 files changed,

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Infoframe precompute/check

2018-09-20 Thread Patchwork
== Series Details == Series: drm/i915: Infoframe precompute/check URL : https://patchwork.freedesktop.org/series/49983/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: video/hdmi: Constify 'buffer' to the unpack functions Okay! Commit: video/hdmi: Pass buffer size to

[Intel-gfx] [PATCH 1/2] drm: Use default dma_fence hooks where possible for null syncobj

2018-09-20 Thread Chris Wilson
Both the .enable_signaling and .release of the null syncobj fence can be replaced by the default callbacks for a small reduction in code size. In particular the default callback for .release was changed in commit e28bd101ae1b ("drm: rename null fence to stub fence in syncobj v2") which neglected

[Intel-gfx] [PATCH 2/2] drm: Fix syncobj handing of schedule() returning 0

2018-09-20 Thread Chris Wilson
After schedule() returns 0, we must do one last check of COND to determine the reason for the wakeup with 0 jiffies remaining before reporting the timeout -- otherwise we may lose the signal due to scheduler delays. References: https://bugs.freedesktop.org/show_bug.cgi?id=106690 Signed-off-by:

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm: Use default dma_fence hooks where possible for null syncobj

2018-09-20 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm: Use default dma_fence hooks where possible for null syncobj URL : https://patchwork.freedesktop.org/series/49988/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4853 -> Patchwork_10245 = == Summary - SUCCESS ==

[Intel-gfx] [PATCH 01/18] video/hdmi: Constify 'buffer' to the unpack functions

2018-09-20 Thread Ville Syrjala
From: Ville Syrjälä The unpack functions just read from the passed in buffer, so make it const. Cc: Thierry Reding Cc: Hans Verkuil Cc: linux-me...@vger.kernel.org Signed-off-by: Ville Syrjälä --- drivers/video/hdmi.c | 23 --- include/linux/hdmi.h | 3 ++- 2 files

[Intel-gfx] [PATCH 00/18] drm/i915: Infoframe precompute/check

2018-09-20 Thread Ville Syrjala
From: Ville Syrjälä Series aimed at precomputing the HDMI infoframes, and we also get better validation by reading them back out from the hardware and comparing with the expected data. Looks like I typed these up about a year ago. Might be time to get them in before the anniversary ;) Cc:

[Intel-gfx] [PATCH 02/18] video/hdmi: Pass buffer size to infoframe unpack functions

2018-09-20 Thread Ville Syrjala
From: Ville Syrjälä To make sure the infoframe unpack functions don't end up examining stack garbage or oopsing, let's pass in the size of the buffer. v2: Convert tda1997x.c as well (kbuild test robot) Cc: Thierry Reding Cc: Hans Verkuil Cc: linux-me...@vger.kernel.org Signed-off-by: Ville

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Infoframe precompute/check

2018-09-20 Thread Patchwork
== Series Details == Series: drm/i915: Infoframe precompute/check URL : https://patchwork.freedesktop.org/series/49983/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4852 -> Patchwork_10242 = == Summary - SUCCESS == No regressions found. External URL:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Onion unwind for logical_ring_init() failure

2018-09-20 Thread Patchwork
== Series Details == Series: drm/i915/execlists: Onion unwind for logical_ring_init() failure URL : https://patchwork.freedesktop.org/series/49986/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4853 -> Patchwork_10244 = == Summary - SUCCESS == No regressions found.

[Intel-gfx] ✓ Fi.CI.IGT: success for ICL interrupt handling improvements

2018-09-20 Thread Patchwork
== Series Details == Series: ICL interrupt handling improvements URL : https://patchwork.freedesktop.org/series/49971/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4851_full -> Patchwork_10239_full = == Summary - SUCCESS == No regressions found. == Known issues ==

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Infoframe precompute/check

2018-09-20 Thread Patchwork
== Series Details == Series: drm/i915: Infoframe precompute/check URL : https://patchwork.freedesktop.org/series/49983/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4852_full -> Patchwork_10242_full = == Summary - SUCCESS == No regressions found. == Known issues

Re: [Intel-gfx] [PATCH 6/8] drm/i915/psr: Use WA to force HW tracking to exit PSR2

2018-09-20 Thread Rodrigo Vivi
On Thu, Sep 20, 2018 at 01:43:25PM -0700, José Roberto de Souza wrote: > This WA also works fine for PSR2, triggering a selective update when > possible. Oh! really?! It didn't work when I chacked on my CNL, but we probably had other bugs back there... Thanks for finding this Reviewed-by:

Re: [Intel-gfx] [PATCH v2 1/6] drm/dp_mst: Introduce drm_dp_mst_connector_atomic_check()

2018-09-20 Thread Harry Wentland
On 2018-09-19 07:08 PM, Lyude Paul wrote: > Currently the way that we prevent userspace from performing new modesets > on MST connectors that have just been destroyed is rather broken. > There's nothing in the actual DRM DP MST topology helpers that checks > whether or not a connector still

Re: [Intel-gfx] [PATCH 1/6] drm/dp_mst: Introduce drm_dp_mst_connector_atomic_check()

2018-09-20 Thread Harry Wentland
On 2018-09-18 07:06 PM, Lyude Paul wrote: > Currently the way that we prevent userspace from performing new modesets > on MST connectors that have just been destroyed is rather broken. > There's nothing in the actual DRM DP MST topology helpers that checks > whether or not a connector still

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm: Use default dma_fence hooks where possible for null syncobj

2018-09-20 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm: Use default dma_fence hooks where possible for null syncobj URL : https://patchwork.freedesktop.org/series/49988/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4853_full -> Patchwork_10245_full = == Summary -

Re: [Intel-gfx] [PATCH 2/8] drm/i915: Handle cursor updating active_planes correctly, v2.

2018-09-20 Thread Matt Roper
On Thu, Sep 20, 2018 at 12:27:05PM +0200, Maarten Lankhorst wrote: > While we may not update new_crtc_state, we may clear active_planes > if the new cursor update state will disable the cursor, but we fail > after. If this is immediately followed by a modeset disable, we may > soon not disable the

Re: [Intel-gfx] [PATCH 3/8] drm/i915: Unconditionally clear plane visibility, v2.

2018-09-20 Thread Matt Roper
On Thu, Sep 20, 2018 at 12:27:06PM +0200, Maarten Lankhorst wrote: > We need to assume the plane has been visible before, even if no CRTC > is assigned to the plane. This is because nv12 will enable a a extra You may want to clarify that this is future, gen11-style NV12, not current, gen9-style

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/8] drm/i915/psr: Share PSR and PSR2 exit mask

2018-09-20 Thread Patchwork
== Series Details == Series: series starting with [1/8] drm/i915/psr: Share PSR and PSR2 exit mask URL : https://patchwork.freedesktop.org/series/49993/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4854 -> Patchwork_10246 = == Summary - SUCCESS == No regressions found.

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/8] drm/i915/psr: Share PSR and PSR2 exit mask

2018-09-20 Thread Patchwork
== Series Details == Series: series starting with [1/8] drm/i915/psr: Share PSR and PSR2 exit mask URL : https://patchwork.freedesktop.org/series/49993/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4854_full -> Patchwork_10246_full = == Summary - WARNING == Minor

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Force planar YUV coordinates to be a multiple of 2, v2.

2018-09-20 Thread Matt Roper
On Thu, Sep 20, 2018 at 12:27:11PM +0200, Maarten Lankhorst wrote: > We can't make NV12 work any other way. The scaler doesn't handle odd > coordinates well, and we will get visual corruption on the screen. > > Changes since v1: > - Put the check in intel_plane_check_src_coordinates. (Ville) > >

Re: [Intel-gfx] [PATCH 6/8] drm/i915: Clean up scaler setup.

2018-09-20 Thread Matt Roper
On Thu, Sep 20, 2018 at 12:27:09PM +0200, Maarten Lankhorst wrote: > On skylake we can switch to a high quality scaler mode when only 1 out > of 2 scalers are used, but on GLK and later bit 28 has a different > meaning. Don't set it, and make clear the distinction between > SKL and later PS

Re: [Intel-gfx] [PATCH 7/8] drm/i915: Move programming plane scaler to its own function.

2018-09-20 Thread Matt Roper
On Thu, Sep 20, 2018 at 12:27:10PM +0200, Maarten Lankhorst wrote: > This cleans the code up slightly, and will make other changes easier. > > Signed-off-by: Maarten Lankhorst Reviewed-by: Matt Roper > --- > drivers/gpu/drm/i915/intel_sprite.c | 90 + > 1 file

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/8] drm/i915/psr: Share PSR and PSR2 exit mask

2018-09-20 Thread Patchwork
== Series Details == Series: series starting with [1/8] drm/i915/psr: Share PSR and PSR2 exit mask URL : https://patchwork.freedesktop.org/series/49993/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915/psr: Share PSR and PSR2 exit mask Okay! Commit: drm/i915/psr: Do

Re: [Intel-gfx] [PATCH 6/8] drm/i915/psr: Use WA to force HW tracking to exit PSR2

2018-09-20 Thread Souza, Jose
On Thu, 2018-09-20 at 15:54 -0700, Rodrigo Vivi wrote: > On Thu, Sep 20, 2018 at 01:43:25PM -0700, José Roberto de Souza > wrote: > > This WA also works fine for PSR2, triggering a selective update > > when > > possible. > > Oh! really?! It didn't work when I chacked on my CNL, > but we probably

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Make sure fb gtt offsets stay within 32bits

2018-09-20 Thread Patchwork
== Series Details == Series: drm/i915: Make sure fb gtt offsets stay within 32bits URL : https://patchwork.freedesktop.org/series/49985/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4852_full -> Patchwork_10243_full = == Summary - SUCCESS == No regressions found.

Re: [Intel-gfx] [PATCH 6/6] drm/amdgpu/dm/mst: Use drm_dp_mst_connector_atomic_check()

2018-09-20 Thread Harry Wentland
On 2018-09-18 07:06 PM, Lyude Paul wrote: > Hook this into amdgpu's atomic check for their connectors so they never > get modesets on no-longer-present MST connectors. We'll also expand on > this later once we add DP MST fallback retraining support. > > As well, turns out that the only atomic DRM

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/execlists: Onion unwind for logical_ring_init() failure

2018-09-20 Thread Patchwork
== Series Details == Series: drm/i915/execlists: Onion unwind for logical_ring_init() failure URL : https://patchwork.freedesktop.org/series/49986/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4853_full -> Patchwork_10244_full = == Summary - SUCCESS == No regressions

Re: [Intel-gfx] [BUG] i915 HDMI connector status is connected after disconnection

2018-09-20 Thread Chris Chiu
On Wed, Sep 19, 2018 at 8:08 PM, Jani Nikula wrote: > On Wed, 19 Sep 2018, Chris Chiu wrote: >> I tried to add a slight delay in the hotplug work as follows >> >> --- a/drivers/gpu/drm/i915/intel_hotplug.c >> +++ b/drivers/gpu/drm/i915/intel_hotplug.c >> @@ -378,6 +378,8 @@ static void

Re: [Intel-gfx] [PATCH v2 5/5] drm/i915: Bump gen4+ fb size limits to 32kx32k

2018-09-20 Thread Chris Wilson
Quoting Ville Syrjälä (2018-09-19 17:59:51) > On Thu, Sep 13, 2018 at 11:01:40PM +0300, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > With gtt remapping in place we can use arbitraily large framebuffers. > > Let's bump the limits as high as we can (32k-1). Going beyond that > > would

Re: [Intel-gfx] Fi.CI.BAT: failure for drm/i915: set i915 driver probe to asynchronous

2018-09-20 Thread Chris Wilson
Quoting Zhang, Ning A (2018-09-20 02:34:42) > I don't understand why CI failure, could you help me to resolve it? https://patchwork.freedesktop.org/patch/251045/ -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org

Re: [Intel-gfx] Fi.CI.BAT: failure for drm/i915: set i915 driver probe to asynchronous

2018-09-20 Thread Zhang, Ning A
thank you, by your patch I understand why CI fail for my patch. BR. Ning. 在 2018-09-20四的 08:44 +0100,Chris Wilson写道: Quoting Zhang, Ning A (2018-09-20 02:34:42) I don't understand why CI failure, could you help me to resolve it? https://patchwork.freedesktop.org/patch/251045/ -Chris

Re: [Intel-gfx] [PATCH 10/40] drm/i915/selftests: Basic stress test for rapid context switching

2018-09-20 Thread Chris Wilson
Quoting Mika Kuoppala (2018-09-20 11:38:08) > Chris Wilson writes: > > + end_time = jiffies + i915_selftest.timeout_jiffies; > > + for_each_prime_number_from(prime, 2, 8192) { > > + times[1] = ktime_get_raw(); > > + > > + for (n = 0;

[Intel-gfx] [CI] drm/i915/selftests: Basic stress test for rapid context switching

2018-09-20 Thread Chris Wilson
We need to exercise the HW and submission paths for switching contexts rapidly to check that features such as execlists' wa_tail are adequate. Plus it's an interesting baseline latency metric. v2: Check the initial request for allocation errors v3: Use finite waits for more robust handling of

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Preparations for adding gen11 planar formats.

2018-09-20 Thread Patchwork
== Series Details == Series: drm/i915: Preparations for adding gen11 planar formats. URL : https://patchwork.freedesktop.org/series/49956/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4849 -> Patchwork_10236 = == Summary - SUCCESS == No regressions found. External

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Basic stress test for rapid context switching (rev2)

2018-09-20 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Basic stress test for rapid context switching (rev2) URL : https://patchwork.freedesktop.org/series/48255/ State : warning == Summary == $ dim checkpatch origin/drm-tip 5a8436e6be6e drm/i915/selftests: Basic stress test for rapid context

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Basic stress test for rapid context switching (rev2)

2018-09-20 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Basic stress test for rapid context switching (rev2) URL : https://patchwork.freedesktop.org/series/48255/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4849 -> Patchwork_10237 = == Summary - SUCCESS == No regressions

Re: [Intel-gfx] [PATCH] drm/i915/guc: Restore preempt-context across S3/S4

2018-09-20 Thread Chris Wilson
Quoting Michał Winiarski (2018-09-20 12:47:07) > On Wed, Sep 19, 2018 at 09:54:32PM +0100, Chris Wilson wrote: > > Stolen memory is lost across S4 (hibernate) or S3-RST as it is a portion > > of ordinary volatile RAM. As we allocate our rings from stolen, this may > > include the rings used for

Re: [Intel-gfx] [PATCH 10/40] drm/i915/selftests: Basic stress test for rapid context switching

2018-09-20 Thread Mika Kuoppala
Chris Wilson writes: > We need to exercise the HW and submission paths for switching contexts > rapidly to check that features such as execlists' wa_tail are adequate. > Plus it's an interesting baseline latency metric. > > v2: Check the initial request for allocation errors > > Signed-off-by:

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Preparations for adding gen11 planar formats.

2018-09-20 Thread Patchwork
== Series Details == Series: drm/i915: Preparations for adding gen11 planar formats. URL : https://patchwork.freedesktop.org/series/49956/ State : warning == Summary == $ dim checkpatch origin/drm-tip a9c37aaf2d75 drm/i915: Clean up casts to crtc_state in intel_atomic_commit_tail()

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Preparations for adding gen11 planar formats.

2018-09-20 Thread Patchwork
== Series Details == Series: drm/i915: Preparations for adding gen11 planar formats. URL : https://patchwork.freedesktop.org/series/49956/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: Clean up casts to crtc_state in intel_atomic_commit_tail() Okay! Commit:

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/selftests: Basic stress test for rapid context switching (rev2)

2018-09-20 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Basic stress test for rapid context switching (rev2) URL : https://patchwork.freedesktop.org/series/48255/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915/selftests: Basic stress test for rapid context switching

Re: [Intel-gfx] [PATCH] drm/i915/guc: Restore preempt-context across S3/S4

2018-09-20 Thread Michał Winiarski
On Wed, Sep 19, 2018 at 09:54:32PM +0100, Chris Wilson wrote: > Stolen memory is lost across S4 (hibernate) or S3-RST as it is a portion > of ordinary volatile RAM. As we allocate our rings from stolen, this may > include the rings used for our preempt context and their breadcrumb > instructions.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for idea for optimize i915 initial time with eDP

2018-09-20 Thread Patchwork
== Series Details == Series: idea for optimize i915 initial time with eDP URL : https://patchwork.freedesktop.org/series/49952/ State : warning == Summary == $ dim checkpatch origin/drm-tip 32ea43a57a0b initial panel_power_off_time should be 0 -:38: WARNING:COMMIT_LOG_LONG_LINE: Possible

Re: [Intel-gfx] [PATCH 02/15] drm/i915: Handle cursor updating active_planes correctly.

2018-09-20 Thread Maarten Lankhorst
Op 20-09-18 om 02:12 schreef Matt Roper: > On Wed, Sep 19, 2018 at 03:56:31PM +0200, Maarten Lankhorst wrote: >> While we may not update new_crtc_state, we may clear active_planes >> if the new cursor update state will disable the cursor, but we fail >> after. If this is immediately followed by a

[Intel-gfx] [PATCH 2/8] drm/i915: Handle cursor updating active_planes correctly, v2.

2018-09-20 Thread Maarten Lankhorst
While we may not update new_crtc_state, we may clear active_planes if the new cursor update state will disable the cursor, but we fail after. If this is immediately followed by a modeset disable, we may soon not disable the planes correctly when we start depending on active_planes. Changes since

[Intel-gfx] [PATCH 6/8] drm/i915: Clean up scaler setup.

2018-09-20 Thread Maarten Lankhorst
On skylake we can switch to a high quality scaler mode when only 1 out of 2 scalers are used, but on GLK and later bit 28 has a different meaning. Don't set it, and make clear the distinction between SKL and later PS values. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/i915_reg.h

[Intel-gfx] [PATCH i-g-t 5/5] igt: Add gem_exec_balancer

2018-09-20 Thread Chris Wilson
Exercise the in-kernel load balancer checking that we can distribute batches across the set of ctx->engines to avoid load. Signed-off-by: Chris Wilson --- tests/Makefile.am | 1 + tests/Makefile.sources| 1 + tests/gem_exec_balancer.c | 469 ++

Re: [Intel-gfx] [PATCH 1/2] drm/i915: don't assume struct page in i915_sg_trim

2018-09-20 Thread Chris Wilson
Quoting Matthew Auld (2018-09-20 15:27:06) > Which means we can now also put it to work in fake_get_huge_pages. > > Signed-off-by: Matthew Auld > Cc: Tvrtko Ursulin Can we take this into account for selftests/scatterlist.c? Reviewed-by: Chris Wilson -Chris

[Intel-gfx] [PATCH 04/10] drm/i915/icl: Add helper to enable/disable master irq

2018-09-20 Thread Mika Kuoppala
Add static inline helpers to master irq control. Related comments become superfluous and can be removed. Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_irq.c | 17 - 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c

[Intel-gfx] [PATCH 10/10] drm/i915/icl: Only ack irq identities we did handle

2018-09-20 Thread Mika Kuoppala
If we ack the identities immediately after they have been handled, it should unblock next interrupt accumulation in the gathering register earlier. It also allows us to remove time based polling of valid bit. If we don't get a valid sample now, we will likely get a valid sample on next interrupt,

[Intel-gfx] [PATCH 08/10] drm/i915/icl: Handle GT interrupts after enabling master

2018-09-20 Thread Mika Kuoppala
Don't keep master disabled while we handle the current interrupts. This should help a little on latency of generating the next interrupt. Suggested-by: Chris Wilson Cc: Chris Wilson Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_irq.c | 3 +-- 1 file changed, 1 insertion(+), 2

[Intel-gfx] [PATCH 00/10] ICL interrupt handling improvements

2018-09-20 Thread Mika Kuoppala
Hi, This series brings gen11 interrupt handling closer to what we have with previous gens. Namely the early releasing of master intr to reduce interrupt latency. Also cleanups in guc interrupts and identity selector handling are included. Code size shrinks a little: add/remove: 0/0 grow/shrink:

[Intel-gfx] [PATCH 03/10] drm/i915/icl: No need to early bailout on interrupt

2018-09-20 Thread Mika Kuoppala
Getting interrupt without any second level indications is unlikely. So there is no real advantage to bailout early as all the second level handlers can handle empty master control status. Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_irq.c | 6 +- 1 file changed, 1

[Intel-gfx] [PATCH 09/10] drm/i915/icl: Handle display interrupts after enabling master

2018-09-20 Thread Mika Kuoppala
Don't keep master disabled while handling display interrupts. This should help a little with latency of generating the next interrupt. Cc: Ville Syrjälä Cc: Chris Wilson Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_irq.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-)

[Intel-gfx] [PATCH 06/10] drm/i915/icl: Streamline guc irq handling

2018-09-20 Thread Mika Kuoppala
The returning of iir through function parameter is eyesore. Make guc irq acking inline and return the iir directly, handling the empty iir exception early. We can then omit passing the master control to guc handler as the iir now contains everything we need. Cc: Chris Wilson Cc: Dhinakaran

[Intel-gfx] [PATCH 01/10] drm/i915/icl: No need to ack intr through master control

2018-09-20 Thread Mika Kuoppala
All other master control register bits, except the enable, are read only and they are level indications of the second level interrupt status. Only touch enable bit and rectify the comment. Cc: Chris Wilson Cc: Dhinakaran Pandiyan Signed-off-by: Mika Kuoppala ---

[Intel-gfx] [PATCH 07/10] drm/i915/icl: Make own function for display irq handler

2018-09-20 Thread Mika Kuoppala
Move display interrupt handling outside of generic handler. Cc: Chris Wilson Cc: Ville Syrjälä Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_irq.c | 36 - 1 file changed, 22 insertions(+), 14 deletions(-) diff --git

[Intel-gfx] [PATCH 02/10] drm/i915/icl: Disable master intr early

2018-09-20 Thread Mika Kuoppala
Disable master interrupt first before reading. This guarantees that the sample we act upon is a frozen sample of level indications and no interrupt was missed between reading and disabling, possibly then ending up triggering another interrupt later. Cc: Chris Wilson Cc: Dhinakaran Pandiyan

Re: [Intel-gfx] [PATCH 2/2] drm/i915: pass dev_priv to i915_gem_cleanup_stolen

2018-09-20 Thread Chris Wilson
Quoting Matthew Auld (2018-09-20 15:27:07) > It really wants dev_priv anyway, also now matches i915_gem_init_stolen. > > Signed-off-by: Matthew Auld > Cc: Joonas Lahtinen > Cc: Tvrtko Ursulin > Reviewed-by: Tvrtko Ursulin Reviewed-by: Chris Wilson As a bonus, start feeding in

Re: [Intel-gfx] [PATCH 02/10] drm/i915/icl: Disable master intr early

2018-09-20 Thread Chris Wilson
Quoting Mika Kuoppala (2018-09-20 15:33:42) > Disable master interrupt first before reading. This > guarantees that the sample we act upon is a frozen sample > of level indications and no interrupt was missed between > reading and disabling, possibly then ending up triggering > another interrupt

Re: [Intel-gfx] [PATCH 1/2] drm/i915: don't assume struct page in i915_sg_trim

2018-09-20 Thread Ville Syrjälä
On Thu, Sep 20, 2018 at 03:27:06PM +0100, Matthew Auld wrote: > Which means we can now also put it to work in fake_get_huge_pages. Just another reminder to write self-contained commit msgs. Reading this wihtout copy pasting the subject line in makes one wonder what the "which" is here. > >

[Intel-gfx] [PATCH 05/10] drm/i915/icl: Trim down posting reads on master intr control

2018-09-20 Thread Mika Kuoppala
If we return a master control value on disable, it will act as a posting read and further streamline our interrupt handler. We can then safely use the inlined helpers on irq reset and on postinstall. Posting read on postinstall is superfluous as nothing beneath it is depedent. Cc: Chris Wilson

Re: [Intel-gfx] [PATCH 03/40] drm/i915/selftests: Live tests emit requests and so require rpm

2018-09-20 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-09-20 15:01:38) > > On 19/09/2018 20:55, Chris Wilson wrote: > > As we emit requests or touch HW directly for some of the live tests, the > > requirement is that we hold the rpm wakeref before doing so. We want a > > mix of granularity since we will want to test

[Intel-gfx] [CI] drm/i915/selftests: Live tests emit requests and so require rpm

2018-09-20 Thread Chris Wilson
As we emit requests or touch HW directly for some of the live tests, the requirement is that we hold the rpm wakeref before doing so. We want a mix of granularity since we will want to test runtime suspend, so try to mark up only the critical sections where we need rpm for the live test.

Re: [Intel-gfx] [PATCH 1/2] drm/i915: don't assume struct page in i915_sg_trim

2018-09-20 Thread Tvrtko Ursulin
On 20/09/2018 15:27, Matthew Auld wrote: Which means we can now also put it to work in fake_get_huge_pages. Signed-off-by: Matthew Auld Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_gem.c | 4 +++- drivers/gpu/drm/i915/selftests/huge_pages.c | 2 ++ 2 files changed, 5

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