[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Cache the error string (rev5)

== Series Details == Series: drm/i915: Cache the error string (rev5) URL : https://patchwork.freedesktop.org/series/46777/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: Cache the error string +drivers/gpu/drm/i915/i915_gpu_error.c:922:23: warning: expression

[Intel-gfx] [RFC 04/13] drm/i915/pmu: Add queued counter

From: Tvrtko Ursulin We add a PMU counter to expose the number of requests which have been submitted from userspace but are not yet runnable due dependencies and unsignaled fences. This is useful to analyze the overall load of the system. v2: * Rebase for name change and re-order. * Drop

[Intel-gfx] [RFC 05/13] drm/i915/pmu: Add runnable counter

From: Tvrtko Ursulin We add a PMU counter to expose the number of requests with resolved dependencies waiting for a slot on the GPU to run. This is useful to analyze the overall load of the system. v2: Don't limit to gen8+. v3: * Rebase for dynamic sysfs. * Drop currently executing

[Intel-gfx] [RFC 08/13] drm/i915: Move intel_engine_context_in/out into intel_lrc.c

From: Tvrtko Ursulin Intel_lrc.c is the only caller and so to avoid some header file ordering issues in future patches move these two over there. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/intel_lrc.c| 57 + drivers/gpu/drm/i915/intel_ringbuffer.h |

[Intel-gfx] [RFC 13/13] drm/i915: Add sysfs toggle to enable per-client engine stats

From: Tvrtko Ursulin By default we are not collecting any per-engine and per-context statistcs. Add a new sysfs toggle to enable this facility: $ echo 1 >/sys/class/drm/card0/clients/enable_stats v2: Rebase. v3: sysfs_attr_init. Signed-off-by: Tvrtko Ursulin ---

[Intel-gfx] [RFC 09/13] drm/i915: Track per-context engine busyness

From: Tvrtko Ursulin Some customers want to know how much of the GPU time are their clients using in order to make dynamic load balancing decisions. With the hooks already in place which track the overall engine busyness, we can extend that slightly to split that time between contexts. v2: Fix

[Intel-gfx] [RFC 12/13] drm/i915: Expose per-engine client busyness

From: Tvrtko Ursulin Expose per-client and per-engine busyness under the previously added sysfs client root. The new files are one per-engine instance and located under the 'busy' directory. Each contains a monotonically increasing nano-second resolution times each client's jobs were executing

[Intel-gfx] [RFC 00/13] 21st century intel_gpu_top

From: Tvrtko Ursulin A collection of patches which I have been sending before, sometimes together and sometimes separately, which enable intel_gpu_top to report queue depths (also translates as overall GPU load average) and per DRM client per engine busyness. This enables a fancy intel_gpu_top

[Intel-gfx] [RFC 03/13] drm/i915: Keep a count of requests submitted from userspace

From: Tvrtko Ursulin Keep a count of requests submitted from userspace and not yet runnable due unresolved dependencies. v2: Rename and move under the container struct. (Chris Wilson) v3: Rebase. v4: Move decrement site to the backend to shrink the window of double- accounting as much as

[Intel-gfx] [RFC 02/13] drm/i915: Keep a count of requests waiting for a slot on GPU

From: Tvrtko Ursulin Keep a per-engine number of runnable (waiting for GPU time) requests. We choose to mange the runnable counter at the backend level instead of at the request submit_notify callback. The latter would be more consolidated and less code, but it would require making the counter

[Intel-gfx] [RFC 01/13] drm/i915/pmu: Fix enable count array size and bounds checking

From: Tvrtko Ursulin Enable count array is supposed to have one counter for each possible engine sampler. As such array sizing and bounds checking is not correct when more engine samplers are added. At the same time tidy the assert for readability and robustness. Signed-off-by: Tvrtko Ursulin

[Intel-gfx] [PATCH 05/13] drm/i915: Make skl_detach_scalers take crtc_state

Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/intel_display.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 91574abafb65..56784ae26369 100644 ---

[Intel-gfx] [PATCH 02/13] drm/i915: Make panel fitter functions take state

Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/intel_display.c | 91 ++-- 1 file changed, 45 insertions(+), 46 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 264feed76c08..701caab4e382 100644 ---

[Intel-gfx] [PATCH 01/13] drm/i915: Remove dereferences of crtc->config in set_pipeconf/misc functions.

One more user of crtc->config down. :) Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/intel_display.c | 72 ++-- 1 file changed, 36 insertions(+), 36 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index

[Intel-gfx] [PATCH 09/13] drm/i915: Get rid of crtc->config from icl_pll_to_ddi_pll_sel

Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/intel_ddi.c | 15 --- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index b6594948b617..9e82281b4fdf 100644 ---

[Intel-gfx] [PATCH 07/13] drm/i915: Make ironlake_pch_transcoder_set_timings take crtc_state

Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/intel_display.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 36a8d5fb8881..57c81e8e44be 100644 ---

[Intel-gfx] [PATCH 12/13] drm/i915: Get rid of crtc->config in chv_data_lane_soft_reset

Fixing chv_set_phy_signal_level() still requires too many levels of indirection to pass crtc_state along. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/intel_dpio_phy.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dpio_phy.c

[Intel-gfx] [PATCH 10/13] drm/i915: Use crtc->state in intel_fbdev_init_bios

fbdev init shouldn't race with userspace since it's called from intel_modeset_init, so it's safe to dereference crtc->state and assume nothing changed yet. At least not more harmful than crtc->config. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/intel_fbdev.c | 8 1 file

[Intel-gfx] [PATCH 11/13] drm/i915: Get rid of crtc->config dereference in intel_dp_retrain_link

Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/intel_dp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 15a981ef5966..d9cc52b2ba79 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++

[Intel-gfx] [PATCH 06/13] drm/i915: Make pll functions take crtc_state

Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/intel_display.c | 17 + 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 56784ae26369..36a8d5fb8881 100644 ---

[Intel-gfx] [PATCH 13/13] drm/i915: Get rid of intel_crtc->config in crtc_enable/disable functions

These functions already have a pointer to the correct state, so use it instead of crtc->config. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/intel_display.c | 60 ++-- 1 file changed, 30 insertions(+), 30 deletions(-) diff --git

[Intel-gfx] [PATCH 04/13] drm/i915: Use crtc_state in ironlake_enable_pch_transcoder

Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/intel_display.c | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index ca5e4d72d476..91574abafb65 100644 ---

[Intel-gfx] [PATCH 03/13] drm/i915: Make intel_set_pipe_timings/src_size take a pointer to crtc_state

Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/intel_display.c | 41 ++-- 1 file changed, 20 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 701caab4e382..ca5e4d72d476 100644 ---

[Intel-gfx] [PATCH 08/13] drm/i915: Make shared dpll functions take crtc_state

Do not rely on crtc->config any more. Remove the assertion from ibx_pch_dpll_disable, because we the dpll state tracking should already handle this case correctly. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/intel_display.c | 14 ++-- drivers/gpu/drm/i915/intel_dpll_mgr.c

[Intel-gfx] [PATCH 00/13] drm/i915: First cleanup pass to get rid of more crtc->config users.

There are a lot of places where we use crtc->config, but shouldn't and easy ways around it are available. In many cases, either the function itself, or the calling function has a pointer to the correct state, so use it when available. This is not a full cleanup yet, want to send it in parts. :)

Re: [Intel-gfx] [PATCH 09/13] drm/i915: Get rid of crtc->config from icl_pll_to_ddi_pll_sel

On Wed, Oct 03, 2018 at 03:37:11PM +0200, Maarten Lankhorst wrote: > Signed-off-by: Maarten Lankhorst With a bit if commit msg added Reviewed-by: Ville Syrjälä > --- > drivers/gpu/drm/i915/intel_ddi.c | 15 --- > 1 file changed, 8 insertions(+), 7 deletions(-) > > diff --git

[Intel-gfx] [PATCH i-g-t] igt/gem_exec_capture: Capture many, many objects

Exercise O(N^2) behaviour in reading the error state, and push it to the extreme. Reported-by: Jason Ekstrand Signed-off-by: Chris Wilson --- lib/meson.build | 1 + tests/gem_exec_capture.c | 351 ++- tests/intel-ci/blacklist.txt | 1 + 3

Re: [Intel-gfx] [PATCH xf86-video-intel v1] sna: Added AYUV format support for textured and sprite video adapters.

Quoting Ville Syrjälä (2018-10-03 13:28:30) > On Wed, Oct 03, 2018 at 12:29:53PM +0100, Chris Wilson wrote: > > Quoting Stanislav Lisovskiy (2018-10-02 10:38:53) > > > diff --git a/src/sna/sna_render.h b/src/sna/sna_render.h > > > index 6669af9d..ef88d1f9 100644 > > > --- a/src/sna/sna_render.h >

Re: [Intel-gfx] [PATCH v5] drm/i915: Engine discovery query

Quoting Tvrtko Ursulin (2018-10-03 13:51:58) > > On 03/10/2018 13:42, Chris Wilson wrote: > > Quoting Chris Wilson (2018-10-03 13:28:09) > >> Quoting Tvrtko Ursulin (2018-10-03 10:58:55) > >>> +static int > >>> +query_engine_info(struct drm_i915_private *i915, > >>> + struct

Re: [Intel-gfx] [PATCH 11/18] drm/msm: Use drm_atomic_helper_shutdown

On Wed, Oct 03, 2018 at 11:16:44AM +0200, Daniel Vetter wrote: > drm_plane_helper_disable is a non-atomic drivers only function, and > will blow up (since no one passes the locking context it needs). > > Atomic drivers which want to quiescent their hw on unload should > use

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 1/5] igt/kms_getfb: Check the iface exists before use

Quoting Antonio Argenziano (2018-10-02 23:27:46) > > > On 02/10/18 01:30, Joonas Lahtinen wrote: > > Quoting Antonio Argenziano (2018-10-01 22:53:46) > >> Fair enough. > >> > >> Acked-by: Antonio Argenziano > >> > >> for the series. > > > > Please, read the following chapters (they're

Re: [Intel-gfx] [PATCH 06/13] drm/i915: Make pll functions take crtc_state

On Wed, Oct 03, 2018 at 03:37:08PM +0200, Maarten Lankhorst wrote: > Signed-off-by: Maarten Lankhorst > --- > drivers/gpu/drm/i915/intel_display.c | 17 + > 1 file changed, 9 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c >

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Always try to reset the GPU on takeover

== Series Details == Series: drm/i915: Always try to reset the GPU on takeover URL : https://patchwork.freedesktop.org/series/50497/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4920 -> Patchwork_10342 = == Summary - FAILURE == Serious unknown changes coming with

Re: [Intel-gfx] [PATCH] [intel-gfx] drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry.

On Wed, Oct 03, 2018 at 11:27:42AM +0530, Yadav, Jyoti R wrote: > > > On 10/3/2018 10:36 AM, Vivi, Rodrigo wrote: > > > > > On Oct 2, 2018, at 9:20 PM, Yadav, Jyoti R > > > wrote: > > > > > > DC5 and DC6 counter register tells about residency of DC5 and DC6. > > > These registers are same

[Intel-gfx] [RFC i-g-t 6/6] intel-gpu-top: Support for client stats

From: Tvrtko Ursulin Signed-off-by: Tvrtko Ursulin --- tools/intel_gpu_top.c | 360 -- 1 file changed, 351 insertions(+), 9 deletions(-) diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c index 8990ef17b771..02c5a7d77614 100644 ---

[Intel-gfx] [RFC i-g-t 1/6] include: DRM uAPI headers update

From: Tvrtko Ursulin Signed-off-by: Tvrtko Ursulin --- include/drm-uapi/amdgpu_drm.h | 52 +++- include/drm-uapi/drm.h | 16 ++ include/drm-uapi/drm_fourcc.h | 215 ++ include/drm-uapi/drm_mode.h| 26 +- include/drm-uapi/etnaviv_drm.h | 6 +

[Intel-gfx] [RFC i-g-t 3/6] intel-gpu-overlay: Show 1s, 30s and 15m GPU load

From: Tvrtko Ursulin Show total GPU loads in the window banner. Engine load is defined as total of runnable and running requests on an engine. Total, non-normalized, load is display. In other words if N engines are busy with exactly one request, the load will be shown as N. v2: * Different

[Intel-gfx] [RFC i-g-t 4/6] tests/perf_pmu: Add tests for engine queued/runnable/running stats

From: Tvrtko Ursulin Simple tests to check reported queue depths are correct. v2: * Improvements similar to ones from i915_query.c. v3: * Rebase for __igt_spin_batch_new. Signed-off-by: Tvrtko Ursulin --- tests/perf_pmu.c | 259 +++ 1 file

[Intel-gfx] [RFC i-g-t 0/6] 21st century intel_gpu_top & Co.

From: Tvrtko Ursulin IGT patches accompanying the similary named i915 series. Most notably to sketch an improved intel_gpu_top which now, like the real top, can show the per client engine utilisation: intel-gpu-top - load avg 3.30, 1.51, 0.08; 949/ 949 MHz;0% RC6; 14.66 Watts;

[Intel-gfx] [RFC i-g-t 2/6] intel-gpu-overlay: Add engine queue stats

From: Tvrtko Ursulin Use new PMU engine queue stats (queued, runnable and running) and display them per engine. v2: * Compact per engine stats. (Chris Wilson) Signed-off-by: Tvrtko Ursulin --- overlay/gpu-top.c | 42 ++ overlay/gpu-top.h | 11

[Intel-gfx] [RFC i-g-t 5/6] intel-gpu-top: Add queue depths and load average

From: Tvrtko Ursulin With the driver now exporting various request queue depths for each engine, we can display this information here. Both as raw counters, and by adding a load average like metrics composed from number of runnable and running requests in a given time period. 1s, 30s and 5m

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/execlists: Flush the CS events before unpinning

== Series Details == Series: drm/i915/execlists: Flush the CS events before unpinning URL : https://patchwork.freedesktop.org/series/50494/ State : warning == Summary == $ dim checkpatch origin/drm-tip f8924caa9ada drm/i915/execlists: Flush the CS events before unpinning -:16:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Flush the CS events before unpinning

== Series Details == Series: drm/i915/execlists: Flush the CS events before unpinning URL : https://patchwork.freedesktop.org/series/50494/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4919 -> Patchwork_10340 = == Summary - SUCCESS == No regressions found. External

Re: [Intel-gfx] [PATCH 05/13] drm/i915: Make skl_detach_scalers take crtc_state

On Wed, Oct 03, 2018 at 03:37:07PM +0200, Maarten Lankhorst wrote: > Signed-off-by: Maarten Lankhorst > --- > drivers/gpu/drm/i915/intel_display.c | 12 ++-- > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c >

Re: [Intel-gfx] [PATCH 10/13] drm/i915: Use crtc->state in intel_fbdev_init_bios

On Wed, Oct 03, 2018 at 03:37:12PM +0200, Maarten Lankhorst wrote: > fbdev init shouldn't race with userspace since it's called from > intel_modeset_init, so it's safe to dereference crtc->state and > assume nothing changed yet. > > At least not more harmful than crtc->config. > > Signed-off-by:

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: First cleanup pass to get rid of more crtc->config users.

== Series Details == Series: drm/i915: First cleanup pass to get rid of more crtc->config users. URL : https://patchwork.freedesktop.org/series/50506/ State : failure == Summary == CALLscripts/checksyscalls.sh DESCEND objtool CHK include/generated/compile.h CC [M]

[Intel-gfx] [PATCH v2 1/3] drm/i915: Restore vblank interrupts earlier

From: Ville Syrjälä Plane sanitation needs vblank interrupts (on account of CxSR disable). So let's restore vblank interrupts earlier. v2: Make it actually build v3: Add comment to explain why we need this (Daniel) Cc: sta...@vger.kernel.org Cc: Dennis Tested-by: Dennis Bugzilla:

Re: [Intel-gfx] [PATCH xf86-video-intel v1] sna: Added AYUV format support for textured and sprite video adapters.

Quoting Stanislav Lisovskiy (2018-10-02 10:38:53) > diff --git a/src/sna/sna_render.h b/src/sna/sna_render.h > index 6669af9d..ef88d1f9 100644 > --- a/src/sna/sna_render.h > +++ b/src/sna/sna_render.h > @@ -139,20 +139,25 @@ struct sna_composite_op { > > struct { >

Re: [Intel-gfx] [RFC 1/3] drm/i915/icl: Restructure ICL DPLL enable functionality

On Wed, 03 Oct 2018, Jani Nikula wrote: > On Wed, 03 Oct 2018, Jani Nikula wrote: >> On Fri, 14 Sep 2018, Ville Syrjälä wrote: >>> On Fri, Sep 14, 2018 at 12:24:12PM +0530, Vandita Kulkarni wrote: From: Madhav Chauhan In Gen11, DPLL 0 and 1 are shared between DDI and DSI.

Re: [Intel-gfx] [PATCH v5] drm/i915: Engine discovery query

On 03/10/2018 13:42, Chris Wilson wrote: Quoting Chris Wilson (2018-10-03 13:28:09) Quoting Tvrtko Ursulin (2018-10-03 10:58:55) +static int +query_engine_info(struct drm_i915_private *i915, + struct drm_i915_query_item *query_item) +{ + for_each_engine(engine, i915, id)

[Intel-gfx] ✓ Fi.CI.BAT: success for Refactor and Add helper function for combophy/tc ports

== Series Details == Series: Refactor and Add helper function for combophy/tc ports URL : https://patchwork.freedesktop.org/series/50484/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4919 -> Patchwork_10341 = == Summary - WARNING == Minor unknown changes coming with

Re: [Intel-gfx] [PATCH v3] drm/i915: Handle incomplete Z_FINISH for compressed error states

Quoting Tvrtko Ursulin (2018-10-03 10:04:04) > > On 03/10/2018 09:24, Chris Wilson wrote: > > The final call to zlib_deflate(Z_FINISH) may require more output > > space to be allocated and so needs to re-invoked. Failure to do so in > > the current code leads to incomplete zlib streams (albeit

[Intel-gfx] [PATCH v2] drm/i915: Optionally disable automatic recovery after a GPU reset

Some clients, such as mesa, may only emit minimal incremental batches that rely on the logical context state from previous batches. They know that recovery is impossible after a hang as their required GPU state is lost, and that each in flight and subsequent batch will hang (resetting the context

Re: [Intel-gfx] [PATCH 1/4] drm: Add P010, P012, P016 format definitions and fourcc

Hi Alex, For my patches there seems limited interest to get them merged before IGT support these modes..I'm not holding my breath for this. https://lists.freedesktop.org/archives/intel-gfx/2018-September/174877.html /Juha-Pekka On 02.10.2018 18:00, Alexandru-Cosmin Gheorghe wrote: Hi, How

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Cache the error string (rev5)

== Series Details == Series: drm/i915: Cache the error string (rev5) URL : https://patchwork.freedesktop.org/series/46777/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4919 -> Patchwork_10338 = == Summary - WARNING == Minor unknown changes coming with Patchwork_10338

Re: [Intel-gfx] [PATCH v5] drm/i915: Engine discovery query

Quoting Tvrtko Ursulin (2018-10-03 10:58:55) > +static int > +query_engine_info(struct drm_i915_private *i915, > + struct drm_i915_query_item *query_item) > +{ > + for_each_engine(engine, i915, id) { > + struct drm_i915_engine_info info; > + > + if

Re: [Intel-gfx] [PATCH xf86-video-intel v1] sna: Added AYUV format support for textured and sprite video adapters.

On Wed, 2018-10-03 at 12:29 +0100, Chris Wilson wrote: > Quoting Stanislav Lisovskiy (2018-10-02 10:38:53) > > diff --git a/src/sna/sna_render.h b/src/sna/sna_render.h > > index 6669af9d..ef88d1f9 100644 > > --- a/src/sna/sna_render.h > > +++ b/src/sna/sna_render.h > > @@ -139,20 +139,25 @@ struct

Re: [Intel-gfx] [PATCH xf86-video-intel v1] sna: Added AYUV format support for textured and sprite video adapters.

On Wed, Oct 03, 2018 at 01:34:47PM +0100, Chris Wilson wrote: > Quoting Ville Syrjälä (2018-10-03 13:28:30) > > On Wed, Oct 03, 2018 at 12:29:53PM +0100, Chris Wilson wrote: > > > Quoting Stanislav Lisovskiy (2018-10-02 10:38:53) > > > > diff --git a/src/sna/sna_render.h b/src/sna/sna_render.h > >

Re: [Intel-gfx] [PATCH 12/13] drm/i915: Get rid of crtc->config in chv_data_lane_soft_reset

On Wed, Oct 03, 2018 at 03:37:14PM +0200, Maarten Lankhorst wrote: > Fixing chv_set_phy_signal_level() still requires too many levels of > indirection to pass crtc_state along. > > Signed-off-by: Maarten Lankhorst > --- > drivers/gpu/drm/i915/intel_dpio_phy.c | 4 ++-- > 1 file changed, 2

[Intel-gfx] ✗ Fi.CI.BAT: failure for 21st century intel_gpu_top

== Series Details == Series: 21st century intel_gpu_top URL : https://patchwork.freedesktop.org/series/50498/ State : failure == Summary == Applying: drm/i915/pmu: Fix enable count array size and bounds checking Applying: drm/i915: Keep a count of requests waiting for a slot on GPU Applying:

[Intel-gfx] [PATCH v2 3/3] drm/i915: Clean up early plane debugs

From: Ville Syrjälä Print the plane hw state readout results in the common format we already use for pipes and encoders. Also print some clearer debug messages when we disable planes during the early phases of state readout/sanitization. v2: Rebase Signed-off-by: Ville Syrjälä ---

[Intel-gfx] [PATCH v2 2/3] drm/i915: Use the correct crtc when sanitizing plane mapping

From: Ville Syrjälä When we decide that a plane is attached to the wrong pipe we try to turn off said plane. However we are passing around the crtc we think that the plane is supposed to be using rather than the crtc it is currently using. That doesn't work all that well because we may have to

[Intel-gfx] [PATCH] drm/i915: Cache the error string

Currently, we convert the error state into a string every time we read from sysfs (and sysfs reads in page size (4KiB) chunks). We do try to window the string and only capture the portion that is being read, but that means that we must always convert up to the window to find the start. For a very

[Intel-gfx] [RFC 10/13] drm/i915: Expose list of clients in sysfs

From: Tvrtko Ursulin Expose a list of clients with open file handles in sysfs. This will be a basis for a top-like utility showing per-client and per- engine GPU load. Currently we only expose each client's pid and name under opaque numbered directories in /sys/class/drm/card0/clients/. For

[Intel-gfx] [RFC 07/13] drm/i915: Store engine backpointer in the intel_context

From: Tvrtko Ursulin It will become useful in a later patch. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_gem_context.c | 1 + drivers/gpu/drm/i915/i915_gem_context.h | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gem_context.c

[Intel-gfx] [RFC 11/13] drm/i915: Update client name on context create

From: Tvrtko Ursulin Some clients have the DRM fd passed to them over a socket by the X server. Grab the real client and pid when they create their first context and update the exposed data for more useful enumeration. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_drv.h

[Intel-gfx] [RFC 06/13] drm/i915/pmu: Add running counter

From: Tvrtko Ursulin We add a PMU counter to expose the number of requests currently executing on the GPU. This is useful to analyze the overall load of the system. v2: * Rebase. * Drop floating point constant. (Chris Wilson) v3: * Change scale to 1024 for faster arithmetics. (Chris

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Optionally disable automatic recovery after a GPU reset (rev2)

== Series Details == Series: drm/i915: Optionally disable automatic recovery after a GPU reset (rev2) URL : https://patchwork.freedesktop.org/series/50458/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4919 -> Patchwork_10339 = == Summary - WARNING == Minor unknown

Re: [Intel-gfx] [PATCH 02/13] drm/i915: Make panel fitter functions take state

On Wed, Oct 03, 2018 at 03:37:04PM +0200, Maarten Lankhorst wrote: > Signed-off-by: Maarten Lankhorst > --- > drivers/gpu/drm/i915/intel_display.c | 91 ++-- > 1 file changed, 45 insertions(+), 46 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c >

Re: [Intel-gfx] [PATCH 11/13] drm/i915: Get rid of crtc->config dereference in intel_dp_retrain_link

On Wed, Oct 03, 2018 at 03:37:13PM +0200, Maarten Lankhorst wrote: > Signed-off-by: Maarten Lankhorst > --- > drivers/gpu/drm/i915/intel_dp.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Use the correct crtc when sanitizing plane mapping

On Wed, Oct 03, 2018 at 10:53:11AM +0200, Daniel Vetter wrote: > On Tue, Oct 02, 2018 at 05:21:36PM +0300, Ville Syrjälä wrote: > > On Tue, Oct 02, 2018 at 02:11:34PM +0200, Daniel Vetter wrote: > > > On Mon, Oct 01, 2018 at 05:31:20PM +0300, Ville Syrjala wrote: > > > > From: Ville Syrjälä > > >

[Intel-gfx] [CI] drm/i915/execlists: Flush the CS events before unpinning

Inside the execlists submission tasklet, we often make the mistake of assuming that everything beneath the request is available for use. However, the submission and the request live on two separate timelines, and the request contents may be freed from an early retirement before we have had a

Re: [Intel-gfx] [PATCH v5] drm/i915: Engine discovery query

Quoting Chris Wilson (2018-10-03 13:28:09) > Quoting Tvrtko Ursulin (2018-10-03 10:58:55) > > +static int > > +query_engine_info(struct drm_i915_private *i915, > > + struct drm_i915_query_item *query_item) > > +{ > > + for_each_engine(engine, i915, id) { > > +

Re: [Intel-gfx] [RFC 00/13] 21st century intel_gpu_top

On 03/10/2018 13:36, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-10-03 13:03:53) From: Tvrtko Ursulin A collection of patches which I have been sending before, sometimes together and sometimes separately, which enable intel_gpu_top to report queue depths (also translates as overall GPU

Re: [Intel-gfx] [PATCH 13/18] drm/vc4: Use drm_atomic_helper_shutdown

On Wed, Oct 03, 2018 at 11:18:22AM +0200, Daniel Vetter wrote: > drm_plane_helper_disable is a non-atomic drivers only function, and > will blow up (since no one passes the locking context it needs). > > Atomic drivers which want to quiescent their hw on unload should > use

Re: [Intel-gfx] [PATCH 14/18] drm/zte: Use drm_atomic_helper_shutdown

On Wed, Oct 03, 2018 at 11:18:23AM +0200, Daniel Vetter wrote: > drm_plane_helper_disable is a non-atomic drivers only function, and > will blow up (since no one passes the locking context it needs). > > Atomic drivers which want to quiescent their hw on unload should > use

Re: [Intel-gfx] [PATCH 15/18] drm: Remove transitional helpers

On Wed, Oct 03, 2018 at 11:18:24AM +0200, Daniel Vetter wrote: > With armada the last bigger driver that realistically needed these to > convert from legacy kms to atomic is converted. These helpers have > been broken more often than not the past 2 years, and as this little > patch series shows,

Re: [Intel-gfx] [PATCH 16/18] drm/vmwgfx: Fix vmw_du_cursor_plane_atomic_check

On Wed, Oct 03, 2018 at 11:18:25AM +0200, Daniel Vetter wrote: > From: Thomas Hellstrom > > Use the correct helper and also return early on helper > success rather than on helper failure. > > Also explicitly return 0 in the case of no fb. > > v2: Check for !fb after updating state->visible

Re: [Intel-gfx] [PATCH 04/13] drm/i915: Use crtc_state in ironlake_enable_pch_transcoder

On Wed, Oct 03, 2018 at 03:37:06PM +0200, Maarten Lankhorst wrote: > Signed-off-by: Maarten Lankhorst > --- > drivers/gpu/drm/i915/intel_display.c | 16 > 1 file changed, 8 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c >

Re: [Intel-gfx] [PATCH 07/13] drm/i915: Make ironlake_pch_transcoder_set_timings take crtc_state

On Wed, Oct 03, 2018 at 03:37:09PM +0200, Maarten Lankhorst wrote: > Signed-off-by: Maarten Lankhorst commit msg Otherwise Reviewed-by: Ville Syrjälä > --- > drivers/gpu/drm/i915/intel_display.c | 12 ++-- > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git

Re: [Intel-gfx] [PATCH 13/13] drm/i915: Get rid of intel_crtc->config in crtc_enable/disable functions

On Wed, Oct 03, 2018 at 03:37:15PM +0200, Maarten Lankhorst wrote: > These functions already have a pointer to the correct state, > so use it instead of crtc->config. > > Signed-off-by: Maarten Lankhorst > --- > drivers/gpu/drm/i915/intel_display.c | 60 ++-- > 1 file

[Intel-gfx] [PATCH] drm/i915: Always try to reset the GPU on takeover

When we first introduced the reset to sanitize the GPU on taking over from the BIOS and before returning control to third parties (the BIOS!), we restricted it to only systems utilizing HW contexts as we were uncertain of how stable our reset mechanism truly was. We now have reasonable coverage

Re: [Intel-gfx] [PATCH xf86-video-intel v1] sna: Added AYUV format support for textured and sprite video adapters.

On Wed, Oct 03, 2018 at 12:29:53PM +0100, Chris Wilson wrote: > Quoting Stanislav Lisovskiy (2018-10-02 10:38:53) > > diff --git a/src/sna/sna_render.h b/src/sna/sna_render.h > > index 6669af9d..ef88d1f9 100644 > > --- a/src/sna/sna_render.h > > +++ b/src/sna/sna_render.h > > @@ -139,20 +139,25 @@

Re: [Intel-gfx] [PATCH 01/13] drm/i915: Remove dereferences of crtc->config in set_pipeconf/misc functions.

On Wed, Oct 03, 2018 at 03:37:03PM +0200, Maarten Lankhorst wrote: > One more user of crtc->config down. :) > > Signed-off-by: Maarten Lankhorst > --- > drivers/gpu/drm/i915/intel_display.c | 72 ++-- > 1 file changed, 36 insertions(+), 36 deletions(-) > > diff --git

[Intel-gfx] [PATCH 1/3] drm/i915: introduce REG_BIT() and REG_FIELD_MASK() to define register contents

Introduce REG_BIT(n) to define register bits and REG_FIELD_MASK(h, l) to define register field masks. We define the above as wrappers to BIT() and GENMASK() respectively to force u32 type to go with our register size. Additionally, the specified type will be helpful with follow-up to define and

[Intel-gfx] [PATCH 2/3] drm/i915: deprecate _SHIFT in favor of FIELD_GET() and _MASK

bitfield.h defines FIELD_GET() and FIELD_PREP() macros to access bitfields using the mask alone, with no need for separate shift. Indeed, the shift is redundant. For the most part, FIELD_GET() is shorter than masking followed by shift, and arguably has more clarity. FIELD_PREP() can get more

[Intel-gfx] [PATCH 3/3] drm/i915: introduce REG_FIELD() to define register field values

Slightly verbose, but does away with hand rolled shifts. Ties the field values with the mask defining the field. Unfortunately we don't get the build-time checks of FIELD_PREP() due to it not evaluating to a constant expression. Cc: Chris Wilson Cc: Joonas Lahtinen Cc: Michal Wajdeczko Cc:

[Intel-gfx] [PATCH 0/3] drm/i915: introduce macros to define register contents

Actual serious v1 after the RFC [1]. The major change is to add local wrappers or versions of the BIT(), GENMASK(), and FIELD_PREP() macros for i915_reg.h to ensure u32 type and integer constant expressions. It's a bit of a meh but does provide an opportunity for unified local naming of the

Re: [Intel-gfx] [PATCH 1/4] drm: Add P010, P012, P016 format definitions and fourcc

On Wed, Oct 03, 2018 at 02:31:08PM +0300, Juha-Pekka Heikkila wrote: > Hi Alex, > > For my patches there seems limited interest to get them merged before IGT > support these modes..I'm not holding my breath for this. I'm interested if that counts. I asked the same question on the

Re: [Intel-gfx] [PATCH 4/8] drm/i915/icl: Use helper functions to classify the ports

On Wed, Oct 03, 2018 at 12:51:59PM +0530, Mahesh Kumar wrote: > From: Vandita Kulkarni > > Use intel_port_is_tc and intel_port_is_combophy > functions to replace the individual port checks > from port C to F and port A to B respectively. > > Signed-off-by: Vandita Kulkarni > Signed-off-by:

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: introduce macros to define register contents

== Series Details == Series: drm/i915: introduce macros to define register contents URL : https://patchwork.freedesktop.org/series/50513/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: introduce REG_BIT() and REG_FIELD_MASK() to define register contents Okay!

Re: [Intel-gfx] [PATCH 1/3] drm/i915: introduce REG_BIT() and REG_FIELD_MASK() to define register contents

On Wed, Oct 03, 2018 at 07:05:21PM +0300, Jani Nikula wrote: > Introduce REG_BIT(n) to define register bits and REG_FIELD_MASK(h, l) to > define register field masks. > > We define the above as wrappers to BIT() and GENMASK() respectively to > force u32 type to go with our register size.

[Intel-gfx] [PATCH] drm/i915: Fix the HDMI hot plug disconnection failure (v2)

On some platforms, slowly unplugging (wiggling) the HDMI cable makes the kernel to believe the HDMI display still connected. This is because the HDMI DDC lines are disconnected sometimes later after the hot-plug interrupt triggered. Use the hot plug live states to honor HDMI hot plug status in

Re: [Intel-gfx] [PATCH] [intel-gfx] drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry.

On Wed, Oct 03, 2018 at 07:51:24AM -0700, Rodrigo Vivi wrote: > On Wed, Oct 03, 2018 at 11:27:42AM +0530, Yadav, Jyoti R wrote: > > > > > > On 10/3/2018 10:36 AM, Vivi, Rodrigo wrote: > > > > > > > On Oct 2, 2018, at 9:20 PM, Yadav, Jyoti R > > > > wrote: > > > > > > > > DC5 and DC6 counter

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,1/3] drm/i915/guc: init GuC descriptors after GuC load

Quoting Daniele Ceraolo Spurio (2018-10-03 01:12:57) > > > On 02/10/18 15:39, Patchwork wrote: > > == Series Details == > > > > Series: series starting with [v2,1/3] drm/i915/guc: init GuC descriptors > > after GuC load > > URL : https://patchwork.freedesktop.org/series/50464/ > > State :

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/3] drm/i915: Restore vblank interrupts earlier (rev4)

== Series Details == Series: series starting with [v2,1/3] drm/i915: Restore vblank interrupts earlier (rev4) URL : https://patchwork.freedesktop.org/series/50393/ State : warning == Summary == $ dim checkpatch origin/drm-tip c6a938a3e0a7 drm/i915: Restore vblank interrupts earlier

Re: [Intel-gfx] [PATCH v2 2/3] drm/i915: Use the correct crtc when sanitizing plane mapping

On Wed, Oct 03, 2018 at 05:50:17PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > When we decide that a plane is attached to the wrong pipe we try > to turn off said plane. However we are passing around the crtc we > think that the plane is supposed to be using rather than the crtc > it

Re: [Intel-gfx] [PATCH 1/8] drm/i915/icl: create function to identify combophy port

On Wed, Oct 03, 2018 at 12:51:56PM +0530, Mahesh Kumar wrote: > This patch creates a function/wrapper to check if port is combophy port > instead of explicitly comparing ports. > > Signed-off-by: Mahesh Kumar > Cc: Madhav Chauhan > Cc: Manasi Navare > --- > drivers/gpu/drm/i915/intel_ddi.c

Re: [Intel-gfx] [PATCH v2 3/3] drm/i915: Clean up early plane debugs

On Wed, Oct 03, 2018 at 05:50:52PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > Print the plane hw state readout results in the common format > we already use for pipes and encoders. Also print some clearer > debug messages when we disable planes during the early phases > of state

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: introduce macros to define register contents

== Series Details == Series: drm/i915: introduce macros to define register contents URL : https://patchwork.freedesktop.org/series/50513/ State : warning == Summary == $ dim checkpatch origin/drm-tip fa2aca822675 drm/i915: introduce REG_BIT() and REG_FIELD_MASK() to define register contents

  1   2   3   >