[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/ddi: Add more sanity check to the encoder HW readout

== Series Details == Series: series starting with [1/2] drm/i915/ddi: Add more sanity check to the encoder HW readout URL : https://patchwork.freedesktop.org/series/52187/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5100_full -> Patchwork_10758_full = == Summary -

[Intel-gfx] [PATCH v6] drm/i915/icl: Preempt-to-idle support in execlists.

The patch adds support of preempt-to-idle requesting by setting a proper bit within Execlist Control Register, and receiving preemption result from Context Status Buffer. Preemption in previous gens required a special batch buffer to be executed, so the Command Streamer never preempted to idle

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915/gen9_bc: Work around DMC bug zeroing power well requests

== Series Details == Series: series starting with [1/3] drm/i915/gen9_bc: Work around DMC bug zeroing power well requests URL : https://patchwork.freedesktop.org/series/52302/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5115 -> Patchwork_10795 = == Summary - WARNING ==

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Handle -EDEADLK from ironlake_check_fdi_lanes()

== Series Details == Series: series starting with [1/3] drm/i915: Handle -EDEADLK from ironlake_check_fdi_lanes() URL : https://patchwork.freedesktop.org/series/52191/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5115 -> Patchwork_10796 = == Summary - SUCCESS == No

Re: [Intel-gfx] [PATCH 1/3] drm/i915/gen9_bc: Work around DMC bug zeroing power well requests

On Fri, Nov 09, 2018 at 05:04:40PM +0200, Ville Syrjälä wrote: > On Fri, Nov 09, 2018 at 04:58:20PM +0200, Imre Deak wrote: > > A DMC bug on GEN9 big core machines fails to restore the driver's > > request bits for the PW1 and MISC_IO power wells after a DC5/6 > > entry->exit sequence. As a

Re: [Intel-gfx] [PATCH v2 02/14] drm/i915: Clean up skl_program_scaler()

On Wed, Nov 07, 2018 at 08:29:53PM +0200, Ville Syrjälä wrote: > On Thu, Nov 01, 2018 at 11:13:50AM -0700, Rodrigo Vivi wrote: > > On Thu, Nov 01, 2018 at 05:17:36PM +0200, Ville Syrjala wrote: > > > From: Ville Syrjälä > > > > > > Remove the "sizes are 0 based" stuff that is not even true for

Re: [Intel-gfx] [PATCH v2] drm: Check if primary mst is null

Pushed with small changes to drm-misc-fixes: Renamed patch and added stable Cc Thanks! On Fri, 2018-11-09 at 11:00 +0200, Stanislav Lisovskiy wrote: > Unfortunately drm_dp_get_mst_branch_device which is called from both > drm_dp_mst_handle_down_rep and drm_dp_mst_handle_up_rep seem to rely > on

Re: [Intel-gfx] [PATCH 36/36] drm/i915: Support per-context user requests for GPU frequency control

I think we have some interest in reviving this for the performance query use case. Is that on anybody's todo list? Thanks, - Lionel On 14/03/2018 09:37, Chris Wilson wrote: Often, we find ourselves facing a workload where the user knows in advance what GPU frequency they require for it to

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