[Intel-gfx] [PATCH] drm/i915: Complete the fences as they are cancelled due to wedging
We inspect the requests under the assumption that they will be marked as
completed when they are removed from the queue. Currently however, in the
process of wedging the requests will be removed from the queue before they
are completed, so rearrange the code to complete the fences before the
locks are dropped.
<1>[ 354.473346] BUG: unable to handle kernel NULL pointer dereference at
0250
<6>[ 354.473363] PGD 0 P4D 0
<4>[ 354.473370] Oops: [#1] PREEMPT SMP PTI
<4>[ 354.473380] CPU: 0 PID: 4470 Comm: gem_eio Tainted: G U
4.20.0-rc4-CI-CI_DRM_5216+ #1
<4>[ 354.473393] Hardware name: Intel Corporation NUC7CJYH/NUC7JYB, BIOS
JYGLKCPX.86A.0027.2018.0125.1347 01/25/2018
<4>[ 354.473480] RIP: 0010:__i915_schedule+0x311/0x5e0 [i915]
<4>[ 354.473490] Code: 49 89 44 24 20 4d 89 4c 24 28 4d 89 29 44 39 b3 a0 04
00 00 7d 3a 41 8b 44 24 78 85 c0 74 13 48 8b 93 78 04 00 00 48 83 e2 fc <39> 82
50 02 00 00 79 1e 44 89 b3 a0 04 00 00 48 8d bb d0 03 00 00
<4>[ 354.473515] RSP: 0018:c91bba90 EFLAGS: 00010046
<4>[ 354.473524] RAX: 0003 RBX: 8882624c8008 RCX:
f34a7378
<4>[ 354.473535] RDX: RSI: RDI:
8882624c8048
<4>[ 354.473545] RBP: c91bbab0 R08: 5963f1f1 R09:
<4>[ 354.473556] R10: c91bba10 R11: 8882624c8060 R12:
88824fdd7b98
<4>[ 354.473567] R13: 88824fdd7bb8 R14: 0001 R15:
88824fdd7750
<4>[ 354.473578] FS: 7f44b4b5b980() GS:888277e0()
knlGS:
<4>[ 354.473590] CS: 0010 DS: ES: CR0: 80050033
<4>[ 354.473599] CR2: 0250 CR3: 00026976e000 CR4:
00340ef0
<4>[ 354.473611] Call Trace:
<4>[ 354.473622] ? lock_acquire+0xa6/0x1c0
<4>[ 354.473677] ? i915_schedule_bump_priority+0x57/0xd0 [i915]
<4>[ 354.473736] i915_schedule_bump_priority+0x72/0xd0 [i915]
<4>[ 354.473792] i915_request_wait+0x4db/0x840 [i915]
<4>[ 354.473804] ? get_pwq.isra.4+0x2c/0x50
<4>[ 354.473813] ? ___preempt_schedule+0x16/0x18
<4>[ 354.473824] ? wake_up_q+0x70/0x70
<4>[ 354.473831] ? wake_up_q+0x70/0x70
<4>[ 354.473882] ? gen6_rps_boost+0x118/0x120 [i915]
<4>[ 354.473936] i915_gem_object_wait_fence+0x8a/0x110 [i915]
<4>[ 354.473991] i915_gem_object_wait+0x113/0x500 [i915]
<4>[ 354.474047] i915_gem_wait_ioctl+0x11c/0x2f0 [i915]
<4>[ 354.474101] ? i915_gem_unset_wedged+0x210/0x210 [i915]
<4>[ 354.474113] drm_ioctl_kernel+0x81/0xf0
<4>[ 354.474123] drm_ioctl+0x2de/0x390
<4>[ 354.474175] ? i915_gem_unset_wedged+0x210/0x210 [i915]
<4>[ 354.474187] ? finish_task_switch+0x95/0x260
<4>[ 354.474197] ? lock_acquire+0xa6/0x1c0
<4>[ 354.474207] do_vfs_ioctl+0xa0/0x6e0
<4>[ 354.474217] ? __fget+0xfc/0x1e0
<4>[ 354.474225] ksys_ioctl+0x35/0x60
<4>[ 354.474233] __x64_sys_ioctl+0x11/0x20
<4>[ 354.474241] do_syscall_64+0x55/0x190
<4>[ 354.474251] entry_SYSCALL_64_after_hwframe+0x49/0xbe
<4>[ 354.474260] RIP: 0033:0x7f44b3de65d7
<4>[ 354.474267] Code: b3 66 90 48 8b 05 b1 48 2d 00 64 c7 00 26 00 00 00 48
c7 c0 ff ff ff ff c3 66 2e 0f 1f 84 00 00 00 00 00 b8 10 00 00 00 0f 05 <48> 3d
01 f0 ff ff 73 01 c3 48 8b 0d 81 48 2d 00 f7 d8 64 89 01 48
<4>[ 354.474293] RSP: 002b:7fff974948e8 EFLAGS: 0246 ORIG_RAX:
0010
<4>[ 354.474305] RAX: ffda RBX: RCX:
7f44b3de65d7
<4>[ 354.474316] RDX: 7fff97494940 RSI: c010646c RDI:
0007
<4>[ 354.474327] RBP: 7fff97494940 R08: R09:
7f44b40bbc40
<4>[ 354.474337] R10: R11: 0246 R12:
c010646c
<4>[ 354.474348] R13: 0007 R14: R15:
v2: Avoid floating requests.
v3: Can't call dma_fence_signal() under the timeline lock!
v4: Can't call dma_fence_signal() from inside another fence either.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem.c | 54 +
drivers/gpu/drm/i915/intel_lrc.c| 13 --
drivers/gpu/drm/i915/intel_ringbuffer.c | 13 +-
3 files changed, 31 insertions(+), 49 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index c55b1f75c980..834240a9b262 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3308,16 +3308,6 @@ void i915_gem_reset_finish(struct drm_i915_private
*dev_priv)
}
static void nop_submit_request(struct i915_request *request)
-{
- GEM_TRACE("%s fence %llx:%d -> -EIO\n",
- request->engine->name,
- request->fence.context, request->fence.seqno);
- dma_fence_set_error(>fence, -EIO);
-
- i915_request_submit(request);
-}
-
-static void nop_complete_submit_request(struct i915_request *request)
{
unsigned long flags;
@@ -3354,57 +3344,33 @@ void i915_gem_set_wedged(struct drm_i915_private *i915)
* rolling the global
[Intel-gfx] [PATCH 3/7] drm/i915: Allocate a common scratch page
Currently we allocate a scratch page for each engine, but since we only
ever write into it for post-sync operations, it is not exposed to
userspace nor do we care for coherency. As we then do not care about its
contents, we can use one page for all, reducing our allocations and
avoid complications by not assuming per-engine isolation.
For later use, it simplifies engine initialisation (by removing the
allocation that required struct_mutex!) and means that we can always rely
on there being a scratch page.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.h | 7
drivers/gpu/drm/i915/i915_gem.c | 50 -
drivers/gpu/drm/i915/i915_gpu_error.c | 2 +-
drivers/gpu/drm/i915/intel_engine_cs.c | 42 -
drivers/gpu/drm/i915/intel_lrc.c| 17 +++--
drivers/gpu/drm/i915/intel_ringbuffer.c | 33 +---
drivers/gpu/drm/i915/intel_ringbuffer.h | 5 ---
7 files changed, 71 insertions(+), 85 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d45475287130..0ec65cc48b5a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1996,6 +1996,8 @@ struct drm_i915_private {
struct delayed_work idle_work;
ktime_t last_init_time;
+
+ struct i915_vma *scratch;
} gt;
/* perform PHY state sanity checks? */
@@ -3724,4 +3726,9 @@ static inline int intel_hws_csb_write_index(struct
drm_i915_private *i915)
return I915_HWS_CSB_WRITE_INDEX;
}
+static inline u32 i915_scratch_offset(const struct drm_i915_private *i915)
+{
+ return i915_ggtt_offset(i915->gt.scratch);
+}
+
#endif
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 834240a9b262..cca4285e3329 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -5495,6 +5495,44 @@ static int __intel_engines_record_defaults(struct
drm_i915_private *i915)
goto out_ctx;
}
+static int
+i915_gem_init_scratch(struct drm_i915_private *i915, unsigned int size)
+{
+ struct drm_i915_gem_object *obj;
+ struct i915_vma *vma;
+ int ret;
+
+ obj = i915_gem_object_create_stolen(i915, size);
+ if (!obj)
+ obj = i915_gem_object_create_internal(i915, size);
+ if (IS_ERR(obj)) {
+ DRM_ERROR("Failed to allocate scratch page\n");
+ return PTR_ERR(obj);
+ }
+
+ vma = i915_vma_instance(obj, >ggtt.vm, NULL);
+ if (IS_ERR(vma)) {
+ ret = PTR_ERR(vma);
+ goto err_unref;
+ }
+
+ ret = i915_vma_pin(vma, 0, 0, PIN_GLOBAL | PIN_HIGH);
+ if (ret)
+ goto err_unref;
+
+ i915->gt.scratch = vma;
+ return 0;
+
+err_unref:
+ i915_gem_object_put(obj);
+ return ret;
+}
+
+static void i915_gem_fini_scratch(struct drm_i915_private *i915)
+{
+ i915_vma_unpin_and_release(>gt.scratch, 0);
+}
+
int i915_gem_init(struct drm_i915_private *dev_priv)
{
int ret;
@@ -5541,12 +5579,19 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
goto err_unlock;
}
- ret = i915_gem_contexts_init(dev_priv);
+ ret = i915_gem_init_scratch(dev_priv,
+ IS_GEN2(dev_priv) ? SZ_256K : PAGE_SIZE);
if (ret) {
GEM_BUG_ON(ret == -EIO);
goto err_ggtt;
}
+ ret = i915_gem_contexts_init(dev_priv);
+ if (ret) {
+ GEM_BUG_ON(ret == -EIO);
+ goto err_scratch;
+ }
+
ret = intel_engines_init(dev_priv);
if (ret) {
GEM_BUG_ON(ret == -EIO);
@@ -5619,6 +5664,8 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
err_context:
if (ret != -EIO)
i915_gem_contexts_fini(dev_priv);
+err_scratch:
+ i915_gem_fini_scratch(dev_priv);
err_ggtt:
err_unlock:
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
@@ -5670,6 +5717,7 @@ void i915_gem_fini(struct drm_i915_private *dev_priv)
intel_uc_fini(dev_priv);
i915_gem_cleanup_engines(dev_priv);
i915_gem_contexts_fini(dev_priv);
+ i915_gem_fini_scratch(dev_priv);
mutex_unlock(_priv->drm.struct_mutex);
intel_cleanup_gt_powersave(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c
b/drivers/gpu/drm/i915/i915_gpu_error.c
index a6885a59568b..07465123c166 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -1571,7 +1571,7 @@ static void gem_record_rings(struct i915_gpu_state *error)
if (HAS_BROKEN_CS_TLB(i915))
ee->wa_batchbuffer =
i915_error_object_create(i915,
-
engine->scratch);
+
[Intel-gfx] [PATCH 1/7] drm/i915: Complete the fences as they are cancelled due to wedging
We inspect the requests under the assumption that they will be marked as
completed when they are removed from the queue. Currently however, in the
process of wedging the requests will be removed from the queue before they
are completed, so rearrange the code to complete the fences before the
locks are dropped.
<1>[ 354.473346] BUG: unable to handle kernel NULL pointer dereference at
0250
<6>[ 354.473363] PGD 0 P4D 0
<4>[ 354.473370] Oops: [#1] PREEMPT SMP PTI
<4>[ 354.473380] CPU: 0 PID: 4470 Comm: gem_eio Tainted: G U
4.20.0-rc4-CI-CI_DRM_5216+ #1
<4>[ 354.473393] Hardware name: Intel Corporation NUC7CJYH/NUC7JYB, BIOS
JYGLKCPX.86A.0027.2018.0125.1347 01/25/2018
<4>[ 354.473480] RIP: 0010:__i915_schedule+0x311/0x5e0 [i915]
<4>[ 354.473490] Code: 49 89 44 24 20 4d 89 4c 24 28 4d 89 29 44 39 b3 a0 04
00 00 7d 3a 41 8b 44 24 78 85 c0 74 13 48 8b 93 78 04 00 00 48 83 e2 fc <39> 82
50 02 00 00 79 1e 44 89 b3 a0 04 00 00 48 8d bb d0 03 00 00
<4>[ 354.473515] RSP: 0018:c91bba90 EFLAGS: 00010046
<4>[ 354.473524] RAX: 0003 RBX: 8882624c8008 RCX:
f34a7378
<4>[ 354.473535] RDX: RSI: RDI:
8882624c8048
<4>[ 354.473545] RBP: c91bbab0 R08: 5963f1f1 R09:
<4>[ 354.473556] R10: c91bba10 R11: 8882624c8060 R12:
88824fdd7b98
<4>[ 354.473567] R13: 88824fdd7bb8 R14: 0001 R15:
88824fdd7750
<4>[ 354.473578] FS: 7f44b4b5b980() GS:888277e0()
knlGS:
<4>[ 354.473590] CS: 0010 DS: ES: CR0: 80050033
<4>[ 354.473599] CR2: 0250 CR3: 00026976e000 CR4:
00340ef0
<4>[ 354.473611] Call Trace:
<4>[ 354.473622] ? lock_acquire+0xa6/0x1c0
<4>[ 354.473677] ? i915_schedule_bump_priority+0x57/0xd0 [i915]
<4>[ 354.473736] i915_schedule_bump_priority+0x72/0xd0 [i915]
<4>[ 354.473792] i915_request_wait+0x4db/0x840 [i915]
<4>[ 354.473804] ? get_pwq.isra.4+0x2c/0x50
<4>[ 354.473813] ? ___preempt_schedule+0x16/0x18
<4>[ 354.473824] ? wake_up_q+0x70/0x70
<4>[ 354.473831] ? wake_up_q+0x70/0x70
<4>[ 354.473882] ? gen6_rps_boost+0x118/0x120 [i915]
<4>[ 354.473936] i915_gem_object_wait_fence+0x8a/0x110 [i915]
<4>[ 354.473991] i915_gem_object_wait+0x113/0x500 [i915]
<4>[ 354.474047] i915_gem_wait_ioctl+0x11c/0x2f0 [i915]
<4>[ 354.474101] ? i915_gem_unset_wedged+0x210/0x210 [i915]
<4>[ 354.474113] drm_ioctl_kernel+0x81/0xf0
<4>[ 354.474123] drm_ioctl+0x2de/0x390
<4>[ 354.474175] ? i915_gem_unset_wedged+0x210/0x210 [i915]
<4>[ 354.474187] ? finish_task_switch+0x95/0x260
<4>[ 354.474197] ? lock_acquire+0xa6/0x1c0
<4>[ 354.474207] do_vfs_ioctl+0xa0/0x6e0
<4>[ 354.474217] ? __fget+0xfc/0x1e0
<4>[ 354.474225] ksys_ioctl+0x35/0x60
<4>[ 354.474233] __x64_sys_ioctl+0x11/0x20
<4>[ 354.474241] do_syscall_64+0x55/0x190
<4>[ 354.474251] entry_SYSCALL_64_after_hwframe+0x49/0xbe
<4>[ 354.474260] RIP: 0033:0x7f44b3de65d7
<4>[ 354.474267] Code: b3 66 90 48 8b 05 b1 48 2d 00 64 c7 00 26 00 00 00 48
c7 c0 ff ff ff ff c3 66 2e 0f 1f 84 00 00 00 00 00 b8 10 00 00 00 0f 05 <48> 3d
01 f0 ff ff 73 01 c3 48 8b 0d 81 48 2d 00 f7 d8 64 89 01 48
<4>[ 354.474293] RSP: 002b:7fff974948e8 EFLAGS: 0246 ORIG_RAX:
0010
<4>[ 354.474305] RAX: ffda RBX: RCX:
7f44b3de65d7
<4>[ 354.474316] RDX: 7fff97494940 RSI: c010646c RDI:
0007
<4>[ 354.474327] RBP: 7fff97494940 R08: R09:
7f44b40bbc40
<4>[ 354.474337] R10: R11: 0246 R12:
c010646c
<4>[ 354.474348] R13: 0007 R14: R15:
v2: Avoid floating requests.
v3: Can't call dma_fence_signal() under the timeline lock!
v4: Can't call dma_fence_signal() from inside another fence either.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem.c | 54 +
drivers/gpu/drm/i915/intel_lrc.c| 13 --
drivers/gpu/drm/i915/intel_ringbuffer.c | 13 +-
3 files changed, 31 insertions(+), 49 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index c55b1f75c980..834240a9b262 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3308,16 +3308,6 @@ void i915_gem_reset_finish(struct drm_i915_private
*dev_priv)
}
static void nop_submit_request(struct i915_request *request)
-{
- GEM_TRACE("%s fence %llx:%d -> -EIO\n",
- request->engine->name,
- request->fence.context, request->fence.seqno);
- dma_fence_set_error(>fence, -EIO);
-
- i915_request_submit(request);
-}
-
-static void nop_complete_submit_request(struct i915_request *request)
{
unsigned long flags;
@@ -3354,57 +3344,33 @@ void i915_gem_set_wedged(struct drm_i915_private *i915)
* rolling the global
[Intel-gfx] [PATCH 7/7] drm/i915/execlists: Apply a full mb before execution for Braswell
Braswell is really picky about having our writes posted to memory before
we execute or else the GPU may see stale values. A wmb() is insufficient
as it only ensures the writes are visible to other cores, we need a full
mb() to ensure the writes are in memory and visible to the GPU.
The most frequent failure in flushing before execution is that we see
stale PTE values and execute the wrong pages.
References: 987abd5c62f9 ("drm/i915/execlists: Force write serialisation into
context image vs execution")
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Cc: Tvrtko Ursulin
Cc: Joonas Lahtinen
Cc: sta...@vger.kernel.org
---
drivers/gpu/drm/i915/intel_lrc.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 0a690c557113..cad1228f6503 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -379,8 +379,12 @@ static u64 execlists_update_context(struct i915_request
*rq)
* may not be visible to the HW prior to the completion of the UC
* register write and that we may begin execution from the context
* before its image is complete leading to invalid PD chasing.
+*
+* Furthermore, Braswell wants a full mb to be sure that the writes
+* are coherent in memory (visible to the GPU) prior to execution,
+* and not just visible to other CPUs (as is the result of wmb).
*/
- wmb();
+ mb();
return ce->lrc_desc;
}
--
2.20.0.rc1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 4/7] drm/i915/selftests: Terminate hangcheck sanitycheck forcibly
If all else fails and we are stuck eternally waiting for the undying
request, abandon all hope.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
index defe671130ab..a48fbe2557ea 100644
--- a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
+++ b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
@@ -308,6 +308,7 @@ static int igt_hang_sanitycheck(void *arg)
goto unlock;
for_each_engine(engine, i915, id) {
+ struct igt_wedge_me w;
long timeout;
if (!intel_engine_can_store_dword(engine))
@@ -328,9 +329,14 @@ static int igt_hang_sanitycheck(void *arg)
i915_request_add(rq);
- timeout = i915_request_wait(rq,
- I915_WAIT_LOCKED,
- MAX_SCHEDULE_TIMEOUT);
+ timeout = 0;
+ igt_wedge_on_timeout(, i915, HZ / 10 /* 100ms timeout*/)
+ timeout = i915_request_wait(rq,
+ I915_WAIT_LOCKED,
+ MAX_SCHEDULE_TIMEOUT);
+ if (i915_terminally_wedged(>gpu_error))
+ timeout = -EIO;
+
i915_request_put(rq);
if (timeout < 0) {
--
2.20.0.rc1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/7] drm/i915/ringbuffer: Clear semaphore sync registers on ring init
Ensure that the sync registers are cleared every time we restart the
ring to avoid stale values from creeping in from random neutrinos.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 992889f9e0ff..81b10d85b738 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -529,6 +529,13 @@ static int init_ring_common(struct intel_engine_cs *engine)
intel_engine_reset_breadcrumbs(engine);
+ if (HAS_LEGACY_SEMAPHORES(engine->i915)) {
+ I915_WRITE(RING_SYNC_0(engine->mmio_base), 0);
+ I915_WRITE(RING_SYNC_1(engine->mmio_base), 0);
+ if (HAS_VEBOX(dev_priv))
+ I915_WRITE(RING_SYNC_2(engine->mmio_base), 0);
+ }
+
/* Enforce ordering by reading HEAD register back */
I915_READ_HEAD(engine);
--
2.20.0.rc1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 5/7] drm/i915/selftests: Reorder request allocation vs vma pinning
Impose a restraint that we have all vma pinned for a request prior to
its allocation. This is to simplify request construction, and should
facilitate unravelling the lock interdependencies later.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/selftests/huge_pages.c | 31 +++--
drivers/gpu/drm/i915/selftests/igt_spinner.c | 86 ++--
.../gpu/drm/i915/selftests/intel_hangcheck.c | 123 +-
3 files changed, 119 insertions(+), 121 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c
b/drivers/gpu/drm/i915/selftests/huge_pages.c
index 26c065c8d2c0..a0c7cbc212ba 100644
--- a/drivers/gpu/drm/i915/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/selftests/huge_pages.c
@@ -972,7 +972,6 @@ static int gpu_write(struct i915_vma *vma,
{
struct i915_request *rq;
struct i915_vma *batch;
- int flags = 0;
int err;
GEM_BUG_ON(!intel_engine_can_store_dword(engine));
@@ -981,14 +980,14 @@ static int gpu_write(struct i915_vma *vma,
if (err)
return err;
- rq = i915_request_alloc(engine, ctx);
- if (IS_ERR(rq))
- return PTR_ERR(rq);
-
batch = gpu_write_dw(vma, dword * sizeof(u32), value);
- if (IS_ERR(batch)) {
- err = PTR_ERR(batch);
- goto err_request;
+ if (IS_ERR(batch))
+ return PTR_ERR(batch);
+
+ rq = i915_request_alloc(engine, ctx);
+ if (IS_ERR(rq)) {
+ err = PTR_ERR(rq);
+ goto err_batch;
}
err = i915_vma_move_to_active(batch, rq, 0);
@@ -996,21 +995,21 @@ static int gpu_write(struct i915_vma *vma,
goto err_request;
i915_gem_object_set_active_reference(batch->obj);
- i915_vma_unpin(batch);
- i915_vma_close(batch);
- err = engine->emit_bb_start(rq,
- batch->node.start, batch->node.size,
- flags);
+ err = i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE);
if (err)
goto err_request;
- err = i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE);
+ err = engine->emit_bb_start(rq,
+ batch->node.start, batch->node.size,
+ 0);
+err_request:
if (err)
i915_request_skip(rq, err);
-
-err_request:
i915_request_add(rq);
+err_batch:
+ i915_vma_unpin(batch);
+ i915_vma_close(batch);
return err;
}
diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c
b/drivers/gpu/drm/i915/selftests/igt_spinner.c
index 8cd34f6e6859..0e70df0230b8 100644
--- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
+++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
@@ -68,48 +68,65 @@ static u64 hws_address(const struct i915_vma *hws,
return hws->node.start + seqno_offset(rq->fence.context);
}
-static int emit_recurse_batch(struct igt_spinner *spin,
- struct i915_request *rq,
- u32 arbitration_command)
+static int move_to_active(struct i915_vma *vma,
+ struct i915_request *rq,
+ unsigned int flags)
{
- struct i915_address_space *vm = >gem_context->ppgtt->vm;
+ int err;
+
+ err = i915_vma_move_to_active(vma, rq, flags);
+ if (err)
+ return err;
+
+ if (!i915_gem_object_has_active_reference(vma->obj)) {
+ i915_gem_object_get(vma->obj);
+ i915_gem_object_set_active_reference(vma->obj);
+ }
+
+ return 0;
+}
+
+struct i915_request *
+igt_spinner_create_request(struct igt_spinner *spin,
+ struct i915_gem_context *ctx,
+ struct intel_engine_cs *engine,
+ u32 arbitration_command)
+{
+ struct i915_address_space *vm = >ppgtt->vm;
+ struct i915_request *rq = NULL;
struct i915_vma *hws, *vma;
u32 *batch;
int err;
vma = i915_vma_instance(spin->obj, vm, NULL);
if (IS_ERR(vma))
- return PTR_ERR(vma);
+ return ERR_CAST(vma);
hws = i915_vma_instance(spin->hws, vm, NULL);
if (IS_ERR(hws))
- return PTR_ERR(hws);
+ return ERR_CAST(hws);
err = i915_vma_pin(vma, 0, 0, PIN_USER);
if (err)
- return err;
+ return ERR_PTR(err);
err = i915_vma_pin(hws, 0, 0, PIN_USER);
if (err)
goto unpin_vma;
- err = i915_vma_move_to_active(vma, rq, 0);
- if (err)
+ rq = i915_request_alloc(engine, ctx);
+ if (IS_ERR(rq)) {
+ err = PTR_ERR(rq);
goto unpin_hws;
-
- if (!i915_gem_object_has_active_reference(vma->obj)) {
- i915_gem_object_get(vma->obj);
- i915_gem_object_set_active_reference(vma->obj);
[Intel-gfx] [PATCH 6/7] drm/i915: Pipeline PDP updates for Braswell
Currently we face a severe problem on Braswell that manifests as invalid
ppGTT accesses. The code tries to maintain the PDP (page directory
pointers) inside the context in two ways, direct write into the context
and a pipelined LRI update. The direct write into the context is
fundamentally racy as it is unserialised with any access (read or write)
the GPU is doing. By asserting that Braswell is not used with vGPU
(currently an unsupported platform) we can eliminate the dangerous
direct write into the context image and solely use the pipelined update.
However, the LRI of the PDP fouls up the GPU, causing it to freeze and
take out the machine with "forcewake ack timeouts". This seems possible
to workaround by preventing the GPU from sleeping (via means of
disabling the power-state management interface, i.e. forcing each ring
to remain awake) around the update.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108656
References: https://bugs.freedesktop.org/show_bug.cgi?id=108714
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 2 -
drivers/gpu/drm/i915/i915_request.c | 5 -
drivers/gpu/drm/i915/intel_lrc.c| 137 +++-
drivers/gpu/drm/i915/intel_ringbuffer.c | 5 +-
4 files changed, 68 insertions(+), 81 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index add1fe7aeb93..62bde517d383 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1423,8 +1423,6 @@ static int gen8_ppgtt_alloc_pdp(struct i915_address_space
*vm,
gen8_initialize_pd(vm, pd);
gen8_ppgtt_set_pdpe(vm, pdp, pd, pdpe);
GEM_BUG_ON(pdp->used_pdpes > i915_pdpes_per_pdp(vm));
-
- mark_tlbs_dirty(i915_vm_to_ppgtt(vm));
}
ret = gen8_ppgtt_alloc_pd(vm, pd, start, length);
diff --git a/drivers/gpu/drm/i915/i915_request.c
b/drivers/gpu/drm/i915/i915_request.c
index ca95ab2f4cfa..8ab8e8e6a086 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -719,11 +719,6 @@ i915_request_alloc(struct intel_engine_cs *engine, struct
i915_gem_context *ctx)
*/
rq->head = rq->ring->emit;
- /* Unconditionally invalidate GPU caches and TLBs. */
- ret = engine->emit_flush(rq, EMIT_INVALIDATE);
- if (ret)
- goto err_unwind;
-
ret = engine->request_alloc(rq);
if (ret)
goto err_unwind;
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index de070dca4033..0a690c557113 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -363,31 +363,12 @@ execlists_context_schedule_out(struct i915_request *rq,
unsigned long status)
trace_i915_request_out(rq);
}
-static void
-execlists_update_context_pdps(struct i915_hw_ppgtt *ppgtt, u32 *reg_state)
-{
- ASSIGN_CTX_PDP(ppgtt, reg_state, 3);
- ASSIGN_CTX_PDP(ppgtt, reg_state, 2);
- ASSIGN_CTX_PDP(ppgtt, reg_state, 1);
- ASSIGN_CTX_PDP(ppgtt, reg_state, 0);
-}
-
static u64 execlists_update_context(struct i915_request *rq)
{
- struct i915_hw_ppgtt *ppgtt = rq->gem_context->ppgtt;
struct intel_context *ce = rq->hw_context;
- u32 *reg_state = ce->lrc_reg_state;
-
- reg_state[CTX_RING_TAIL+1] = intel_ring_set_tail(rq->ring, rq->tail);
- /*
-* True 32b PPGTT with dynamic page allocation: update PDP
-* registers and point the unallocated PDPs to scratch page.
-* PML4 is allocated during ppgtt init, so this is not needed
-* in 48-bit mode.
-*/
- if (!i915_vm_is_48bit(>vm))
- execlists_update_context_pdps(ppgtt, reg_state);
+ ce->lrc_reg_state[CTX_RING_TAIL + 1] =
+ intel_ring_set_tail(rq->ring, rq->tail);
/*
* Make sure the context image is complete before we submit it to HW.
@@ -1240,29 +1221,80 @@ execlists_context_pin(struct intel_engine_cs *engine,
return __execlists_context_pin(engine, ctx, ce);
}
+static int emit_pdps(struct i915_request *rq)
+{
+ const struct intel_engine_cs * const engine = rq->engine;
+ struct i915_hw_ppgtt * const ppgtt = rq->gem_context->ppgtt;
+ int err, i;
+ u32 *cs;
+
+ err = engine->emit_flush(rq, EMIT_INVALIDATE);
+ if (err)
+ return err;
+
+ cs = intel_ring_begin(rq, 4 * GEN8_3LVL_PDPES + 2);
+ if (IS_ERR(cs))
+ return PTR_ERR(cs);
+
+ /*
+* Force the GPU (not just the local engine/powerwell!) to remain awake,
+* or else we may kill the machine with "timed out waiting for
+* forcewake ack request".
+*/
+
+ *cs++ = MI_LOAD_REGISTER_IMM(2 * GEN8_3LVL_PDPES);
+ for (i = GEN8_3LVL_PDPES; i--; ) {
+ const
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/i915: Complete the fences as they are cancelled due to wedging
== Series Details ==
Series: series starting with [1/7] drm/i915: Complete the fences as they are
cancelled due to wedging
URL : https://patchwork.freedesktop.org/series/53348/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a7232ddbd965 drm/i915: Complete the fences as they are cancelled due to wedging
-:13: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description
(prefer a maximum 75 chars per line)
#13:
<1>[ 354.473346] BUG: unable to handle kernel NULL pointer dereference at
0250
total: 0 errors, 1 warnings, 0 checks, 135 lines checked
1ab5d3906e81 drm/i915/ringbuffer: Clear semaphore sync registers on ring init
14e0cc931853 drm/i915: Allocate a common scratch page
bfd217d7fef0 drm/i915/selftests: Terminate hangcheck sanitycheck forcibly
e050a2a0f245 drm/i915/selftests: Reorder request allocation vs vma pinning
1bd7d7a676a7 drm/i915: Pipeline PDP updates for Braswell
10228149a5d8 drm/i915/execlists: Apply a full mb before execution for Braswell
-:15: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description
(prefer a maximum 75 chars per line)
#15:
References: 987abd5c62f9 ("drm/i915/execlists: Force write serialisation into
context image vs execution")
-:15: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 987abd5c62f9
("drm/i915/execlists: Force write serialisation into context image vs
execution")'
#15:
References: 987abd5c62f9 ("drm/i915/execlists: Force write serialisation into
context image vs execution")
-:36: WARNING:MEMORY_BARRIER: memory barrier without comment
#36: FILE: drivers/gpu/drm/i915/intel_lrc.c:387:
+ mb();
total: 1 errors, 2 warnings, 0 checks, 13 lines checked
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/7] drm/i915: Complete the fences as they are cancelled due to wedging
== Series Details == Series: series starting with [1/7] drm/i915: Complete the fences as they are cancelled due to wedging URL : https://patchwork.freedesktop.org/series/53348/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Complete the fences as they are cancelled due to wedging Okay! Commit: drm/i915/ringbuffer: Clear semaphore sync registers on ring init Okay! Commit: drm/i915: Allocate a common scratch page -drivers/gpu/drm/i915/selftests/../i915_drv.h:3571:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3573:16: warning: expression using sizeof(void) Commit: drm/i915/selftests: Terminate hangcheck sanitycheck forcibly Okay! Commit: drm/i915/selftests: Reorder request allocation vs vma pinning Okay! Commit: drm/i915: Pipeline PDP updates for Braswell Okay! Commit: drm/i915/execlists: Apply a full mb before execution for Braswell Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with drm/i915: Complete the fences as they are cancelled due to wedging (rev2)
== Series Details == Series: series starting with drm/i915: Complete the fences as they are cancelled due to wedging (rev2) URL : https://patchwork.freedesktop.org/series/53308/ State : failure == Summary == Applying: drm/i915: Complete the fences as they are cancelled due to wedging Applying: drm/i915/ringbuffer: Clear semaphore sync registers on ring init Applying: drm/i915: Allocate a common scratch page Applying: drm/i915/selftests: Terminate hangcheck sanitycheck forcibly Applying: drm/i915/selftests: Reorder request allocation vs vma pinning Using index info to reconstruct a base tree... M drivers/gpu/drm/i915/selftests/intel_lrc.c Falling back to patching base and 3-way merge... Auto-merging drivers/gpu/drm/i915/selftests/intel_lrc.c CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/selftests/intel_lrc.c error: Failed to merge in the changes. Patch failed at 0005 drm/i915/selftests: Reorder request allocation vs vma pinning Use 'git am --show-current-patch' to see the failed patch When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/4] drm/i915: Make intel_fuzzy_clock_check available outside of intel_display.c
== Series Details ==
Series: series starting with [1/4] drm/i915: Make intel_fuzzy_clock_check
available outside of intel_display.c
URL : https://patchwork.freedesktop.org/series/53350/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5237_full -> Patchwork_10991_full
Summary
---
**SUCCESS**
No regressions found.
Known issues
Here are the changes found in Patchwork_10991_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_eio@reset-stress:
- shard-glk: PASS -> FAIL [fdo#107799]
* igt@i915_suspend@shrink:
- shard-hsw: NOTRUN -> DMESG-WARN [fdo#108784]
- {shard-iclb}: NOTRUN -> DMESG-WARN [fdo#108784]
* igt@kms_busy@extended-modeset-hang-newfb-render-a:
- shard-snb: PASS -> DMESG-WARN [fdo#107956]
* igt@kms_cursor_crc@cursor-256x256-dpms:
- shard-glk: PASS -> FAIL [fdo#103232] +4
* igt@kms_cursor_crc@cursor-64x21-sliding:
- {shard-iclb}: NOTRUN -> FAIL [fdo#103232] +2
- shard-apl: PASS -> FAIL [fdo#103232] +1
* igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
- shard-glk: PASS -> FAIL [fdo#104873]
* igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-xtiled:
- {shard-iclb}: PASS -> WARN [fdo#108336]
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-glk: PASS -> FAIL [fdo#105363]
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff:
- shard-apl: PASS -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@fbc-1p-rte:
- shard-glk: PASS -> FAIL [fdo#103167] / [fdo#105682]
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move:
- shard-glk: PASS -> FAIL [fdo#103167] +2
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-gtt:
- {shard-iclb}: PASS -> DMESG-FAIL [fdo#107724] +8
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt:
- {shard-iclb}: PASS -> FAIL [fdo#103167] +2
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
- {shard-iclb}: PASS -> DMESG-FAIL [fdo#103166] / [fdo#107724]
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
- {shard-iclb}: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +5
* igt@kms_plane_multiple@atomic-pipe-c-tiling-x:
- shard-glk: PASS -> FAIL [fdo#103166]
- shard-apl: PASS -> FAIL [fdo#103166]
* igt@kms_plane_multiple@atomic-pipe-c-tiling-y:
- {shard-iclb}: NOTRUN -> FAIL [fdo#103166]
* igt@kms_setmode@basic:
- shard-apl: PASS -> FAIL [fdo#99912]
* igt@perf_pmu@event-wait-rcs0:
- {shard-iclb}: PASS -> DMESG-WARN [fdo#107724] +18
* igt@pm_rpm@legacy-planes-dpms:
- {shard-iclb}: PASS -> DMESG-WARN [fdo#108654]
Possible fixes
* igt@gem_ctx_isolation@rcs0-s3:
- shard-snb: DMESG-WARN [fdo#102365] -> PASS
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b:
- shard-snb: DMESG-WARN [fdo#107956] -> PASS
* igt@kms_busy@extended-pageflip-hang-newfb-render-b:
- shard-glk: DMESG-WARN [fdo#107956] -> PASS +1
* igt@kms_cursor_crc@cursor-256x256-dpms:
- shard-apl: FAIL [fdo#103232] -> PASS +1
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
- shard-apl: FAIL [fdo#103167] -> PASS
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu:
- shard-glk: FAIL [fdo#103167] -> PASS +3
* igt@kms_plane@plane-position-covered-pipe-c-planes:
- {shard-iclb}: FAIL [fdo#103166] -> PASS
* igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb:
- shard-glk: FAIL [fdo#108145] -> PASS
* igt@kms_plane_multiple@atomic-pipe-a-tiling-x:
- shard-apl: FAIL [fdo#103166] -> PASS +4
* igt@kms_plane_multiple@atomic-pipe-b-tiling-x:
- shard-glk: FAIL [fdo#103166] -> PASS +2
* igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format:
- {shard-iclb}: DMESG-WARN [fdo#107724] -> PASS
* igt@kms_vblank@pipe-b-ts-continuation-suspend:
- {shard-iclb}: INCOMPLETE [fdo#107713] -> PASS
* igt@pm_rpm@legacy-planes:
- {shard-iclb}: DMESG-WARN [fdo#108654] -> PASS
Warnings
* igt@i915_suspend@shrink:
- shard-snb: INCOMPLETE [fdo#105411] / [fdo#106886] -> DMESG-WARN
[fdo#108784]
* igt@kms_cursor_crc@cursor-128x128-sliding:
- {shard-iclb}: FAIL [fdo#103232] -> DMESG-WARN [fdo#107724] /
[fdo#108336]
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102365]: https://bugs.freedesktop.org/show_bug.cgi?id=102365
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103167]:
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/7] drm/i915: Complete the fences as they are cancelled due to wedging
== Series Details ==
Series: series starting with [1/7] drm/i915: Complete the fences as they are
cancelled due to wedging
URL : https://patchwork.freedesktop.org/series/53348/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5237_full -> Patchwork_10990_full
Summary
---
**SUCCESS**
No regressions found.
Known issues
Here are the changes found in Patchwork_10990_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@i915_suspend@shrink:
- shard-hsw: NOTRUN -> DMESG-WARN [fdo#108784]
- {shard-iclb}: NOTRUN -> DMESG-WARN [fdo#108784]
* igt@kms_atomic@test_only:
- {shard-iclb}: PASS -> DMESG-WARN [fdo#107724] +29
* igt@kms_busy@extended-modeset-hang-newfb-render-a:
- shard-snb: PASS -> DMESG-WARN [fdo#107956]
* igt@kms_color@pipe-c-legacy-gamma:
- shard-apl: PASS -> FAIL [fdo#104782]
* igt@kms_cursor_crc@cursor-256x256-random:
- shard-apl: PASS -> FAIL [fdo#103232] +1
* igt@kms_cursor_crc@cursor-256x85-random:
- shard-glk: PASS -> FAIL [fdo#103232] +3
* igt@kms_cursor_crc@cursor-64x21-sliding:
- {shard-iclb}: NOTRUN -> FAIL [fdo#103232] +2
* igt@kms_draw_crc@draw-method-rgb565-render-xtiled:
- {shard-iclb}: PASS -> WARN [fdo#108336] +3
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff:
- shard-apl: PASS -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@fbc-1p-rte:
- shard-glk: PASS -> FAIL [fdo#103167] / [fdo#105682]
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move:
- shard-glk: PASS -> FAIL [fdo#103167] +2
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-gtt:
- {shard-iclb}: PASS -> DMESG-FAIL [fdo#107724] +4
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt:
- {shard-iclb}: PASS -> FAIL [fdo#103167] +2
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
- {shard-iclb}: PASS -> DMESG-FAIL [fdo#103166] / [fdo#107724]
* igt@kms_plane_alpha_blend@pipe-b-alpha-transparant-fb:
- shard-kbl: NOTRUN -> FAIL [fdo#108145]
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
- {shard-iclb}: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +11
* igt@kms_plane_multiple@atomic-pipe-b-tiling-x:
- {shard-iclb}: PASS -> FAIL [fdo#103166]
* igt@kms_plane_multiple@atomic-pipe-c-tiling-x:
- shard-glk: PASS -> FAIL [fdo#103166] +1
* igt@kms_setmode@basic:
- shard-apl: PASS -> FAIL [fdo#99912]
- shard-kbl: PASS -> FAIL [fdo#99912]
* igt@perf@blocking:
- shard-hsw: PASS -> FAIL [fdo#102252] +1
Possible fixes
* igt@gem_ctx_isolation@rcs0-s3:
- shard-snb: DMESG-WARN [fdo#102365] -> PASS
* igt@gem_ppgtt@blt-vs-render-ctxn:
- shard-kbl: INCOMPLETE [fdo#103665] / [fdo#106023] / [fdo#106887]
-> PASS
* igt@kms_cursor_crc@cursor-64x64-onscreen:
- shard-apl: FAIL [fdo#103232] -> PASS +2
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu:
- shard-glk: FAIL [fdo#103167] -> PASS +3
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
- shard-apl: FAIL [fdo#103167] -> PASS
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-wc:
- {shard-iclb}: FAIL [fdo#103167] -> PASS +1
* igt@kms_plane@plane-position-covered-pipe-c-planes:
- shard-glk: FAIL [fdo#103166] -> PASS
* igt@kms_plane_multiple@atomic-pipe-a-tiling-x:
- shard-apl: FAIL [fdo#103166] -> PASS +3
* igt@kms_plane_multiple@atomic-pipe-c-tiling-x:
- {shard-iclb}: FAIL [fdo#103166] -> PASS +1
* igt@kms_vblank@pipe-b-ts-continuation-suspend:
- {shard-iclb}: INCOMPLETE [fdo#107713] -> PASS
* igt@pm_rpm@legacy-planes:
- {shard-iclb}: DMESG-WARN [fdo#108654] -> PASS
Warnings
* igt@i915_suspend@shrink:
- shard-snb: INCOMPLETE [fdo#105411] / [fdo#106886] -> DMESG-WARN
[fdo#108784]
* igt@kms_plane@pixel-format-pipe-a-planes:
- {shard-iclb}: FAIL [fdo#103166] -> DMESG-WARN [fdo#107724] /
[fdo#108336] +1
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102252]: https://bugs.freedesktop.org/show_bug.cgi?id=102252
[fdo#102365]: https://bugs.freedesktop.org/show_bug.cgi?id=102365
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
[fdo#104782]:
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/4] drm/i915/dsi: Fix pipe_bpp for handling for 6 bpc pixel-formats
== Series Details ==
Series: series starting with [1/4] drm/i915/dsi: Fix pipe_bpp for handling for
6 bpc pixel-formats
URL : https://patchwork.freedesktop.org/series/53352/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5237_full -> Patchwork_10992_full
Summary
---
**SUCCESS**
No regressions found.
Known issues
Here are the changes found in Patchwork_10992_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@i915_suspend@shrink:
- shard-hsw: NOTRUN -> DMESG-WARN [fdo#108784]
- {shard-iclb}: NOTRUN -> DMESG-WARN [fdo#108784]
* igt@kms_busy@extended-modeset-hang-newfb-render-a:
- shard-snb: PASS -> DMESG-WARN [fdo#107956]
* igt@kms_cursor_crc@cursor-256x256-onscreen:
- shard-glk: PASS -> FAIL [fdo#103232]
* igt@kms_cursor_crc@cursor-64x21-sliding:
- {shard-iclb}: NOTRUN -> FAIL [fdo#103232] +2
* igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-ytiled:
- shard-apl: PASS -> DMESG-WARN [fdo#103558] / [fdo#105602] +30
* igt@kms_draw_crc@draw-method-xrgb-render-ytiled:
- {shard-iclb}: PASS -> WARN [fdo#108336]
* igt@kms_flip@dpms-off-confusion:
- {shard-iclb}: PASS -> DMESG-WARN [fdo#107724] +6
* igt@kms_flip@flip-vs-expired-vblank:
- shard-glk: PASS -> FAIL [fdo#102887] / [fdo#105363]
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-cpu:
- shard-apl: PASS -> FAIL [fdo#103167] +2
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
- shard-glk: PASS -> FAIL [fdo#103167] +1
* igt@kms_frontbuffer_tracking@fbc-1p-rte:
- shard-kbl: PASS -> DMESG-WARN [fdo#103313] / [fdo#103558]
* igt@kms_frontbuffer_tracking@fbc-badstride:
- {shard-iclb}: PASS -> DMESG-FAIL [fdo#107724] +4
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-cpu:
- {shard-iclb}: NOTRUN -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-fullscreen:
- {shard-iclb}: PASS -> FAIL [fdo#103167] +5
* igt@kms_plane_alpha_blend@pipe-b-alpha-transparant-fb:
- shard-kbl: NOTRUN -> FAIL [fdo#108145]
* igt@kms_plane_multiple@atomic-pipe-a-tiling-yf:
- {shard-iclb}: PASS -> FAIL [fdo#103166]
* igt@kms_plane_multiple@atomic-pipe-b-tiling-x:
- shard-apl: PASS -> FAIL [fdo#103166] +1
* igt@kms_plane_multiple@atomic-pipe-c-tiling-x:
- shard-glk: PASS -> FAIL [fdo#103166]
* igt@kms_plane_multiple@atomic-pipe-c-tiling-y:
- {shard-iclb}: NOTRUN -> FAIL [fdo#103166]
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
- {shard-iclb}: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +1
* igt@kms_setmode@basic:
- shard-apl: PASS -> FAIL [fdo#99912]
* igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend:
- shard-kbl: PASS -> DMESG-WARN [fdo#103558] / [fdo#103841] /
[fdo#105079] / [fdo#105602]
* igt@kms_vblank@pipe-c-wait-busy:
- shard-kbl: PASS -> DMESG-WARN [fdo#103313] / [fdo#103558] /
[fdo#105602] +2
* igt@pm_rpm@dpms-non-lpsp:
- shard-kbl: PASS -> DMESG-WARN [fdo#103558] / [fdo#105602] +4
* {igt@runner@aborted}:
- shard-kbl: NOTRUN -> FAIL [fdo#103841]
Possible fixes
* igt@gem_ctx_isolation@rcs0-s3:
- shard-snb: DMESG-WARN [fdo#102365] -> PASS
* igt@gem_ppgtt@blt-vs-render-ctxn:
- shard-kbl: INCOMPLETE [fdo#103665] / [fdo#106023] / [fdo#106887]
-> PASS
* igt@kms_cursor_crc@cursor-64x64-onscreen:
- shard-apl: FAIL [fdo#103232] -> PASS +2
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu:
- shard-glk: FAIL [fdo#103167] -> PASS +2
* igt@kms_plane@plane-position-covered-pipe-c-planes:
- {shard-iclb}: FAIL [fdo#103166] -> PASS
* igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
- shard-apl: FAIL [fdo#103166] -> PASS +2
* igt@kms_plane_scaling@pipe-b-scaler-with-rotation:
- {shard-iclb}: DMESG-WARN [fdo#107724] -> PASS
* igt@kms_vblank@pipe-b-ts-continuation-suspend:
- {shard-iclb}: INCOMPLETE [fdo#107713] -> PASS
* igt@pm_rpm@legacy-planes:
- {shard-iclb}: DMESG-WARN [fdo#108654] -> PASS
Warnings
* igt@i915_suspend@shrink:
- shard-snb: INCOMPLETE [fdo#105411] / [fdo#106886] -> DMESG-WARN
[fdo#108784]
* igt@kms_available_modes_crc@available_mode_test_crc:
- shard-apl: FAIL [fdo#106641] -> DMESG-FAIL [fdo#103558] /
[fdo#105602] / [fdo#106641]
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-wc:
- {shard-iclb}: FAIL [fdo#103167] -> DMESG-WARN [fdo#107724] /
[fdo#108336]
* igt@kms_plane_alpha_blend@pipe-c-alpha-7efc:
- shard-kbl:
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/7] drm/i915: Complete the fences as they are cancelled due to wedging
== Series Details ==
Series: series starting with [1/7] drm/i915: Complete the fences as they are
cancelled due to wedging
URL : https://patchwork.freedesktop.org/series/53348/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5237 -> Patchwork_10990
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/53348/revisions/1/mbox/
Known issues
Here are the changes found in Patchwork_10990 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
- fi-byt-clapper: PASS -> FAIL [fdo#103191] / [fdo#107362]
* {igt@runner@aborted}:
- {fi-icl-y}: NOTRUN -> FAIL [fdo#108070]
Possible fixes
* igt@kms_pipe_crc_basic@hang-read-crc-pipe-a:
- fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#108070]: https://bugs.freedesktop.org/show_bug.cgi?id=108070
Participating hosts (49 -> 43)
--
Additional (1): fi-icl-y
Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-ctg-p8600 fi-kbl-7560u
Build changes
-
* Linux: CI_DRM_5237 -> Patchwork_10990
CI_DRM_5237: 2f99c4889e4124f9cf50b745d037f432318c4bb4 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4736: 285ebfb3b7adc56586031afa5150c4e5ad40c229 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10990: 10228149a5d8d7315b0f5ee2f60adce5921908d4 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
10228149a5d8 drm/i915/execlists: Apply a full mb before execution for Braswell
1bd7d7a676a7 drm/i915: Pipeline PDP updates for Braswell
e050a2a0f245 drm/i915/selftests: Reorder request allocation vs vma pinning
bfd217d7fef0 drm/i915/selftests: Terminate hangcheck sanitycheck forcibly
14e0cc931853 drm/i915: Allocate a common scratch page
1ab5d3906e81 drm/i915/ringbuffer: Clear semaphore sync registers on ring init
a7232ddbd965 drm/i915: Complete the fences as they are cancelled due to wedging
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10990/
___
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/fbdev: Make skip_vt_switch the default (rev3)
== Series Details ==
Series: drm/fbdev: Make skip_vt_switch the default (rev3)
URL : https://patchwork.freedesktop.org/series/53094/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5234_full -> Patchwork_10980_full
Summary
---
**WARNING**
Minor unknown changes coming with Patchwork_10980_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10980_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_10980_full:
### IGT changes ###
Warnings
* igt@kms_chv_cursor_fail@pipe-b-64x64-left-edge:
- shard-snb: PASS -> SKIP +1
* igt@pm_rc6_residency@rc6-accuracy:
- shard-snb: SKIP -> PASS
Known issues
Here are the changes found in Patchwork_10980_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@debugfs_test@read_all_entries_display_off:
- shard-skl: PASS -> INCOMPLETE [fdo#104108]
* igt@gem_exec_schedule@pi-ringfull-bsd:
- {shard-iclb}: NOTRUN -> FAIL [fdo#103158]
* igt@gem_ppgtt@blt-vs-render-ctx0:
- shard-skl: NOTRUN -> TIMEOUT [fdo#108039]
* igt@gem_userptr_blits@readonly-unsync:
- shard-skl: PASS -> TIMEOUT [fdo#108887]
* igt@i915_selftest@live_contexts:
- {shard-iclb}: NOTRUN -> DMESG-FAIL [fdo#108569]
* igt@i915_suspend@shrink:
- shard-skl: NOTRUN -> DMESG-WARN [fdo#108784]
* igt@kms_busy@extended-modeset-hang-newfb-render-a:
- {shard-iclb}: NOTRUN -> DMESG-WARN [fdo#107956] +2
* igt@kms_busy@extended-pageflip-hang-newfb-render-c:
- shard-apl: PASS -> DMESG-WARN [fdo#107956]
* igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
- shard-skl: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_cursor_crc@cursor-128x128-suspend:
- shard-apl: PASS -> DMESG-WARN [fdo#108566]
* igt@kms_cursor_crc@cursor-256x256-dpms:
- shard-glk: PASS -> FAIL [fdo#103232] +1
- shard-apl: PASS -> FAIL [fdo#103232] +1
- {shard-iclb}: NOTRUN -> FAIL [fdo#103232]
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-skl: PASS -> FAIL [fdo#105363]
* igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw:
- {shard-iclb}: PASS -> DMESG-FAIL [fdo#107724] +7
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
- shard-apl: PASS -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu:
- shard-glk: PASS -> FAIL [fdo#103167] +2
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt:
- {shard-iclb}: PASS -> FAIL [fdo#103167] +1
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-wc:
- {shard-iclb}: NOTRUN -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@psr-suspend:
- {shard-iclb}: PASS -> INCOMPLETE [fdo#107713]
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
- shard-skl: NOTRUN -> INCOMPLETE [fdo#104108]
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
- {shard-iclb}: PASS -> DMESG-FAIL [fdo#103166] / [fdo#107724]
* igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
- shard-skl: NOTRUN -> FAIL [fdo#108145] +1
* igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl: PASS -> FAIL [fdo#107815] / [fdo#108145]
* igt@kms_plane_alpha_blend@pipe-b-alpha-7efc:
- {shard-iclb}: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +1
* igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb:
- shard-glk: PASS -> FAIL [fdo#108145] +1
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: PASS -> FAIL [fdo#107815]
* igt@kms_plane_multiple@atomic-pipe-c-tiling-x:
- shard-glk: PASS -> FAIL [fdo#103166] +3
* igt@kms_plane_multiple@atomic-pipe-c-tiling-yf:
- {shard-iclb}: PASS -> FAIL [fdo#103166]
* igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format:
- {shard-iclb}: NOTRUN -> DMESG-WARN [fdo#107724]
* igt@kms_properties@connector-properties-atomic:
- shard-skl: NOTRUN -> FAIL [fdo#108642]
* igt@kms_setmode@basic:
- shard-kbl: PASS -> FAIL [fdo#99912]
* igt@perf_pmu@event-wait-rcs0:
- {shard-iclb}: PASS -> DMESG-WARN [fdo#107724] +11
Possible fixes
* igt@drm_import_export@import-close-race-flink:
- shard-skl: TIMEOUT [fdo#108667] -> PASS
* igt@gem_softpin@noreloc-s3:
- {shard-iclb}: INCOMPLETE [fdo#107713] -> PASS
* igt@kms_cursor_crc@cursor-128x128-suspend:
-
[Intel-gfx] [PATCH 4/4] drm/i915/dsi: Call drm_connector_cleanup on vlv_dsi_init error exit path
If we exit vlv_dsi_init() because we failed to find a fixed_mode, then
we've already called drm_connector_init() and we should call
drm_connector_cleanup() to unregister the connector object.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/i915/vlv_dsi.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/vlv_dsi.c b/drivers/gpu/drm/i915/vlv_dsi.c
index d72ccf557a9c..7ca5aafcdf93 100644
--- a/drivers/gpu/drm/i915/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/vlv_dsi.c
@@ -1861,7 +1861,7 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)
if (!fixed_mode) {
DRM_DEBUG_KMS("no fixed mode\n");
- goto err;
+ goto err_cleanup_connector;
}
connector->display_info.width_mm = fixed_mode->width_mm;
@@ -1874,6 +1874,8 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)
return;
+err_cleanup_connector:
+ drm_connector_cleanup(_connector->base);
err:
drm_encoder_cleanup(_encoder->base);
kfree(intel_dsi);
--
2.19.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/4] drm/i915/dsi: Fix pipe_bpp for handling for 6 bpc pixel-formats
There are 3 problems with the dsi code's pipe_bpp handling for 6 bpc
pixel-formats which this commit addresses:
1) It assumes that the pipe_bpp is the same as the bpp going over the dsi
lanes. This assumption is not valid for MIPI_DSI_FMT_RGB666, where pipe_bpp
should be 18 so that we do proper dithering but we actually send 24 bpp
over the dsi lanes (MIPI_DSI_FMT_RGB666_PACKED sends 18 bpp).
This assumption is enforced by an assert in *_dsi_get_pclk(). This assert
triggers on the initial hw-state readback on BYT/CHT devices which use
MIPI_DSI_FMT_RGB666, such as the Prowise PT301 tablet. PIPECONF is set to
6BPC / 18 bpp by the GOP, while mipi_dsi_pixel_format_to_bpp() returns 24.
This commits switches the calculations in *_dsi_get_pclk() to use the bpp
from mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format) which
returns the bpp going over the mipi lanes and drops the assert.
2) On BXT bxt_dsi_get_pipe_config() wrongly overrides the pipe_bpp which
i9xx_get_pipe_config() reads from PIPECONF with the return value from
mipi_dsi_pixel_format_to_bpp(). This avoids the assert from 1. but is wrong
since the pipe is actually running at the value configured in PIPECONF.
This commit drops the override of pipe_bpp from bxt_dsi_get_pipe_config().
3) The dsi encoder's compute_config() never assigns a value to pipe_bpp,
unlike most other encoders. Falling back on compute_baseline_pipe_bpp()
which always picks 24. 24 is only correct for MIPI_DSI_FMT_RGB88 for the
others we should use 18 bpp so that we correctly do 6bpc color dithering.
This commit adds code to intel_dsi_compute_config() to properly set
pipe_bpp based on intel_dsi->pixel_format.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/i915/intel_dsi.h | 4 ++--
drivers/gpu/drm/i915/vlv_dsi.c | 17
drivers/gpu/drm/i915/vlv_dsi_pll.c | 31 ++
3 files changed, 17 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
index c888c219835f..c796a2962a43 100644
--- a/drivers/gpu/drm/i915/intel_dsi.h
+++ b/drivers/gpu/drm/i915/intel_dsi.h
@@ -160,7 +160,7 @@ int vlv_dsi_pll_compute(struct intel_encoder *encoder,
void vlv_dsi_pll_enable(struct intel_encoder *encoder,
const struct intel_crtc_state *config);
void vlv_dsi_pll_disable(struct intel_encoder *encoder);
-u32 vlv_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
+u32 vlv_dsi_get_pclk(struct intel_encoder *encoder,
struct intel_crtc_state *config);
void vlv_dsi_reset_clocks(struct intel_encoder *encoder, enum port port);
@@ -170,7 +170,7 @@ int bxt_dsi_pll_compute(struct intel_encoder *encoder,
void bxt_dsi_pll_enable(struct intel_encoder *encoder,
const struct intel_crtc_state *config);
void bxt_dsi_pll_disable(struct intel_encoder *encoder);
-u32 bxt_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
+u32 bxt_dsi_get_pclk(struct intel_encoder *encoder,
struct intel_crtc_state *config);
void bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port);
diff --git a/drivers/gpu/drm/i915/vlv_dsi.c b/drivers/gpu/drm/i915/vlv_dsi.c
index be3af5f6c7a0..c10def5efa22 100644
--- a/drivers/gpu/drm/i915/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/vlv_dsi.c
@@ -322,6 +322,11 @@ static bool intel_dsi_compute_config(struct intel_encoder
*encoder,
/* DSI uses short packets for sync events, so clear mode flags for DSI
*/
adjusted_mode->flags = 0;
+ if (intel_dsi->pixel_format == MIPI_DSI_FMT_RGB888)
+ pipe_config->pipe_bpp = 24;
+ else
+ pipe_config->pipe_bpp = 18;
+
if (IS_GEN9_LP(dev_priv)) {
/* Enable Frame time stamp based scanline reporting */
adjusted_mode->private_flags |=
@@ -1097,10 +1102,8 @@ static void bxt_dsi_get_pipe_config(struct intel_encoder
*encoder,
}
fmt = I915_READ(MIPI_DSI_FUNC_PRG(port)) & VID_MODE_FORMAT_MASK;
- pipe_config->pipe_bpp =
- mipi_dsi_pixel_format_to_bpp(
- pixel_format_from_register_bits(fmt));
- bpp = pipe_config->pipe_bpp;
+ bpp = mipi_dsi_pixel_format_to_bpp(
+ pixel_format_from_register_bits(fmt));
/* Enable Frame time stamo based scanline reporting */
adjusted_mode->private_flags |=
@@ -1238,11 +1241,9 @@ static void intel_dsi_get_config(struct intel_encoder
*encoder,
if (IS_GEN9_LP(dev_priv)) {
bxt_dsi_get_pipe_config(encoder, pipe_config);
- pclk = bxt_dsi_get_pclk(encoder, pipe_config->pipe_bpp,
- pipe_config);
+ pclk = bxt_dsi_get_pclk(encoder, pipe_config);
} else {
- pclk = vlv_dsi_get_pclk(encoder, pipe_config->pipe_bpp,
- pipe_config);
+ pclk =
[Intel-gfx] [PATCH 2/4] drm/i915/dsi: Move logging of DSI VBT parameters to a helper function
This is a preparation patch for moving the calling of *_dphy_param_init()
out of intel_dsi_vbt_init.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/i915/intel_dsi_vbt.c | 77 +++-
1 file changed, 42 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dsi_vbt.c
b/drivers/gpu/drm/i915/intel_dsi_vbt.c
index 80bd56e96143..2afd9ddc94e8 100644
--- a/drivers/gpu/drm/i915/intel_dsi_vbt.c
+++ b/drivers/gpu/drm/i915/intel_dsi_vbt.c
@@ -510,6 +510,44 @@ int intel_dsi_vbt_get_modes(struct intel_dsi *intel_dsi)
return 1;
}
+static void intel_dsi_log_params(struct intel_dsi *intel_dsi)
+{
+ DRM_DEBUG_KMS("Pclk %d\n", intel_dsi->pclk);
+ DRM_DEBUG_KMS("Pixel overlap %d\n", intel_dsi->pixel_overlap);
+ DRM_DEBUG_KMS("Lane count %d\n", intel_dsi->lane_count);
+ DRM_DEBUG_KMS("DPHY param reg 0x%x\n", intel_dsi->dphy_reg);
+ DRM_DEBUG_KMS("Video mode format %s\n",
+ intel_dsi->video_mode_format ==
VIDEO_MODE_NON_BURST_WITH_SYNC_PULSE ?
+ "non-burst with sync pulse" :
+ intel_dsi->video_mode_format ==
VIDEO_MODE_NON_BURST_WITH_SYNC_EVENTS ?
+ "non-burst with sync events" :
+ intel_dsi->video_mode_format == VIDEO_MODE_BURST ?
+ "burst" : "");
+ DRM_DEBUG_KMS("Burst mode ratio %d\n", intel_dsi->burst_mode_ratio);
+ DRM_DEBUG_KMS("Reset timer %d\n", intel_dsi->rst_timer_val);
+ DRM_DEBUG_KMS("Eot %s\n", enableddisabled(intel_dsi->eotp_pkt));
+ DRM_DEBUG_KMS("Clockstop %s\n",
enableddisabled(!intel_dsi->clock_stop));
+ DRM_DEBUG_KMS("Mode %s\n", intel_dsi->operation_mode ? "command" :
"video");
+ if (intel_dsi->dual_link == DSI_DUAL_LINK_FRONT_BACK)
+ DRM_DEBUG_KMS("Dual link: DSI_DUAL_LINK_FRONT_BACK\n");
+ else if (intel_dsi->dual_link == DSI_DUAL_LINK_PIXEL_ALT)
+ DRM_DEBUG_KMS("Dual link: DSI_DUAL_LINK_PIXEL_ALT\n");
+ else
+ DRM_DEBUG_KMS("Dual link: NONE\n");
+ DRM_DEBUG_KMS("Pixel Format %d\n", intel_dsi->pixel_format);
+ DRM_DEBUG_KMS("TLPX %d\n", intel_dsi->escape_clk_div);
+ DRM_DEBUG_KMS("LP RX Timeout 0x%x\n", intel_dsi->lp_rx_timeout);
+ DRM_DEBUG_KMS("Turnaround Timeout 0x%x\n", intel_dsi->turn_arnd_val);
+ DRM_DEBUG_KMS("Init Count 0x%x\n", intel_dsi->init_count);
+ DRM_DEBUG_KMS("HS to LP Count 0x%x\n", intel_dsi->hs_to_lp_count);
+ DRM_DEBUG_KMS("LP Byte Clock %d\n", intel_dsi->lp_byte_clk);
+ DRM_DEBUG_KMS("DBI BW Timer 0x%x\n", intel_dsi->bw_timer);
+ DRM_DEBUG_KMS("LP to HS Clock Count 0x%x\n",
intel_dsi->clk_lp_to_hs_count);
+ DRM_DEBUG_KMS("HS to LP Clock Count 0x%x\n",
intel_dsi->clk_hs_to_lp_count);
+ DRM_DEBUG_KMS("BTA %s\n",
+ enableddisabled(!(intel_dsi->video_frmt_cfg_bits &
DISABLE_VIDEO_BTA)));
+}
+
#define ICL_PREPARE_CNT_MAX0x7
#define ICL_CLK_ZERO_CNT_MAX 0xf
#define ICL_TRAIL_CNT_MAX 0x7
@@ -613,6 +651,8 @@ static void icl_dphy_param_init(struct intel_dsi *intel_dsi)
HS_TRAIL(trail_cnt) |
HS_EXIT_OVERRIDE |
HS_EXIT(exit_zero_cnt));
+
+ intel_dsi_log_params(intel_dsi);
}
static void vlv_dphy_param_init(struct intel_dsi *intel_dsi)
@@ -772,6 +812,8 @@ static void vlv_dphy_param_init(struct intel_dsi *intel_dsi)
DIV_ROUND_UP(2 * tlpx_ui + trail_cnt * 2 + 8,
8);
intel_dsi->clk_hs_to_lp_count += extra_byte_count;
+
+ intel_dsi_log_params(intel_dsi);
}
bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id)
@@ -855,41 +897,6 @@ bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16
panel_id)
else
vlv_dphy_param_init(intel_dsi);
- DRM_DEBUG_KMS("Pclk %d\n", intel_dsi->pclk);
- DRM_DEBUG_KMS("Pixel overlap %d\n", intel_dsi->pixel_overlap);
- DRM_DEBUG_KMS("Lane count %d\n", intel_dsi->lane_count);
- DRM_DEBUG_KMS("DPHY param reg 0x%x\n", intel_dsi->dphy_reg);
- DRM_DEBUG_KMS("Video mode format %s\n",
- intel_dsi->video_mode_format ==
VIDEO_MODE_NON_BURST_WITH_SYNC_PULSE ?
- "non-burst with sync pulse" :
- intel_dsi->video_mode_format ==
VIDEO_MODE_NON_BURST_WITH_SYNC_EVENTS ?
- "non-burst with sync events" :
- intel_dsi->video_mode_format == VIDEO_MODE_BURST ?
- "burst" : "");
- DRM_DEBUG_KMS("Burst mode ratio %d\n", intel_dsi->burst_mode_ratio);
- DRM_DEBUG_KMS("Reset timer %d\n", intel_dsi->rst_timer_val);
- DRM_DEBUG_KMS("Eot %s\n", enableddisabled(intel_dsi->eotp_pkt));
- DRM_DEBUG_KMS("Clockstop %s\n",
enableddisabled(!intel_dsi->clock_stop));
- DRM_DEBUG_KMS("Mode %s\n",
[Intel-gfx] [PATCH 4/4] drm/i915/dsi: Read back pclk set by GOP and use that as pclk (v3)
The GOP sometimes initializes the pclk at a (slightly) different frequency
then the pclk which we've calculated.
This commit makes the DSI code read-back the pclk set by the GOP and
if that is within a reasonable margin of the calculated pclk, uses
that instead.
This fixes the first modeset being a full modeset instead of a
fast modeset on systems where the GOP pclk is different.
Changes in v2:
-Use intel_encoder_current_mode() to get the pclk setup by the GOP
Changes in v3:
-Back to the readback approach, skipping the dsi_pll.ctrl / .dev checks
in intel_pipe_config_compare() when adjust is set leads to:
[drm:pipe_config_err [i915]] *ERROR* mismatch in dsi_pll.ctrl (...)
[drm:pipe_config_err [i915]] *ERROR* mismatch in dsi_pll.div (...)
-Do the readback and pclk overriding from vlv_dsi_init(), rather then from
intel_dsi_vbt_init() as the vbt code should not be touching the hw
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/i915/vlv_dsi.c | 20
1 file changed, 16 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/vlv_dsi.c b/drivers/gpu/drm/i915/vlv_dsi.c
index 2ae1124dbf77..be3af5f6c7a0 100644
--- a/drivers/gpu/drm/i915/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/vlv_dsi.c
@@ -1717,7 +1717,7 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)
struct drm_encoder *encoder;
struct intel_connector *intel_connector;
struct drm_connector *connector;
- struct drm_display_mode *scan, *fixed_mode = NULL;
+ struct drm_display_mode *scan, *current_mode, *fixed_mode = NULL;
enum port port;
DRM_DEBUG_KMS("\n");
@@ -1761,6 +1761,9 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)
intel_connector->get_hw_state = intel_connector_get_hw_state;
intel_encoder->port = port;
+ intel_encoder->type = INTEL_OUTPUT_DSI;
+ intel_encoder->power_domain = POWER_DOMAIN_PORT_DSI;
+ intel_encoder->cloneable = 0;
/*
* On BYT/CHV, pipe A maps to MIPI DSI port A, pipe B maps to MIPI DSI
@@ -1797,6 +1800,18 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)
goto err;
}
+ /* Use clock read-back from current hw-state for fastboot */
+ current_mode = intel_encoder_current_mode(intel_encoder);
+ if (current_mode) {
+ DRM_DEBUG_KMS("Calculated pclk %d GOP %d\n",
+ intel_dsi->pclk, current_mode->clock);
+ if (intel_fuzzy_clock_check(intel_dsi->pclk,
+ current_mode->clock))
+ intel_dsi->pclk = current_mode->clock;
+
+ kfree(current_mode);
+ }
+
vlv_dphy_param_init(intel_dsi);
/*
@@ -1814,9 +1829,6 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)
}
}
- intel_encoder->type = INTEL_OUTPUT_DSI;
- intel_encoder->power_domain = POWER_DOMAIN_PORT_DSI;
- intel_encoder->cloneable = 0;
drm_connector_init(dev, connector, _dsi_connector_funcs,
DRM_MODE_CONNECTOR_DSI);
--
2.19.1
___
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[Intel-gfx] [PATCH 1/4] drm/i915: Make intel_fuzzy_clock_check available outside of intel_display.c
The next patch in this series uses intel_fuzzy_clock_check from the
vlv_dsi.c code.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/i915/intel_display.c | 2 +-
drivers/gpu/drm/i915/intel_drv.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 31fd6708a92e..c2980643a1a5 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -11434,7 +11434,7 @@ intel_modeset_pipe_config(struct drm_crtc *crtc,
return 0;
}
-static bool intel_fuzzy_clock_check(int clock1, int clock2)
+bool intel_fuzzy_clock_check(int clock1, int clock2)
{
int diff;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index db6fa1d0cbda..a1862d1c06f7 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1602,6 +1602,7 @@ int vlv_force_pll_on(struct drm_i915_private *dev_priv,
enum pipe pipe,
const struct dpll *dpll);
void vlv_force_pll_off(struct drm_i915_private *dev_priv, enum pipe pipe);
int lpt_get_iclkip(struct drm_i915_private *dev_priv);
+bool intel_fuzzy_clock_check(int clock1, int clock2);
/* modesetting asserts */
void assert_panel_unlocked(struct drm_i915_private *dev_priv,
--
2.19.1
___
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[Intel-gfx] [PATCH 3/4] drm/i915/dsi: Move vlv/icl_dphy_param_init call out of intel_dsi_vbt_init
The vlv/icl_dphy_param_init calls do various calculations to set dphy
parameters based on the pclk.
Move the calling of vlv/icl_dphy_param_init to vlv_dsi_init to give
vlv_dsi_init a chance to tweak the pclk before these calculations are done.
This also removes the single "if (IS_ICELAKE(dev_priv))" check from
intel_dsi_vbt_init making it fully platform agnostic.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/i915/intel_dsi.h | 2 ++
drivers/gpu/drm/i915/intel_dsi_vbt.c | 9 ++---
drivers/gpu/drm/i915/vlv_dsi.c | 2 ++
3 files changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
index 49437b02b213..c888c219835f 100644
--- a/drivers/gpu/drm/i915/intel_dsi.h
+++ b/drivers/gpu/drm/i915/intel_dsi.h
@@ -180,5 +180,7 @@ int intel_dsi_vbt_get_modes(struct intel_dsi *intel_dsi);
void intel_dsi_vbt_exec_sequence(struct intel_dsi *intel_dsi,
enum mipi_seq seq_id);
void intel_dsi_msleep(struct intel_dsi *intel_dsi, int msec);
+void icl_dphy_param_init(struct intel_dsi *intel_dsi);
+void vlv_dphy_param_init(struct intel_dsi *intel_dsi);
#endif /* _INTEL_DSI_H */
diff --git a/drivers/gpu/drm/i915/intel_dsi_vbt.c
b/drivers/gpu/drm/i915/intel_dsi_vbt.c
index 2afd9ddc94e8..f27af47c6e49 100644
--- a/drivers/gpu/drm/i915/intel_dsi_vbt.c
+++ b/drivers/gpu/drm/i915/intel_dsi_vbt.c
@@ -556,7 +556,7 @@ static void intel_dsi_log_params(struct intel_dsi
*intel_dsi)
#define ICL_HS_ZERO_CNT_MAX0xf
#define ICL_EXIT_ZERO_CNT_MAX 0x7
-static void icl_dphy_param_init(struct intel_dsi *intel_dsi)
+void icl_dphy_param_init(struct intel_dsi *intel_dsi)
{
struct drm_device *dev = intel_dsi->base.base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
@@ -655,7 +655,7 @@ static void icl_dphy_param_init(struct intel_dsi *intel_dsi)
intel_dsi_log_params(intel_dsi);
}
-static void vlv_dphy_param_init(struct intel_dsi *intel_dsi)
+void vlv_dphy_param_init(struct intel_dsi *intel_dsi)
{
struct drm_device *dev = intel_dsi->base.base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
@@ -892,11 +892,6 @@ bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16
panel_id)
intel_dsi->burst_mode_ratio = burst_mode_ratio;
- if (IS_ICELAKE(dev_priv))
- icl_dphy_param_init(intel_dsi);
- else
- vlv_dphy_param_init(intel_dsi);
-
/* delays in VBT are in unit of 100us, so need to convert
* here in ms
* Delay (100us) * 100 /1000 = Delay / 10 (ms) */
diff --git a/drivers/gpu/drm/i915/vlv_dsi.c b/drivers/gpu/drm/i915/vlv_dsi.c
index d42ccd127ff4..2ae1124dbf77 100644
--- a/drivers/gpu/drm/i915/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/vlv_dsi.c
@@ -1797,6 +1797,8 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)
goto err;
}
+ vlv_dphy_param_init(intel_dsi);
+
/*
* In case of BYT with CRC PMIC, we need to use GPIO for
* Panel control.
--
2.19.1
___
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/dsi: Fix pipe_bpp for handling for 6 bpc pixel-formats
== Series Details ==
Series: series starting with [1/4] drm/i915/dsi: Fix pipe_bpp for handling for
6 bpc pixel-formats
URL : https://patchwork.freedesktop.org/series/53352/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7325fa834a45 drm/i915/dsi: Fix pipe_bpp for handling for 6 bpc pixel-formats
-:87: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#87: FILE: drivers/gpu/drm/i915/vlv_dsi.c:1066:
+ bpp = mipi_dsi_pixel_format_to_bpp(
total: 0 errors, 0 warnings, 1 checks, 115 lines checked
4b3cb6708b5e drm/i915/dsi: Enable dithering for 6 bpc panels
292eb644fe44 drm/i915/dsi: Adjust crtc_clock for burst_mode_ratio
2481df3b8753 drm/i915/dsi: Call drm_connector_cleanup on vlv_dsi_init error
exit path
___
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[Intel-gfx] ✗ Fi.CI.IGT: failure for Restore workarounds after engine reset and unify their handling (rev2)
== Series Details ==
Series: Restore workarounds after engine reset and unify their handling (rev2)
URL : https://patchwork.freedesktop.org/series/53313/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5235_full -> Patchwork_10981_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_10981_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10981_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_10981_full:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live_workarounds:
- {shard-iclb}: PASS -> DMESG-FAIL
* igt@kms_draw_crc@draw-method-xrgb-pwrite-ytiled:
- shard-skl: PASS -> FAIL
Warnings
* igt@pm_rc6_residency@rc6-accuracy:
- shard-snb: PASS -> SKIP
Known issues
Here are the changes found in Patchwork_10981_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_exec_reuse@contexts:
- shard-apl: PASS -> INCOMPLETE [fdo#103927]
* igt@gem_ppgtt@blt-vs-render-ctx0:
- shard-skl: PASS -> TIMEOUT [fdo#108039]
* igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
- shard-kbl: PASS -> DMESG-WARN [fdo#107956]
* igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
- shard-glk: PASS -> FAIL [fdo#108145]
* igt@kms_ccs@pipe-b-crc-sprite-planes-basic:
- {shard-iclb}: NOTRUN -> FAIL [fdo#107725]
* igt@kms_chv_cursor_fail@pipe-a-128x128-bottom-edge:
- shard-skl: PASS -> FAIL [fdo#104671]
* igt@kms_cursor_crc@cursor-256x256-offscreen:
- shard-skl: NOTRUN -> FAIL [fdo#103232]
* igt@kms_cursor_crc@cursor-256x85-offscreen:
- shard-skl: PASS -> FAIL [fdo#103232]
* igt@kms_cursor_crc@cursor-64x21-random:
- shard-apl: PASS -> FAIL [fdo#103232] +1
* igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-untiled:
- {shard-iclb}: PASS -> WARN [fdo#108336] +6
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff:
- shard-apl: PASS -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite:
- {shard-iclb}: PASS -> FAIL [fdo#103167] +1
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-render:
- shard-glk: PASS -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-blt:
- shard-skl: NOTRUN -> FAIL [fdo#103167] / [fdo#105682]
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-pwrite:
- {shard-iclb}: PASS -> DMESG-FAIL [fdo#107724] +6
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-gtt:
- shard-skl: NOTRUN -> FAIL [fdo#105682] +1
* igt@kms_frontbuffer_tracking@fbcpsr-tilingchange:
- shard-skl: PASS -> FAIL [fdo#105682] +1
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-cpu:
- shard-skl: NOTRUN -> FAIL [fdo#103167] +1
* igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt:
- shard-skl: PASS -> FAIL [fdo#103167] +1
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
- {shard-iclb}: PASS -> INCOMPLETE [fdo#107713]
* igt@kms_plane@plane-position-covered-pipe-b-planes:
- {shard-iclb}: PASS -> FAIL [fdo#103166]
* igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
- shard-skl: NOTRUN -> FAIL [fdo#108145] +3
* igt@kms_plane_lowres@pipe-c-tiling-y:
- {shard-iclb}: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +21
* igt@kms_plane_multiple@atomic-pipe-a-tiling-yf:
- shard-glk: PASS -> FAIL [fdo#103166] +1
* igt@kms_plane_multiple@atomic-pipe-c-tiling-x:
- shard-apl: PASS -> FAIL [fdo#103166] +1
* igt@kms_plane_scaling@pipe-b-plane-scaling:
- {shard-iclb}: PASS -> DMESG-WARN [fdo#107724] +36
* igt@kms_rotation_crc@primary-rotation-180:
- shard-skl: PASS -> FAIL [fdo#103925] / [fdo#107815]
* igt@kms_setmode@basic:
- shard-kbl: PASS -> FAIL [fdo#99912]
* igt@kms_universal_plane@universal-plane-pipe-a-functional:
- {shard-iclb}: PASS -> DMESG-FAIL [fdo#103166] / [fdo#107724]
* igt@perf@short-reads:
- shard-skl: PASS -> FAIL [fdo#103183]
* igt@pm_rpm@pm-caching:
- shard-skl: PASS -> INCOMPLETE [fdo#107807]
* igt@pm_rpm@system-suspend-modeset:
- shard-skl: PASS -> INCOMPLETE [fdo#104108] / [fdo#107773] /
[fdo#107807]
* igt@pm_rps@waitboost:
- {shard-iclb}: NOTRUN -> FAIL [fdo#102250] / [fdo#108059]
Possible fixes
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: Make intel_fuzzy_clock_check available outside of intel_display.c
== Series Details ==
Series: series starting with [1/4] drm/i915: Make intel_fuzzy_clock_check
available outside of intel_display.c
URL : https://patchwork.freedesktop.org/series/53350/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
39f8e6ecede8 drm/i915: Make intel_fuzzy_clock_check available outside of
intel_display.c
b240c86bae46 drm/i915/dsi: Move logging of DSI VBT parameters to a helper
function
-:55: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#55: FILE: drivers/gpu/drm/i915/intel_dsi_vbt.c:550:
+ DRM_DEBUG_KMS("BTA %s\n",
+ enableddisabled(!(intel_dsi->video_frmt_cfg_bits &
DISABLE_VIDEO_BTA)));
total: 0 errors, 0 warnings, 1 checks, 101 lines checked
c3a20d667cb9 drm/i915/dsi: Move vlv/icl_dphy_param_init call out of
intel_dsi_vbt_init
e196ecfbcd47 drm/i915/dsi: Read back pclk set by GOP and use that as pclk (v3)
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915/dsi: Fix pipe_bpp for handling for 6 bpc pixel-formats
== Series Details ==
Series: series starting with [1/4] drm/i915/dsi: Fix pipe_bpp for handling for
6 bpc pixel-formats
URL : https://patchwork.freedesktop.org/series/53352/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5237 -> Patchwork_10992
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/53352/revisions/1/mbox/
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_10992:
### IGT changes ###
Possible regressions
* {igt@runner@aborted}:
- fi-glk-dsi: NOTRUN -> FAIL
- fi-bxt-dsi: NOTRUN -> FAIL
Known issues
Here are the changes found in Patchwork_10992 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
- fi-byt-clapper: PASS -> FAIL [fdo#103191] / [fdo#107362]
* {igt@runner@aborted}:
- {fi-icl-y}: NOTRUN -> FAIL [fdo#108070]
Possible fixes
* igt@kms_pipe_crc_basic@hang-read-crc-pipe-a:
- fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#108070]: https://bugs.freedesktop.org/show_bug.cgi?id=108070
Participating hosts (49 -> 42)
--
Additional (1): fi-icl-y
Missing(8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-ctg-p8600 fi-pnv-d510 fi-kbl-7560u
Build changes
-
* Linux: CI_DRM_5237 -> Patchwork_10992
CI_DRM_5237: 2f99c4889e4124f9cf50b745d037f432318c4bb4 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4736: 285ebfb3b7adc56586031afa5150c4e5ad40c229 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10992: 2481df3b8753c0420eb8c6e4b2b9d5e1b9f98262 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
2481df3b8753 drm/i915/dsi: Call drm_connector_cleanup on vlv_dsi_init error
exit path
292eb644fe44 drm/i915/dsi: Adjust crtc_clock for burst_mode_ratio
4b3cb6708b5e drm/i915/dsi: Enable dithering for 6 bpc panels
7325fa834a45 drm/i915/dsi: Fix pipe_bpp for handling for 6 bpc pixel-formats
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10992/
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: Make intel_fuzzy_clock_check available outside of intel_display.c
== Series Details ==
Series: series starting with [1/4] drm/i915: Make intel_fuzzy_clock_check
available outside of intel_display.c
URL : https://patchwork.freedesktop.org/series/53350/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5237 -> Patchwork_10991
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/53350/revisions/1/mbox/
Known issues
Here are the changes found in Patchwork_10991 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s4-devices:
- fi-ivb-3520m: PASS -> FAIL [fdo#108880]
* {igt@runner@aborted}:
- {fi-icl-y}: NOTRUN -> FAIL [fdo#108070]
Possible fixes
* igt@kms_pipe_crc_basic@hang-read-crc-pipe-a:
- fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#108070]: https://bugs.freedesktop.org/show_bug.cgi?id=108070
[fdo#108880]: https://bugs.freedesktop.org/show_bug.cgi?id=108880
Participating hosts (49 -> 43)
--
Additional (1): fi-icl-y
Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-ctg-p8600 fi-kbl-7560u
Build changes
-
* Linux: CI_DRM_5237 -> Patchwork_10991
CI_DRM_5237: 2f99c4889e4124f9cf50b745d037f432318c4bb4 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4736: 285ebfb3b7adc56586031afa5150c4e5ad40c229 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10991: e196ecfbcd479f42f14dffe9f605e07f72d10329 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
e196ecfbcd47 drm/i915/dsi: Read back pclk set by GOP and use that as pclk (v3)
c3a20d667cb9 drm/i915/dsi: Move vlv/icl_dphy_param_init call out of
intel_dsi_vbt_init
b240c86bae46 drm/i915/dsi: Move logging of DSI VBT parameters to a helper
function
39f8e6ecede8 drm/i915: Make intel_fuzzy_clock_check available outside of
intel_display.c
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10991/
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/4] drm/i915/dsi: Enable dithering for 6 bpc panels
The display engine has 2 dithering enable bits which both need to be set for dithering to happen, 1 in the PIPECONF register which is taken care of by i9xx_set_pipeconf() and a second bit at the encoder level. The dsi code was not setting the encoder level dithering enable bit causing dithering to be disabled, this commit fixes this. Signed-off-by: Hans de Goede --- drivers/gpu/drm/i915/vlv_dsi.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/vlv_dsi.c b/drivers/gpu/drm/i915/vlv_dsi.c index c10def5efa22..c21cbfa9653c 100644 --- a/drivers/gpu/drm/i915/vlv_dsi.c +++ b/drivers/gpu/drm/i915/vlv_dsi.c @@ -711,6 +711,10 @@ static void intel_dsi_port_enable(struct intel_encoder *encoder, LANE_CONFIGURATION_DUAL_LINK_B : LANE_CONFIGURATION_DUAL_LINK_A; } + + if (intel_dsi->pixel_format != MIPI_DSI_FMT_RGB888) + temp |= DITHERING_ENABLE; + /* assert ip_tg_enable signal */ I915_WRITE(port_ctrl, temp | DPI_ENABLE); POSTING_READ(port_ctrl); -- 2.19.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 3/4] drm/i915/dsi: Adjust crtc_clock for burst_mode_ratio
On devices with a burst_mode_ratio which is not 100 (1:1), the pclk will have a different value then drm_display_mode.clock . On a Prowise PT301 tablet where vbt.lfp_lvds_vbt_mode.clock is 66100 and burst_mode_ratio is 130 this leads to the following errors: [drm:pipe_config_err [i915]] *ERROR* mismatch in pixel_rate (expected 66100, found 86458) [drm:pipe_config_err [i915]] *ERROR* mismatch in base.adjusted_mode.crtc_clock (expected 66100, found 86458) [drm:pipe_config_err [i915]] *ERROR* mismatch in port_clock (expected 66100, found 86458) This commit makes intel_dsi_compute_config() set pipe_config.adjusted_mode.crtc_clock, taking the burst_mode_ratio into account fixing this. Signed-off-by: Hans de Goede --- drivers/gpu/drm/i915/vlv_dsi.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/vlv_dsi.c b/drivers/gpu/drm/i915/vlv_dsi.c index c21cbfa9653c..d72ccf557a9c 100644 --- a/drivers/gpu/drm/i915/vlv_dsi.c +++ b/drivers/gpu/drm/i915/vlv_dsi.c @@ -347,6 +347,10 @@ static bool intel_dsi_compute_config(struct intel_encoder *encoder, return false; } + adjusted_mode->crtc_clock = + DIV_ROUND_UP(adjusted_mode->crtc_clock * +intel_dsi->burst_mode_ratio, 100); + pipe_config->clock_set = true; return true; -- 2.19.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/2] drm/i915/skl: Rework MOCS tables to keep common part in a define
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/skl: Rework MOCS tables to keep
common part in a define
URL : https://patchwork.freedesktop.org/series/53337/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5236_full -> Patchwork_10983_full
Summary
---
**SUCCESS**
No regressions found.
Known issues
Here are the changes found in Patchwork_10983_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@i915_suspend@forcewake:
- shard-skl: PASS -> INCOMPLETE [fdo#104108] / [fdo#107773] +1
* igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b:
- shard-hsw: PASS -> DMESG-WARN [fdo#107956]
* igt@kms_ccs@pipe-b-crc-sprite-planes-basic:
- shard-glk: PASS -> FAIL [fdo#108145]
* igt@kms_chv_cursor_fail@pipe-a-128x128-bottom-edge:
- shard-skl: PASS -> FAIL [fdo#104671]
* igt@kms_content_protection@atomic:
- shard-apl: NOTRUN -> FAIL [fdo#108597]
* igt@kms_cursor_crc@cursor-128x42-onscreen:
- shard-apl: NOTRUN -> FAIL [fdo#103232]
* igt@kms_cursor_crc@cursor-256x85-offscreen:
- shard-skl: PASS -> FAIL [fdo#103232]
* igt@kms_draw_crc@draw-method-rgb565-render-ytiled:
- {shard-iclb}: PASS -> WARN [fdo#108336] +4
* igt@kms_flip@2x-flip-vs-expired-vblank:
- shard-glk: PASS -> FAIL [fdo#105363]
* igt@kms_flip@basic-flip-vs-wf_vblank:
- {shard-iclb}: PASS -> DMESG-WARN [fdo#107724] +20
* igt@kms_flip@flip-vs-expired-vblank:
- shard-skl: PASS -> FAIL [fdo#105363]
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu:
- shard-apl: NOTRUN -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-cpu:
- shard-apl: PASS -> FAIL [fdo#103167] +1
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu:
- shard-glk: PASS -> FAIL [fdo#103167] +2
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-pwrite:
- {shard-iclb}: PASS -> DMESG-FAIL [fdo#107724] +5
* igt@kms_frontbuffer_tracking@fbcpsr-tilingchange:
- shard-skl: PASS -> FAIL [fdo#105682] +1
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move:
- {shard-iclb}: PASS -> FAIL [fdo#103167] +5
* igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt:
- shard-skl: PASS -> FAIL [fdo#103167] +1
* igt@kms_plane@pixel-format-pipe-a-planes:
- {shard-iclb}: NOTRUN -> FAIL [fdo#103166]
- shard-skl: NOTRUN -> DMESG-WARN [fdo#106885]
* igt@kms_plane@plane-position-covered-pipe-c-planes:
- {shard-iclb}: PASS -> FAIL [fdo#103166] +2
* igt@kms_plane@plane-position-hole-dpms-pipe-a-planes:
- {shard-iclb}: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +14
* igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl: PASS -> FAIL [fdo#107815] / [fdo#108145]
* igt@kms_plane_alpha_blend@pipe-c-alpha-basic:
- shard-apl: NOTRUN -> FAIL [fdo#108145]
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: PASS -> FAIL [fdo#107815]
* igt@kms_plane_multiple@atomic-pipe-a-tiling-x:
- shard-apl: NOTRUN -> FAIL [fdo#103166]
* igt@kms_plane_multiple@atomic-pipe-b-tiling-x:
- shard-glk: PASS -> FAIL [fdo#103166] +2
* igt@kms_plane_multiple@atomic-pipe-c-tiling-y:
- shard-apl: PASS -> FAIL [fdo#103166]
* igt@kms_rotation_crc@primary-rotation-180:
- shard-skl: PASS -> FAIL [fdo#103925] / [fdo#107815]
* igt@kms_universal_plane@universal-plane-pipe-a-functional:
- {shard-iclb}: PASS -> DMESG-FAIL [fdo#103166] / [fdo#107724]
* igt@kms_vblank@pipe-a-ts-continuation-modeset-rpm:
- shard-apl: PASS -> DMESG-WARN [fdo#103558] / [fdo#105602] +17
* igt@perf@short-reads:
- shard-skl: PASS -> FAIL [fdo#103183]
* igt@pm_rpm@debugfs-forcewake-user:
- shard-skl: PASS -> INCOMPLETE [fdo#107807]
* igt@pm_rpm@dpms-lpsp:
- {shard-iclb}: PASS -> INCOMPLETE [fdo#108840]
* igt@pm_rpm@system-suspend-execbuf:
- shard-skl: PASS -> INCOMPLETE [fdo#104108] / [fdo#107807]
Possible fixes
* igt@gem_pwrite_pread@snooped-copy-performance:
- shard-apl: INCOMPLETE [fdo#103927] -> PASS
* igt@kms_ccs@pipe-a-missing-ccs-buffer:
- {shard-iclb}: DMESG-WARN [fdo#107724] -> PASS +8
* igt@kms_chv_cursor_fail@pipe-a-128x128-top-edge:
- {shard-iclb}: DMESG-WARN [fdo#107724] / [fdo#108336] -> PASS +2
* igt@kms_cursor_crc@cursor-128x128-suspend:
- shard-skl: INCOMPLETE [fdo#104108] -> PASS
* igt@kms_cursor_crc@cursor-256x256-dpms:
- shard-glk: FAIL [fdo#103232] -> PASS +1
*
Re: [Intel-gfx] [PATCH 7/7] drm/i915/execlists: Apply a full mb before execution for Braswell
Quoting Chris Wilson (2018-12-01 09:52:31)
> Braswell is really picky about having our writes posted to memory before
> we execute or else the GPU may see stale values. A wmb() is insufficient
> as it only ensures the writes are visible to other cores, we need a full
> mb() to ensure the writes are in memory and visible to the GPU.
>
> The most frequent failure in flushing before execution is that we see
> stale PTE values and execute the wrong pages.
>
> References: 987abd5c62f9 ("drm/i915/execlists: Force write serialisation into
> context image vs execution")
> Signed-off-by: Chris Wilson
> Cc: Mika Kuoppala
> Cc: Tvrtko Ursulin
> Cc: Joonas Lahtinen
> Cc: sta...@vger.kernel.org
> ---
> drivers/gpu/drm/i915/intel_lrc.c | 6 +-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c
> b/drivers/gpu/drm/i915/intel_lrc.c
> index 0a690c557113..cad1228f6503 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -379,8 +379,12 @@ static u64 execlists_update_context(struct i915_request
> *rq)
> * may not be visible to the HW prior to the completion of the UC
> * register write and that we may begin execution from the context
> * before its image is complete leading to invalid PD chasing.
> +*
> +* Furthermore, Braswell wants a full mb to be sure that the writes
> +* are coherent in memory (visible to the GPU) prior to execution,
> +* and not just visible to other CPUs (as is the result of wmb).
> */
> - wmb();
> + mb();
Scratch that. Just took ages to hit this time. It seemed so promising!
-Chris
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v3,1/2] drm/i915: Add HAS_DISPLAY() and use it
== Series Details ==
Series: series starting with [v3,1/2] drm/i915: Add HAS_DISPLAY() and use it
URL : https://patchwork.freedesktop.org/series/53341/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5237_full -> Patchwork_10985_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_10985_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10985_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_10985_full:
### IGT changes ###
Possible regressions
* igt@gem_eio@in-flight-internal-1us:
- {shard-iclb}: PASS -> INCOMPLETE
* igt@kms_draw_crc@draw-method-xrgb-pwrite-ytiled:
- shard-skl: PASS -> FAIL
Known issues
Here are the changes found in Patchwork_10985_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@debugfs_test@read_all_entries_display_off:
- shard-skl: PASS -> INCOMPLETE [fdo#104108] +1
* igt@gem_exec_schedule@pi-ringfull-bsd:
- shard-skl: NOTRUN -> FAIL [fdo#103158]
* igt@i915_suspend@shrink:
- shard-hsw: NOTRUN -> DMESG-WARN [fdo#108784]
- {shard-iclb}: NOTRUN -> DMESG-WARN [fdo#108784]
* igt@kms_busy@extended-modeset-hang-newfb-render-a:
- shard-snb: PASS -> DMESG-WARN [fdo#107956]
* igt@kms_busy@extended-modeset-hang-newfb-render-b:
- shard-skl: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_chv_cursor_fail@pipe-a-128x128-bottom-edge:
- shard-skl: PASS -> FAIL [fdo#104671]
* igt@kms_cursor_crc@cursor-256x256-dpms:
- shard-glk: PASS -> FAIL [fdo#103232] +1
* igt@kms_cursor_crc@cursor-256x256-suspend:
- shard-kbl: PASS -> DMESG-WARN [fdo#108566]
* igt@kms_cursor_crc@cursor-256x85-offscreen:
- shard-skl: PASS -> FAIL [fdo#103232]
* igt@kms_cursor_crc@cursor-64x21-sliding:
- {shard-iclb}: NOTRUN -> FAIL [fdo#103232] +2
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-hsw: PASS -> FAIL [fdo#102887]
- shard-glk: PASS -> FAIL [fdo#105363]
* igt@kms_flip@plain-flip-fb-recreate-interruptible:
- shard-skl: PASS -> FAIL [fdo#100368]
* igt@kms_flip_tiling@flip-changes-tiling-y:
- shard-skl: PASS -> FAIL [fdo#107931] / [fdo#108303]
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-cpu:
- shard-apl: PASS -> FAIL [fdo#103167] +2
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
- shard-glk: PASS -> FAIL [fdo#103167] +1
* igt@kms_frontbuffer_tracking@fbc-stridechange:
- shard-skl: NOTRUN -> FAIL [fdo#105683]
* igt@kms_frontbuffer_tracking@fbcpsr-tilingchange:
- shard-skl: PASS -> FAIL [fdo#105682] +1
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt:
- {shard-iclb}: PASS -> FAIL [fdo#103167] +1
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-cpu:
- {shard-iclb}: NOTRUN -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt:
- shard-skl: PASS -> FAIL [fdo#103167] +1
* igt@kms_plane@pixel-format-pipe-a-planes:
- shard-skl: NOTRUN -> DMESG-WARN [fdo#106885]
* igt@kms_plane_multiple@atomic-pipe-c-tiling-x:
- shard-glk: PASS -> FAIL [fdo#103166] +1
- shard-apl: PASS -> FAIL [fdo#103166]
* igt@kms_rotation_crc@primary-rotation-180:
- shard-skl: PASS -> FAIL [fdo#103925] / [fdo#107815]
* igt@kms_setmode@basic:
- shard-apl: PASS -> FAIL [fdo#99912]
- shard-kbl: PASS -> FAIL [fdo#99912]
* igt@pm_rpm@system-suspend-execbuf:
- shard-skl: PASS -> INCOMPLETE [fdo#104108] / [fdo#107773] /
[fdo#107807]
Possible fixes
* igt@gem_ctx_isolation@rcs0-s3:
- shard-snb: DMESG-WARN [fdo#102365] -> PASS
* igt@kms_busy@extended-modeset-hang-newfb-render-c:
- {shard-iclb}: DMESG-WARN [fdo#107956] -> PASS
* igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b:
- shard-hsw: DMESG-WARN [fdo#107956] -> PASS
* igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
- shard-skl: DMESG-WARN [fdo#107956] -> PASS
* igt@kms_cursor_crc@cursor-64x64-onscreen:
- shard-apl: FAIL [fdo#103232] -> PASS +2
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu:
- shard-glk: FAIL [fdo#103167] -> PASS +3
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-onoff:
- {shard-iclb}: FAIL
[Intel-gfx] ✗ Fi.CI.IGT: failure for i915/dp/fec: Fix static check warning
== Series Details ==
Series: i915/dp/fec: Fix static check warning
URL : https://patchwork.freedesktop.org/series/53342/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5237_full -> Patchwork_10986_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_10986_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10986_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_10986_full:
### IGT changes ###
Possible regressions
* igt@kms_draw_crc@draw-method-xrgb-pwrite-ytiled:
- shard-skl: PASS -> FAIL
Warnings
* igt@pm_rc6_residency@rc6-accuracy:
- shard-snb: SKIP -> PASS
Known issues
Here are the changes found in Patchwork_10986_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_exec_schedule@pi-ringfull-bsd:
- shard-skl: NOTRUN -> FAIL [fdo#103158]
* igt@i915_suspend@shrink:
- shard-hsw: NOTRUN -> DMESG-WARN [fdo#108784]
- {shard-iclb}: NOTRUN -> DMESG-WARN [fdo#108784]
* igt@kms_busy@extended-modeset-hang-newfb-render-a:
- shard-snb: PASS -> DMESG-WARN [fdo#107956]
* igt@kms_busy@extended-modeset-hang-newfb-render-b:
- shard-skl: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_chv_cursor_fail@pipe-a-128x128-bottom-edge:
- shard-skl: PASS -> FAIL [fdo#104671]
* igt@kms_cursor_crc@cursor-128x128-suspend:
- shard-snb: PASS -> DMESG-WARN [fdo#102365]
* igt@kms_cursor_crc@cursor-256x256-dpms:
- shard-glk: PASS -> FAIL [fdo#103232] +1
* igt@kms_cursor_crc@cursor-64x21-sliding:
- {shard-iclb}: NOTRUN -> FAIL [fdo#103232] +2
- shard-apl: PASS -> FAIL [fdo#103232]
* igt@kms_cursor_crc@cursor-64x64-random:
- shard-skl: PASS -> FAIL [fdo#103232] +1
* igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-untiled:
- shard-skl: PASS -> FAIL [fdo#103184]
* igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset:
- shard-apl: SKIP -> INCOMPLETE [fdo#103927]
* igt@kms_flip@flip-vs-expired-vblank:
- shard-skl: PASS -> FAIL [fdo#105363]
* igt@kms_flip@plain-flip-fb-recreate-interruptible:
- shard-skl: PASS -> FAIL [fdo#100368]
* igt@kms_flip_tiling@flip-changes-tiling-y:
- shard-skl: PASS -> FAIL [fdo#107931] / [fdo#108303]
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-wc:
- shard-skl: PASS -> FAIL [fdo#105682] +1
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-cpu:
- shard-apl: PASS -> FAIL [fdo#103167] +1
* igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-cpu:
- shard-glk: PASS -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt:
- {shard-iclb}: PASS -> FAIL [fdo#103167] +4
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move:
- {shard-iclb}: NOTRUN -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt:
- shard-skl: PASS -> FAIL [fdo#103167] +1
* igt@kms_plane@pixel-format-pipe-a-planes:
- shard-skl: NOTRUN -> DMESG-WARN [fdo#106885]
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: PASS -> FAIL [fdo#107815]
* igt@kms_plane_multiple@atomic-pipe-c-tiling-x:
- shard-glk: PASS -> FAIL [fdo#103166] +1
* igt@kms_plane_multiple@atomic-pipe-c-tiling-y:
- {shard-iclb}: NOTRUN -> FAIL [fdo#103166]
* igt@kms_rotation_crc@primary-rotation-180:
- shard-skl: PASS -> FAIL [fdo#103925] / [fdo#107815]
* igt@perf@polling:
- shard-hsw: PASS -> FAIL [fdo#102252]
* igt@pm_rpm@gem-pread:
- shard-skl: NOTRUN -> INCOMPLETE [fdo#107807]
* igt@pm_rpm@legacy-planes-dpms:
- shard-skl: PASS -> INCOMPLETE [fdo#105959] / [fdo#107807]
* igt@pm_rpm@modeset-non-lpsp-stress:
- shard-skl: SKIP -> INCOMPLETE [fdo#107807]
* igt@pm_rpm@universal-planes:
- shard-skl: PASS -> INCOMPLETE [fdo#107807] +1
Possible fixes
* igt@gem_ctx_isolation@rcs0-s3:
- shard-snb: DMESG-WARN [fdo#102365] -> PASS
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c:
- shard-kbl: DMESG-WARN [fdo#107956] -> PASS
* igt@kms_cursor_crc@cursor-256x256-dpms:
- shard-apl: FAIL [fdo#103232] -> PASS +1
* igt@kms_cursor_crc@cursor-64x64-onscreen:
- shard-glk: FAIL [fdo#103232] -> PASS
*
Re: [Intel-gfx] [PATCH] i915/dp/fec: Fix static check warning
Quoting Anusha (2018-11-30 23:14:28)
> From: Anusha Srivatsa
>
> Fix indentation error in the commit:
> commit 08cadae8e157 ("i915/dp/fec: Cache the FEC_CAPABLE DPCD register")
>
> Fixes: 08cadae8e157 ("i915/dp/fec: Cache the FEC_CAPABLE DPCD register")
> Reported-by: Dan Carpenter
> Cc: Rodrigo Vivi
> Signed-off-by: Anusha Srivatsa
> ---
> drivers/gpu/drm/i915/intel_dp.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 38a6e82153fd..8fa28342cfe3 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -4032,8 +4032,8 @@ static void intel_dp_get_dsc_sink_cap(struct intel_dp
> *intel_dp)
> _dp->fec_capable) < 0)
> DRM_ERROR("Failed to read FEC DPCD
> register\n");
>
> - DRM_DEBUG_KMS("FEC CAPABILITY: %x\n",
> - intel_dp->fec_capable);
> + DRM_DEBUG_KMS("FEC CAPABILITY: %x\n",
> + intel_dp->fec_capable);
I suggested it was useful to know !FEC CAPABILITY. If you are going to
print debug info, might as well show it all.
https://patchwork.freedesktop.org/patch/263060/
-Chris
___
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[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/icl: combo port vswing programming changes per BSPEC (rev2)
== Series Details ==
Series: drm/i915/icl: combo port vswing programming changes per BSPEC (rev2)
URL : https://patchwork.freedesktop.org/series/53340/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5237_full -> Patchwork_10987_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_10987_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10987_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_10987_full:
### IGT changes ###
Possible regressions
* igt@kms_cursor_crc@cursor-128x128-offscreen:
- shard-kbl: PASS -> FAIL
Known issues
Here are the changes found in Patchwork_10987_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_exec_schedule@pi-ringfull-bsd:
- shard-skl: NOTRUN -> FAIL [fdo#103158]
* igt@gem_ppgtt@blt-vs-render-ctx0:
- shard-skl: PASS -> TIMEOUT [fdo#108039]
* igt@i915_suspend@shrink:
- shard-hsw: NOTRUN -> DMESG-WARN [fdo#108784]
- {shard-iclb}: NOTRUN -> DMESG-WARN [fdo#108784]
* igt@kms_atomic_transition@plane-all-modeset-transition:
- shard-kbl: PASS -> DMESG-WARN [fdo#103313] / [fdo#103558] /
[fdo#105602]
* igt@kms_busy@extended-modeset-hang-newfb-render-a:
- shard-snb: PASS -> DMESG-WARN [fdo#107956]
* igt@kms_busy@extended-modeset-hang-newfb-render-b:
- shard-skl: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_cursor_crc@cursor-128x128-offscreen:
- shard-skl: PASS -> FAIL [fdo#103232]
* igt@kms_cursor_crc@cursor-64x21-sliding:
- {shard-iclb}: NOTRUN -> FAIL [fdo#103232] +2
* igt@kms_cursor_crc@cursor-size-change:
- shard-glk: PASS -> FAIL [fdo#103232] +2
* igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-untiled:
- shard-skl: PASS -> FAIL [fdo#103184]
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-cpu:
- shard-apl: PASS -> FAIL [fdo#103167] +1
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
- shard-glk: PASS -> FAIL [fdo#103167] +2
- {shard-iclb}: NOTRUN -> FAIL [fdo#103167] +2
* igt@kms_frontbuffer_tracking@fbc-stridechange:
- shard-skl: NOTRUN -> FAIL [fdo#105683]
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt:
- {shard-iclb}: PASS -> FAIL [fdo#103167] +4
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
- shard-skl: PASS -> INCOMPLETE [fdo#104108] / [fdo#107773] +1
* igt@kms_plane@pixel-format-pipe-a-planes:
- shard-skl: NOTRUN -> DMESG-WARN [fdo#106885]
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
- {shard-iclb}: PASS -> INCOMPLETE [fdo#107713]
* igt@kms_plane_multiple@atomic-pipe-b-tiling-x:
- {shard-iclb}: PASS -> FAIL [fdo#103166]
* igt@kms_plane_multiple@atomic-pipe-c-tiling-x:
- shard-apl: PASS -> FAIL [fdo#103166]
* igt@kms_plane_multiple@atomic-pipe-c-tiling-yf:
- {shard-iclb}: NOTRUN -> FAIL [fdo#103166]
* igt@kms_setmode@basic:
- shard-apl: PASS -> FAIL [fdo#99912]
* igt@kms_universal_plane@cursor-fb-leak-pipe-b:
- shard-kbl: PASS -> DMESG-WARN [fdo#103558] / [fdo#105602] +14
* igt@pm_rpm@sysfs-read:
- shard-skl: PASS -> INCOMPLETE [fdo#107807] +1
* igt@pm_rpm@system-suspend-modeset:
- {shard-iclb}: PASS -> INCOMPLETE [fdo#107713] / [fdo#108840]
Possible fixes
* igt@gem_ctx_isolation@rcs0-s3:
- shard-snb: DMESG-WARN [fdo#102365] -> PASS
* igt@kms_busy@extended-pageflip-hang-newfb-render-a:
- shard-apl: DMESG-WARN [fdo#107956] -> PASS
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
- shard-apl: FAIL [fdo#103167] -> PASS
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu:
- shard-glk: FAIL [fdo#103167] -> PASS +3
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-onoff:
- {shard-iclb}: FAIL [fdo#103167] -> PASS +2
* igt@kms_plane@plane-position-covered-pipe-c-planes:
- shard-glk: FAIL [fdo#103166] -> PASS +1
* igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl: FAIL [fdo#107815] / [fdo#108145] -> PASS
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: FAIL [fdo#107815] -> PASS
* igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
- shard-apl: FAIL [fdo#103166] -> PASS +2
* igt@kms_plane_multiple@atomic-pipe-c-tiling-x:
