Re: [Intel-gfx] [PATCH v9 12/39] drm/i915: Implement HDCP2.2 repeater authentication

2018-12-13 Thread Winkler, Tomas
> > Implements the HDCP2.2 repeaters authentication steps such as verifying the > downstream topology and sending stream management information. > > v2: Rebased. > v3: > -EINVAL is returned for topology error and rollover scenario. > Endianness conversion func from drm_hdcp.h is used [Uma] >

[Intel-gfx] [PATCH] drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen

2018-12-13 Thread Chris Wilson
Having completed a test run of gem_eio across all machines in CI we also observe the phenomenon (of lost interrupts after resetting the GPU) on gen3 machines as well as the previously sighted gen6/gen7. Let's apply the same HWSTAM workaround that was effective for gen6+ for all, as although we

Re: [Intel-gfx] 4.20.0-rc6-next-20181210, v4.20-rc1: list_del corruption on thinkpad x220, graphics related?

2018-12-13 Thread Joonas Lahtinen
Quoting Pavel Machek (2018-12-12 20:29:02) > Hi! > > > > > > > > > There's one similar for nouveau in Bugzilla, but it seems like > > > > > > > > a genuine > > > > > > > > memory corruption (1 bit flipped): > > > > > > > > > > > > > > > > https://bugs.freedesktop.org/show_bug.cgi?id=84880 > > >

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen

2018-12-13 Thread Patchwork
== Series Details == Series: drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen URL : https://patchwork.freedesktop.org/series/53979/ State : success == Summary == CI Bug Log - changes from CI_DRM_5310 -> Patchwork_11082

Re: [Intel-gfx] [PATCH] drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen

2018-12-13 Thread Tvrtko Ursulin
On 13/12/2018 08:53, Chris Wilson wrote: Having completed a test run of gem_eio across all machines in CI we also observe the phenomenon (of lost interrupts after resetting the GPU) on gen3 machines as well as the previously sighted gen6/gen7. Let's apply the same HWSTAM workaround that was

Re: [Intel-gfx] [PATCH] drivers/base: use a worker for sysfs unbind

2018-12-13 Thread Chris Wilson
Quoting Daniel Vetter (2018-12-09 17:20:02) > Drivers might want to remove some sysfs files, which needs the same > locks and ends up angering lockdep. Relevant snippet of the stack > trace: > > kernfs_remove_by_name_ns+0x3b/0x80 > bus_remove_driver+0x92/0xa0 >

Re: [Intel-gfx] [PATCH 07/19] drm/i915/icl: Mind the SFC units when resetting VD or VEBox engines

2018-12-13 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-12-13 08:20:58) > > On 12/12/2018 14:36, Tvrtko Ursulin wrote: > > > > On 12/12/2018 13:41, Chris Wilson wrote: > >> From: Oscar Mateo > >> > >> SFC (Scaler & Format Converter) units are shared between VD and VEBoxes. > >> They also happen to have separate reset

Re: [Intel-gfx] [PATCH 07/19] drm/i915/icl: Mind the SFC units when resetting VD or VEBox engines

2018-12-13 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-12-12 14:36:27) > > On 12/12/2018 13:41, Chris Wilson wrote: > > diff --git a/drivers/gpu/drm/i915/intel_uncore.c > > b/drivers/gpu/drm/i915/intel_uncore.c > > index 9289515108c3..408692b88c98 100644 > > --- a/drivers/gpu/drm/i915/intel_uncore.c > > +++

Re: [Intel-gfx] [PATCH v9 01/39] drm/i915: Gathering the HDCP1.4 routines together

2018-12-13 Thread Winkler, Tomas
> > All HDCP1.4 routines are gathered together, followed by the generic functions > those can be extended for HDCP2.2 too. > > Signed-off-by: Ramalingam C > --- > drivers/gpu/drm/i915/intel_hdcp.c | 118 +++-- > - > 1 file changed, 59 insertions(+), 59

Re: [Intel-gfx] [PATCH 04/19] drm/i915/selftests: Check we can recover a wedged device

2018-12-13 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-12-13 08:28:54) > > On 12/12/2018 13:41, Chris Wilson wrote: > > After declaring a terminally wedged device, we allow ourselves to > > recover on the next GPU reset (manually triggered), or resume. Check > > that resetting a wedged device does work. > > > >

Re: [Intel-gfx] [PATCH 07/19] drm/i915/icl: Mind the SFC units when resetting VD or VEBox engines

2018-12-13 Thread Tvrtko Ursulin
On 12/12/2018 14:36, Tvrtko Ursulin wrote: On 12/12/2018 13:41, Chris Wilson wrote: From: Oscar Mateo SFC (Scaler & Format Converter) units are shared between VD and VEBoxes. They also happen to have separate reset bits. So, whenever we want to reset one or more of the media engines, we

Re: [Intel-gfx] [PATCH 04/19] drm/i915/selftests: Check we can recover a wedged device

2018-12-13 Thread Tvrtko Ursulin
On 12/12/2018 13:41, Chris Wilson wrote: After declaring a terminally wedged device, we allow ourselves to recover on the next GPU reset (manually triggered), or resume. Check that resetting a wedged device does work. Signed-off-by: Chris Wilson Cc: Mika Kuoppala ---

Re: [Intel-gfx] [PATCH 07/19] drm/i915/icl: Mind the SFC units when resetting VD or VEBox engines

2018-12-13 Thread Tvrtko Ursulin
On 13/12/2018 08:47, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-12-13 08:20:58) On 12/12/2018 14:36, Tvrtko Ursulin wrote: On 12/12/2018 13:41, Chris Wilson wrote: From: Oscar Mateo SFC (Scaler & Format Converter) units are shared between VD and VEBoxes. They also happen to have

Re: [Intel-gfx] [PATCH 04/19] drm/i915/selftests: Check we can recover a wedged device

2018-12-13 Thread Tvrtko Ursulin
On 12/12/2018 13:41, Chris Wilson wrote: After declaring a terminally wedged device, we allow ourselves to recover on the next GPU reset (manually triggered), or resume. Check that resetting a wedged device does work. Signed-off-by: Chris Wilson Cc: Mika Kuoppala ---

Re: [Intel-gfx] [PATCH 05/19] drm/i915/selftests: Verify we can perform resets from atomic context

2018-12-13 Thread Tvrtko Ursulin
On 12/12/2018 13:41, Chris Wilson wrote: We currently require that our per-engine reset can be called from any context, even hardirq, and in the future wish to perform the device reset without holding struct_mutex (which requires some lockless shenanigans that demand the lowlevel

Re: [Intel-gfx] [PATCH 05/19] drm/i915/selftests: Verify we can perform resets from atomic context

2018-12-13 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-12-13 08:28:00) > > On 12/12/2018 13:41, Chris Wilson wrote: > > +static int igt_atomic_reset(void *arg) > > +{ > > + static const struct atomic_section phases[] = { > > + { "preempt", __preempt_begin, __preempt_end }, > > + { "softirq",

[Intel-gfx] [CI 2/4] drm/i915/selftests: Verify we can perform resets from atomic context

2018-12-13 Thread Chris Wilson
We currently require that our per-engine reset can be called from any context, even hardirq, and in the future wish to perform the device reset without holding struct_mutex (which requires some lockless shenanigans that demand the lowlevel intel_reset_gpu() be able to be used in atomic context).

[Intel-gfx] [CI 1/4] drm/i915/selftests: Check we can recover a wedged device

2018-12-13 Thread Chris Wilson
After declaring a terminally wedged device, we allow ourselves to recover on the next GPU reset (manually triggered), or resume. Check that resetting a wedged device does work. v2: Add rpm (taken explicitly in the subtest in case we remove the outer wakeref) and early warning to i915_reset() for

[Intel-gfx] [CI 4/4] drm/i915/icl: Mind the SFC units when resetting VD or VEBox engines

2018-12-13 Thread Chris Wilson
From: Oscar Mateo SFC (Scaler & Format Converter) units are shared between VD and VEBoxes. They also happen to have separate reset bits. So, whenever we want to reset one or more of the media engines, we have to make sure the SFCs do not change owner in the process and, if this owner happens to

[Intel-gfx] [CI 3/4] drm/i915/icl: Record the valid VDBoxes with SFC capability

2018-12-13 Thread Chris Wilson
From: Oscar Mateo In Gen11, only even numbered "logical" VDBoxes are hooked up to an SFC (Scaler & Format Converter) unit. We will use this information to decide when the SFC units need to be reset. BSpec: 20189 Signed-off-by: Tomasz Lis Signed-off-by: Oscar Mateo Signed-off-by: Michel

Re: [Intel-gfx] [PATCH i-g-t 3/4] tests/gem_media_vme: Simple test to exercise the VME block

2018-12-13 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-11-13 14:36:28) > +igt_vme_func_t igt_get_media_vme_func(int devid) > +{ > + igt_vme_func_t fill = NULL; > + > + if (IS_GEN9(devid) || IS_GEN10(devid) || IS_GEN11(devid)) > + fill = gen11_media_vme_func; gen11_media_vme_func implies that this

Re: [Intel-gfx] [PATCH v2] drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen

2018-12-13 Thread Chris Wilson
Quoting Chris Wilson (2018-12-13 12:07:35) > Quoting Ville Syrjälä (2018-12-13 11:59:28) > > On Thu, Dec 13, 2018 at 11:01:05AM +, Chris Wilson wrote: > > > Having completed a test run of gem_eio across all machines in CI we also > > > observe the phenomenon (of lost interrupts after resetting

Re: [Intel-gfx] [PATCH 06/10] drm/syncobj: use the timeline point in drm_syncobj_find_fence v3

2018-12-13 Thread Chris Wilson
Quoting Koenig, Christian (2018-12-13 12:11:10) > Am 13.12.18 um 12:37 schrieb Chris Wilson: > > Quoting Chunming Zhou (2018-12-11 10:34:45) > >> From: Christian König > >> > >> Implement finding the right timeline point in drm_syncobj_find_fence. > >> > >> v2: return -EINVAL when the point is

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/4] drm/i915/selftests: Check we can recover a wedged device

2018-12-13 Thread Patchwork
== Series Details == Series: series starting with [CI,1/4] drm/i915/selftests: Check we can recover a wedged device URL : https://patchwork.freedesktop.org/series/53980/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5310 -> Patchwork_11083

[Intel-gfx] [PATCH v2] drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen

2018-12-13 Thread Chris Wilson
Having completed a test run of gem_eio across all machines in CI we also observe the phenomenon (of lost interrupts after resetting the GPU) on gen3 machines as well as the previously sighted gen6/gen7. Let's apply the same HWSTAM workaround that was effective for gen6+ for all, as although we

Re: [Intel-gfx] [PATCH v9 12/39] drm/i915: Implement HDCP2.2 repeater authentication

2018-12-13 Thread C, Ramalingam
On 12/13/2018 1:52 PM, Winkler, Tomas wrote: Implements the HDCP2.2 repeaters authentication steps such as verifying the downstream topology and sending stream management information. v2: Rebased. v3: -EINVAL is returned for topology error and rollover scenario. Endianness conversion

Re: [Intel-gfx] [PATCH v2] drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen

2018-12-13 Thread Chris Wilson
Quoting Ville Syrjälä (2018-12-13 11:59:28) > On Thu, Dec 13, 2018 at 11:01:05AM +, Chris Wilson wrote: > > Having completed a test run of gem_eio across all machines in CI we also > > observe the phenomenon (of lost interrupts after resetting the GPU) on > > gen3 machines as well as the

[Intel-gfx] [PATCH i-g-t] igt/amdgpu_amd_prime: Bail if we fail to create more contexts

2018-12-13 Thread Chris Wilson
amdgpu has started to report out of space after creating a few contexts. This is not the scope of this test as here we just verifying that fences created in amd can be imported and used for synchronisation by i915 and for that we just need at least one context created! References:

Re: [Intel-gfx] [PATCH v3 2/3] ACPI / PMIC: Implement exec_mipi_pmic_seq_element for CHT Whiskey Cove PMIC

2018-12-13 Thread Ville Syrjälä
On Thu, Dec 13, 2018 at 12:21:35PM +0100, Hans de Goede wrote: > Implement the exec_mipi_pmic_seq_element callback for the CHT Whiskey Cove > PMIC. > > On some CHT devices this fixes the LCD panel not lighting up when it was > not initialized by the GOP, because an external monitor was plugged in

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen

2018-12-13 Thread Patchwork
== Series Details == Series: drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen URL : https://patchwork.freedesktop.org/series/53979/ State : success == Summary == CI Bug Log - changes from CI_DRM_5310_full -> Patchwork_11082_full

Re: [Intel-gfx] [PATCH v9 01/39] drm/i915: Gathering the HDCP1.4 routines together

2018-12-13 Thread C, Ramalingam
On 12/13/2018 1:47 PM, Winkler, Tomas wrote: All HDCP1.4 routines are gathered together, followed by the generic functions those can be extended for HDCP2.2 too. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/intel_hdcp.c | 118 +++-- - 1 file

[Intel-gfx] [PATCH v3 1/3] ACPI / PMIC: Add support for executing PMIC MIPI sequence elements

2018-12-13 Thread Hans de Goede
DSI LCD panels describe an initialization sequence in the Video BIOS Tables using so called MIPI sequences. One possible element in these sequences is a PMIC specific element of 15 bytes. Although this is not really an ACPI opregion, the ACPI opregion code is the closest thing we have. We need to

[Intel-gfx] [PATCH v3 3/3] drm/i915/intel_dsi_vbt: Add support for PMIC MIPI sequences

2018-12-13 Thread Hans de Goede
Add support for PMIC MIPI sequences using the new intel_soc_pmic_exec_mipi_pmic_seq_element function. This fixes the DSI LCD panel not lighting up when not initialized by the GOP (because an external monitor was connected) on GPD win and GPD pocket devices. Specifically the LCD panel seems to

[Intel-gfx] [PATCH v3 2/3] ACPI / PMIC: Implement exec_mipi_pmic_seq_element for CHT Whiskey Cove PMIC

2018-12-13 Thread Hans de Goede
Implement the exec_mipi_pmic_seq_element callback for the CHT Whiskey Cove PMIC. On some CHT devices this fixes the LCD panel not lighting up when it was not initialized by the GOP, because an external monitor was plugged in and the GOP initialized only the external monitor. Signed-off-by: Hans

Re: [Intel-gfx] [PATCH v2] drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen

2018-12-13 Thread Ville Syrjälä
On Thu, Dec 13, 2018 at 11:01:05AM +, Chris Wilson wrote: > Having completed a test run of gem_eio across all machines in CI we also > observe the phenomenon (of lost interrupts after resetting the GPU) on > gen3 machines as well as the previously sighted gen6/gen7. Let's apply > the same

[Intel-gfx] [PATCH i-g-t 1/4] headers: bump

2018-12-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin --- include/drm-uapi/drm_mode.h | 19 include/drm-uapi/i915_drm.h | 43 + include/drm-uapi/msm_drm.h | 25 +++-- include/drm-uapi/v3d_drm.h | 33 4 files changed, 114

[Intel-gfx] [PATCH i-g-t 3/4] tests/gem_media_vme: Simple test to exercise the VME block

2018-12-13 Thread Tvrtko Ursulin
From: Tony Ye Simple test which exercises the VME fixed function block. v2: (Tvrtko Ursulin) * Small cleanups like copyright date, tabs, remove unused bits. v3: (Tony Ye) * Added curbe data entry for dst surface. * Read the dst surface after the VME kernel being executed. v4: (Tony Ye) *

[Intel-gfx] [PATCH i-g-t 2/4] tests/gem_ctx_sseu: Dynamic (sub)slice programming tests

2018-12-13 Thread Tvrtko Ursulin
From: Lionel Landwerlin Verify that the per-context dynamic SSEU uAPI works as expected. v2: Add subslice tests (Lionel) Use MI_SET_PREDICATE for further verification when available (Lionel) v3: Rename to gem_ctx_rpcs (Lionel) v4: Update kernel API (Lionel) Add 0 value test (Lionel)

[Intel-gfx] [PATCH i-g-t 4/4] tests/gem_media_vme: Shut down half of subslices to avoid gpu hang on ICL

2018-12-13 Thread Tvrtko Ursulin
From: Tony Ye On Icelake we need to turn off subslices not containing the VME block or the VME kernel will hang. v2: (Tvrtko Ursulin) * Remove libdrm usage for setting context param. * Cleanup bitmask operation. * Only apply the workaround for ICL. v3: (Tvrtko Ursulin) * Added hang

[Intel-gfx] [PATCH i-g-t 0/4] Per context dynamic (sub)slice power-gating

2018-12-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Tests to accompany the respective i915 series. Contributed by Tony Ye is a new test, gem_media_vme, which exercises the media VME block to demonstrate the effectiveness of the uAPI for this particular issue. New in this version is the source code for the VME kernel and

Re: [Intel-gfx] [PATCH 06/10] drm/syncobj: use the timeline point in drm_syncobj_find_fence v3

2018-12-13 Thread Koenig, Christian
Am 13.12.18 um 12:37 schrieb Chris Wilson: > Quoting Chunming Zhou (2018-12-11 10:34:45) >> From: Christian König >> >> Implement finding the right timeline point in drm_syncobj_find_fence. >> >> v2: return -EINVAL when the point is not submitted yet. >> v3: fix reference counting bug, add flags

[Intel-gfx] [PATCH v3] drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen

2018-12-13 Thread Chris Wilson
Having completed a test run of gem_eio across all machines in CI we also observe the phenomenon (of lost interrupts after resetting the GPU) on gen3 machines as well as the previously sighted gen6/gen7. Let's apply the same HWSTAM workaround that was effective for gen6+ for all, as although we

Re: [Intel-gfx] [PATCH 01/10] dma-buf: add new dma_fence_chain container v4

2018-12-13 Thread Chris Wilson
Quoting Chunming Zhou (2018-12-11 10:34:40) > From: Christian König > > Lockless container implementation similar to a dma_fence_array, but with > only two elements per node and automatic garbage collection. > > v2: properly document dma_fence_chain_for_each, add > dma_fence_chain_find_seqno,

Re: [Intel-gfx] [PATCH 06/10] drm/syncobj: use the timeline point in drm_syncobj_find_fence v3

2018-12-13 Thread Chris Wilson
Quoting Chunming Zhou (2018-12-11 10:34:45) > From: Christian König > > Implement finding the right timeline point in drm_syncobj_find_fence. > > v2: return -EINVAL when the point is not submitted yet. > v3: fix reference counting bug, add flags handling as well > > Signed-off-by: Christian

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen (rev2)

2018-12-13 Thread Patchwork
== Series Details == Series: drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen (rev2) URL : https://patchwork.freedesktop.org/series/53979/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5311 -> Patchwork_11084

Re: [Intel-gfx] [PATCH 06/10] drm/syncobj: use the timeline point in drm_syncobj_find_fence v3

2018-12-13 Thread Koenig, Christian
Am 13.12.18 um 13:21 schrieb Chris Wilson: > Quoting Koenig, Christian (2018-12-13 12:11:10) >> Am 13.12.18 um 12:37 schrieb Chris Wilson: >>> Quoting Chunming Zhou (2018-12-11 10:34:45) From: Christian König Implement finding the right timeline point in drm_syncobj_find_fence.

Re: [Intel-gfx] [PATCH v2] drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen

2018-12-13 Thread Chris Wilson
Quoting Ville Syrjälä (2018-12-13 12:29:15) > On Thu, Dec 13, 2018 at 12:07:35PM +, Chris Wilson wrote: > > Quoting Ville Syrjälä (2018-12-13 11:59:28) > > > On Thu, Dec 13, 2018 at 11:01:05AM +, Chris Wilson wrote: > > > > Having completed a test run of gem_eio across all machines in CI

Re: [Intel-gfx] [PATCH v9 35/39] misc/mei/hdcp: Component framework for I915 Interface

2018-12-13 Thread C, Ramalingam
Tomas and Daniel, We got an issue here. The relationship that we try to build between I915 and mei_hdcp is as follows: * We are using the components to establish the relationship. * I915 is component master where as mei_hdcp is component. * I915 adds the component master during the module

Re: [Intel-gfx] [PATCH v3 2/3] ACPI / PMIC: Implement exec_mipi_pmic_seq_element for CHT Whiskey Cove PMIC

2018-12-13 Thread Ville Syrjälä
On Thu, Dec 13, 2018 at 01:40:27PM +0100, Hans de Goede wrote: > Hi, > > On 13-12-18 13:14, Ville Syrjälä wrote: > > On Thu, Dec 13, 2018 at 12:21:35PM +0100, Hans de Goede wrote: > >> Implement the exec_mipi_pmic_seq_element callback for the CHT Whiskey Cove > >> PMIC. > >> > >> On some CHT

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen (rev5)

2018-12-13 Thread Patchwork
== Series Details == Series: drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen (rev5) URL : https://patchwork.freedesktop.org/series/53979/ State : success == Summary == CI Bug Log - changes from CI_DRM_5311 -> Patchwork_11086

Re: [Intel-gfx] [PATCH v6 2/2] drm/i915/icl: Define MOCS table for Icelake

2018-12-13 Thread Joonas Lahtinen
Quoting Tvrtko Ursulin (2018-12-10 17:17:29) > > On 07/11/2018 15:16, Tomasz Lis wrote: > > The table has been unified across OSes to minimize virtualization overhead. > > > > The MOCS table is now published as part of bspec, and versioned. Entries > > are supposed to never be modified, but new

[Intel-gfx] [PATCH] drm/i915/opregion: rvda is relative from opregion base, not absolute

2018-12-13 Thread Jani Nikula
We've supported the opregion RVDA/RVDS fields for VBT size >= 6 KB since commit 04ebaadb9f2d ("drm/i915/opregion: handle VBT sizes bigger than 6 KB"). That's three years, almost to the date. The implementation was based on spec only, in anticipation of systems with big VBT. Now, the spec has been

Re: [Intel-gfx] [PATCH v3 3/3] drm/i915/intel_dsi_vbt: Add support for PMIC MIPI sequences

2018-12-13 Thread Jani Nikula
On Thu, 13 Dec 2018, Hans de Goede wrote: > Add support for PMIC MIPI sequences using the new > intel_soc_pmic_exec_mipi_pmic_seq_element function. > > This fixes the DSI LCD panel not lighting up when not initialized by the > GOP (because an external monitor was connected) on GPD win and GPD

Re: [Intel-gfx] [PATCH v2] drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen

2018-12-13 Thread Ville Syrjälä
On Thu, Dec 13, 2018 at 12:34:02PM +, Chris Wilson wrote: > Quoting Ville Syrjälä (2018-12-13 12:29:15) > > On Thu, Dec 13, 2018 at 12:07:35PM +, Chris Wilson wrote: > > > Quoting Ville Syrjälä (2018-12-13 11:59:28) > > > > On Thu, Dec 13, 2018 at 11:01:05AM +, Chris Wilson wrote: > >

Re: [Intel-gfx] [PATCH v3 1/3] ACPI / PMIC: Add support for executing PMIC MIPI sequence elements

2018-12-13 Thread Hans de Goede
HI, On 13-12-18 14:45, Jani Nikula wrote: On Thu, 13 Dec 2018, Hans de Goede wrote: DSI LCD panels describe an initialization sequence in the Video BIOS Tables using so called MIPI sequences. One possible element in these sequences is a PMIC specific element of 15 bytes. Although this is not

[Intel-gfx] [PATCH v4] drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen

2018-12-13 Thread Chris Wilson
Having completed a test run of gem_eio across all machines in CI we also observe the phenomenon (of lost interrupts after resetting the GPU) on gen3 machines as well as the previously sighted gen6/gen7. Let's apply the same HWSTAM workaround that was effective for gen6+ for all, as although we

Re: [Intel-gfx] [PATCH v3 2/3] ACPI / PMIC: Implement exec_mipi_pmic_seq_element for CHT Whiskey Cove PMIC

2018-12-13 Thread Hans de Goede
Hi, On 13-12-18 13:14, Ville Syrjälä wrote: On Thu, Dec 13, 2018 at 12:21:35PM +0100, Hans de Goede wrote: Implement the exec_mipi_pmic_seq_element callback for the CHT Whiskey Cove PMIC. On some CHT devices this fixes the LCD panel not lighting up when it was not initialized by the GOP,

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v3,1/3] ACPI / PMIC: Add support for executing PMIC MIPI sequence elements

2018-12-13 Thread Patchwork
== Series Details == Series: series starting with [v3,1/3] ACPI / PMIC: Add support for executing PMIC MIPI sequence elements URL : https://patchwork.freedesktop.org/series/53986/ State : success == Summary == CI Bug Log - changes from CI_DRM_5311_full -> Patchwork_11085_full

Re: [Intel-gfx] [PATCH 7/7] drm/i915/psr: Disable DRRS if enabled when enabling PSR from debugfs

2018-12-13 Thread Souza, Jose
On Wed, 2018-12-12 at 17:11 -0800, Dhinakaran Pandiyan wrote: > On Wed, 2018-12-12 at 05:02 -0800, Souza, Jose wrote: > > On Tue, 2018-12-11 at 14:02 -0800, Dhinakaran Pandiyan wrote: > > > On Mon, 2018-11-12 at 11:17 +0100, Maarten Lankhorst wrote: > > > > Op 09-11-18 om 21:20 schreef José

Re: [Intel-gfx] [PATCH i-g-t 4/4] tests/gem_media_vme: Shut down half of subslices to avoid gpu hang on ICL

2018-12-13 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-12-13 12:06:36) > +static void shut_non_vme_subslices(int drm_fd, uint32_t ctx) > +{ > + struct drm_i915_gem_context_param_sseu sseu = { }; > + struct drm_i915_gem_context_param arg = { > + .param = I915_CONTEXT_PARAM_SSEU, > +

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/3] ACPI / PMIC: Add support for executing PMIC MIPI sequence elements

2018-12-13 Thread Patchwork
== Series Details == Series: series starting with [v3,1/3] ACPI / PMIC: Add support for executing PMIC MIPI sequence elements URL : https://patchwork.freedesktop.org/series/53986/ State : success == Summary == CI Bug Log - changes from CI_DRM_5311 -> Patchwork_11085

Re: [Intel-gfx] [PATCH v2] drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen

2018-12-13 Thread Ville Syrjälä
On Thu, Dec 13, 2018 at 12:07:35PM +, Chris Wilson wrote: > Quoting Ville Syrjälä (2018-12-13 11:59:28) > > On Thu, Dec 13, 2018 at 11:01:05AM +, Chris Wilson wrote: > > > Having completed a test run of gem_eio across all machines in CI we also > > > observe the phenomenon (of lost

[Intel-gfx] [PATCH v5] drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen

2018-12-13 Thread Chris Wilson
Having completed a test run of gem_eio across all machines in CI we also observe the phenomenon (of lost interrupts after resetting the GPU) on gen3 machines as well as the previously sighted gen6/gen7. Let's apply the same HWSTAM workaround that was effective for gen6+ for all, as although we

Re: [Intel-gfx] [PATCH v3 1/3] ACPI / PMIC: Add support for executing PMIC MIPI sequence elements

2018-12-13 Thread Jani Nikula
On Thu, 13 Dec 2018, Hans de Goede wrote: > DSI LCD panels describe an initialization sequence in the Video BIOS > Tables using so called MIPI sequences. One possible element in these > sequences is a PMIC specific element of 15 bytes. > > Although this is not really an ACPI opregion, the ACPI

Re: [Intel-gfx] [PATCH v3 2/3] ACPI / PMIC: Implement exec_mipi_pmic_seq_element for CHT Whiskey Cove PMIC

2018-12-13 Thread Jani Nikula
On Thu, 13 Dec 2018, Ville Syrjälä wrote: > On Thu, Dec 13, 2018 at 01:40:27PM +0100, Hans de Goede wrote: >> Hi, >> >> On 13-12-18 13:14, Ville Syrjälä wrote: >> > On Thu, Dec 13, 2018 at 12:21:35PM +0100, Hans de Goede wrote: >> >> Implement the exec_mipi_pmic_seq_element callback for the CHT

Re: [Intel-gfx] [PATCH] drm/i915/opregion: rvda is relative from opregion base, not absolute

2018-12-13 Thread Jani Nikula
On Thu, 13 Dec 2018, Jani Nikula wrote: > We've supported the opregion RVDA/RVDS fields for VBT size >= 6 KB since > commit 04ebaadb9f2d ("drm/i915/opregion: handle VBT sizes bigger than 6 > KB"). That's three years, almost to the date. > > The implementation was based on spec only, in

Re: [Intel-gfx] [PATCH v3 2/3] ACPI / PMIC: Implement exec_mipi_pmic_seq_element for CHT Whiskey Cove PMIC

2018-12-13 Thread Hans de Goede
Hi, On 13-12-18 14:08, Ville Syrjälä wrote: On Thu, Dec 13, 2018 at 01:40:27PM +0100, Hans de Goede wrote: Hi, On 13-12-18 13:14, Ville Syrjälä wrote: +static int intel_cht_wc_exec_mipi_pmic_seq_element(struct regmap *regmap, + const u8

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen (rev6)

2018-12-13 Thread Patchwork
== Series Details == Series: drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen (rev6) URL : https://patchwork.freedesktop.org/series/53979/ State : success == Summary == CI Bug Log - changes from CI_DRM_5311 -> Patchwork_11087

[Intel-gfx] [PATCH v4 3/3] drm/i915/intel_dsi_vbt: Add support for PMIC MIPI sequences

2018-12-13 Thread Hans de Goede
Add support for PMIC MIPI sequences using the new intel_soc_pmic_exec_mipi_pmic_seq_element function. This fixes the DSI LCD panel not lighting up when not initialized by the GOP (because an external monitor was connected) on GPD win and GPD pocket devices. Specifically the LCD panel seems to

[Intel-gfx] [PATCH v4 1/3] ACPI / PMIC: Add support for executing PMIC MIPI sequence elements

2018-12-13 Thread Hans de Goede
DSI LCD panels describe an initialization sequence in the Video BIOS Tables using so called MIPI sequences. One possible element in these sequences is a PMIC specific element of 15 bytes. Although this is not really an ACPI opregion, the ACPI opregion code is the closest thing we have. We need to

[Intel-gfx] [PATCH v4 2/3] ACPI / PMIC: Implement exec_mipi_pmic_seq_element for CHT Whiskey Cove PMIC

2018-12-13 Thread Hans de Goede
Implement the exec_mipi_pmic_seq_element callback for the CHT Whiskey Cove PMIC. On some CHT devices this fixes the LCD panel not lighting up when it was not initialized by the GOP, because an external monitor was plugged in and the GOP initialized only the external monitor. Signed-off-by: Hans

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] igt/amdgpu_amd_prime: Bail if we fail to create more contexts

2018-12-13 Thread Chris Wilson
Quoting Chris Wilson (2018-12-13 15:36:43) > Quoting Antonio Argenziano (2018-12-13 15:28:00) > > > > > > On 13/12/18 03:57, Chris Wilson wrote: > > > amdgpu has started to report out of space after creating a few contexts. > > > This is not the scope of this test as here we just verifying that

Re: [Intel-gfx] [PATCH 06/10] drm/syncobj: use the timeline point in drm_syncobj_find_fence v3

2018-12-13 Thread Daniel Vetter
On Thu, Dec 13, 2018 at 12:24:57PM +, Koenig, Christian wrote: > Am 13.12.18 um 13:21 schrieb Chris Wilson: > > Quoting Koenig, Christian (2018-12-13 12:11:10) > >> Am 13.12.18 um 12:37 schrieb Chris Wilson: > >>> Quoting Chunming Zhou (2018-12-11 10:34:45) > From: Christian König >

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/opregion: rvda is relative from opregion base, not absolute

2018-12-13 Thread Patchwork
== Series Details == Series: drm/i915/opregion: rvda is relative from opregion base, not absolute URL : https://patchwork.freedesktop.org/series/53996/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5311 -> Patchwork_11088

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] igt/amdgpu_amd_prime: Bail if we fail to create more contexts

2018-12-13 Thread Antonio Argenziano
On 13/12/18 03:57, Chris Wilson wrote: amdgpu has started to report out of space after creating a few contexts. This is not the scope of this test as here we just verifying that fences created in amd can be imported and used for synchronisation by i915 and for that we just need at least one

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] igt/amdgpu_amd_prime: Bail if we fail to create more contexts

2018-12-13 Thread Chris Wilson
Quoting Antonio Argenziano (2018-12-13 15:28:00) > > > On 13/12/18 03:57, Chris Wilson wrote: > > amdgpu has started to report out of space after creating a few contexts. > > This is not the scope of this test as here we just verifying that fences > > created in amd can be imported and used for

Re: [Intel-gfx] [PATCH i-g-t] igt/amdgpu_amd_prime: Bail if we fail to create more contexts

2018-12-13 Thread Alex Deucher
On Thu, Dec 13, 2018 at 6:57 AM Chris Wilson wrote: > > amdgpu has started to report out of space after creating a few contexts. > This is not the scope of this test as here we just verifying that fences > created in amd can be imported and used for synchronisation by i915 and > for that we just

Re: [Intel-gfx] [PATCH v9 35/39] misc/mei/hdcp: Component framework for I915 Interface

2018-12-13 Thread Daniel Vetter
On Thu, Dec 13, 2018 at 1:36 PM C, Ramalingam wrote: > > Tomas and Daniel, > > We got an issue here. > > The relationship that we try to build between I915 and mei_hdcp is as follows: > > We are using the components to establish the relationship. > I915 is component master where as mei_hdcp is

Re: [Intel-gfx] [PATCH v2] drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen

2018-12-13 Thread Chris Wilson
Quoting Ville Syrjälä (2018-12-13 12:45:00) > On Thu, Dec 13, 2018 at 12:34:02PM +, Chris Wilson wrote: > > Quoting Ville Syrjälä (2018-12-13 12:29:15) > > > On Thu, Dec 13, 2018 at 12:07:35PM +, Chris Wilson wrote: > > > > Quoting Ville Syrjälä (2018-12-13 11:59:28) > > > > > On Thu, Dec

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v4,1/3] ACPI / PMIC: Add support for executing PMIC MIPI sequence elements

2018-12-13 Thread Patchwork
== Series Details == Series: series starting with [v4,1/3] ACPI / PMIC: Add support for executing PMIC MIPI sequence elements URL : https://patchwork.freedesktop.org/series/54003/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5311 -> Patchwork_11089

[Intel-gfx] [PATCH] drm/i915: Fix Cherryview oops on boot

2018-12-13 Thread Chris Wilson
Do not dereference the LUT blob before checking whether that blob exists. Or else, <1>[ 13.978684] BUG: unable to handle kernel NULL pointer dereference at 0048 <6>[ 13.978718] PGD 0 P4D 0 <4>[ 13.978733] Oops: [#1] PREEMPT SMP PTI <4>[ 13.978750] CPU: 0 PID: 282 Comm:

Re: [Intel-gfx] [PATCH] drm/i915: Fix Cherryview oops on boot

2018-12-13 Thread Matt Roper
On Thu, Dec 13, 2018 at 04:12:41PM +, Chris Wilson wrote: > Do not dereference the LUT blob before checking whether that blob > exists. Or else, > > <1>[ 13.978684] BUG: unable to handle kernel NULL pointer dereference at > 0048 > <6>[ 13.978718] PGD 0 P4D 0 > <4>[

Re: [Intel-gfx] [PATCH 3/3] drm/i915/icl: Fix TypeC legacy DP HPD handling

2018-12-13 Thread Rodrigo Vivi
On Thu, Dec 13, 2018 at 09:48:50PM +0200, Imre Deak wrote: > TypeC legacy DP ports can't be implied the same way we implied TypeC > legacy HDMI ports in the previous patch. So that we still have > functioning DP legacy ports, mark them as legacy at the first connect > event. After that we treat

[Intel-gfx] [PATCH v2 1/2] drm: Add color management LUT validation helper (v2)

2018-12-13 Thread Matt Roper
Some hardware may place additional restrictions on the gamma/degamma curves described by our LUT properties. E.g., that a gamma curve never decreases or that the red/green/blue channels of a LUT's entries must be equal. Let's add a helper function that drivers can use to test that a

[Intel-gfx] [PATCH v2 2/2] drm/i915: Validate userspace-provided color management LUT's (v2)

2018-12-13 Thread Matt Roper
We currently program userspace-provided gamma and degamma LUT's into our hardware without really checking to see whether they satisfy our hardware's rules. We should try to catch tables that are invalid for our hardware early and reject the atomic transaction. All of our platforms that accept a

[Intel-gfx] [PATCH v2 0/2] Add gamma/degamma LUT validation helper

2018-12-13 Thread Matt Roper
Previous version of this series was here: https://lists.freedesktop.org/archives/dri-devel/2018-December/200178.html Gamma and degamma LUT's uploaded by userspace need to be checked to ensure they're valid tables and that they meet any additional constraints of a given platform's hardware.

[Intel-gfx] [PATCH 2/3] drm/i915/icl: Fix TypeC legacy HDMI HPD handling

2018-12-13 Thread Imre Deak
Atm HPD disconnect events on TypeC ports will break things, since we'll switch the TypeC mode (between Legacy and disconnected modes as well as among USB DP alternate, Thunderbolt alternate and disconnected modes) on the fly from the HPD disconnect interrupt work while the port may be still

[Intel-gfx] [PATCH 3/3] drm/i915/icl: Fix TypeC legacy DP HPD handling

2018-12-13 Thread Imre Deak
TypeC legacy DP ports can't be implied the same way we implied TypeC legacy HDMI ports in the previous patch. So that we still have functioning DP legacy ports, mark them as legacy at the first connect event. After that we treat the port the same way as in the HDMI case, that is keep it in legacy

[Intel-gfx] [PATCH 1/3] drm/i915/icl: Add a debug print for TypeC port disconnection

2018-12-13 Thread Imre Deak
It's useful to see at which point a TypeC port gets disconnected, so add add a debug print for it. Cc: Paulo Zanoni Cc: Ville Syrjälä Cc: José Roberto de Souza Cc: Rodrigo Vivi Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/intel_dp.c | 34 -- 1 file

[Intel-gfx] [PATCH 0/3] drm/i915/icl: Fix TypeC legacy HPD handling

2018-12-13 Thread Imre Deak
This patchset fixes the HPD handling for TypeC legacy ports. It depends on an indirect detection method described in patch 2 and 3, which will be replaced by a direct method once the BIOS/HW/FW team delivers a promised SW/HW flag for this purpose. There is no issue with the indirect method I know

Re: [Intel-gfx] [PATCH 2/3] drm/i915/icl: Fix TypeC legacy HDMI HPD handling

2018-12-13 Thread Imre Deak
On Thu, Dec 13, 2018 at 01:06:51PM -0800, Rodrigo Vivi wrote: > On Thu, Dec 13, 2018 at 09:48:49PM +0200, Imre Deak wrote: > > Atm HPD disconnect events on TypeC ports will break things, since we'll > > switch the TypeC mode (between Legacy and disconnected modes as well as > > among USB DP

Re: [Intel-gfx] [PATCH 2/3] drm/i915/icl: Fix TypeC legacy HDMI HPD handling

2018-12-13 Thread Rodrigo Vivi
On Thu, Dec 13, 2018 at 09:48:49PM +0200, Imre Deak wrote: > Atm HPD disconnect events on TypeC ports will break things, since we'll > switch the TypeC mode (between Legacy and disconnected modes as well as > among USB DP alternate, Thunderbolt alternate and disconnected modes) on > the fly from

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add gamma/degamma LUT validation helper

2018-12-13 Thread Patchwork
== Series Details == Series: Add gamma/degamma LUT validation helper URL : https://patchwork.freedesktop.org/series/54023/ State : warning == Summary == $ dim checkpatch origin/drm-tip e8602a936ce9 drm: Add color management LUT validation helper (v2) -:57: CHECK:PARENTHESIS_ALIGNMENT:

[Intel-gfx] ✓ Fi.CI.BAT: success for Add gamma/degamma LUT validation helper

2018-12-13 Thread Patchwork
== Series Details == Series: Add gamma/degamma LUT validation helper URL : https://patchwork.freedesktop.org/series/54023/ State : success == Summary == CI Bug Log - changes from CI_DRM_5315 -> Patchwork_11092 Summary ---

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/icl: Fix TypeC legacy HPD handling

2018-12-13 Thread Patchwork
== Series Details == Series: drm/i915/icl: Fix TypeC legacy HPD handling URL : https://patchwork.freedesktop.org/series/54017/ State : warning == Summary == $ dim checkpatch origin/drm-tip 865ff59f3e7d drm/i915/icl: Add a debug print for TypeC port disconnection -:28:

Re: [Intel-gfx] [PATCH v6 2/2] drm/i915/icl: Define MOCS table for Icelake

2018-12-13 Thread Lucas De Marchi
On Thu, Dec 13, 2018 at 5:46 AM Joonas Lahtinen wrote: > > Quoting Tvrtko Ursulin (2018-12-10 17:17:29) > > > > On 07/11/2018 15:16, Tomasz Lis wrote: > > > The table has been unified across OSes to minimize virtualization > > > overhead. > > > > > > The MOCS table is now published as part of

[Intel-gfx] [WIP PATCH 15/15] drm/nouveau: Use atomic VCPI helpers for MST

2018-12-13 Thread Lyude Paul
Currently, nouveau uses the yolo method of setting up MST displays: it uses the old VCPI helpers (drm_dp_find_vcpi_slots()) for computing the display configuration. These helpers don't take care to make sure they take a reference to the mstb port that they're checking, and additionally don't

[Intel-gfx] [WIP PATCH 10/15] drm/nouveau: Stop unsetting mstc->port, use malloc refs

2018-12-13 Thread Lyude Paul
Same as we did for i915, but for nouveau this time. Additionally, we grab a malloc reference to the port that lasts for the entire lifetime of nv50_mstc, which gives us the guarantee that mstc->port will always point to valid memory for as long as the mstc stays around. Signed-off-by: Lyude Paul

[Intel-gfx] [WIP PATCH 12/15] drm/dp_mst: Add some atomic state iterator macros

2018-12-13 Thread Lyude Paul
Changes since v6: - Move EXPORT_SYMBOL() for drm_dp_mst_topology_state_funcs to this commit - Document __drm_dp_mst_state_iter_get() and note that it shouldn't be called directly Signed-off-by: Lyude Paul Reviewed-by: Daniel Vetter --- drivers/gpu/drm/drm_dp_mst_topology.c | 5 +-

[Intel-gfx] [WIP PATCH 02/15] drm/dp_mst: Refactor drm_dp_update_payload_part1()

2018-12-13 Thread Lyude Paul
There should be no functional changes here Signed-off-by: Lyude Paul Cc: Juston Li --- drivers/gpu/drm/drm_dp_mst_topology.c | 71 --- 1 file changed, 42 insertions(+), 29 deletions(-) diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c

  1   2   >