Re: [Intel-gfx] [PATCH v6 09/10] drm/i915/dsb: Enable DSB for gen12.

2019-09-12 Thread Sharma, Shashank
On 9/12/2019 12:41 AM, Animesh Manna wrote: Enabling DSB by setting 1 to has_dsb flag for gen12. Cc: Jani Nikula Cc: Rodrigo Vivi Cc: Shashank Sharma Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/i915_pci.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/dri

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Show the logical context ring state on dumping (rev2)

2019-09-12 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Show the logical context ring state on dumping (rev2) URL : https://patchwork.freedesktop.org/series/66422/ State : warning == Summary == $ dim checkpatch origin/drm-tip 4abf44a40a29 drm/i915: Show the logical context ring stat

Re: [Intel-gfx] [PATCH] Revert "drm/i915/userptr: Acquire the page lock around set_page_dirty()"

2019-09-12 Thread Tvrtko Ursulin
On 12/09/2019 13:56, Chris Wilson wrote: The userptr put_pages can be called from inside try_to_unmap, and so enters with the page lock held on one of the object's backing pages. We cannot take the page lock ourselves for fear of recursion. Reported-by: Lionel Landwerlin Reported-by: Martin W

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Show the logical context ring state on dumping (rev2)

2019-09-12 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Show the logical context ring state on dumping (rev2) URL : https://patchwork.freedesktop.org/series/66422/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6881 -> Patchwork_14377

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: convert device info num_pipes to pipe_mask (rev2)

2019-09-12 Thread Patchwork
== Series Details == Series: drm/i915: convert device info num_pipes to pipe_mask (rev2) URL : https://patchwork.freedesktop.org/series/66567/ State : success == Summary == CI Bug Log - changes from CI_DRM_6875_full -> Patchwork_14372_full

Re: [Intel-gfx] [PATCH 2/4] drm/i915/tgl: s/ss/eu fuse reading support

2019-09-12 Thread Tvrtko Ursulin
On 12/09/2019 14:38, Mika Kuoppala wrote: From: Daniele Ceraolo Spurio Gen12 has dual-subslices (DSS), which compared to gen11 subslices have some duplicated resources/paths. Although DSS behave similarly to 2 subslices, instead of splitting this and presenting userspace with bits not directly

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: Support for DP HDR outputs (rev7)

2019-09-12 Thread Patchwork
== Series Details == Series: drm/i915/dp: Support for DP HDR outputs (rev7) URL : https://patchwork.freedesktop.org/series/65656/ State : success == Summary == CI Bug Log - changes from CI_DRM_6881 -> Patchwork_14378 Summary --- **SU

Re: [Intel-gfx] [CI RESEND] drm/i915: convert device info num_pipes to pipe_mask

2019-09-12 Thread Jani Nikula
On Wed, 11 Sep 2019, Jani Nikula wrote: > Replace device info number of pipes with a bit mask of available > pipes. This will prove handy in the future. There's still a bunch of > future work to do to actually allow a non-consecutive mask of pipes, but > it's a start. No functional changes. > > Cc

[Intel-gfx] [CI RESEND] drm/i915: introduce INTEL_DISPLAY_ENABLED()

2019-09-12 Thread Jani Nikula
Prepare for making a distinction between not having display and having disabled display. Add INTEL_DISPLAY_ENABLED() and use it where HAS_DISPLAY() is used. This is initially duplication, as disabling display still leads to ->pipe_mask = 0 and HAS_DISPLAY() being false. Since INTEL_DISPLAY_ENABLED

Re: [Intel-gfx] [PATCH 2/4] drm/i915/tgl: s/ss/eu fuse reading support

2019-09-12 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-09-12 16:18:08) > > On 12/09/2019 14:38, Mika Kuoppala wrote: > > diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h > > index 469dc512cca3..30c542144016 100644 > > --- a/include/uapi/drm/i915_drm.h > > +++ b/include/uapi/drm/i915_drm.h > > @@ -2033

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Keep the engine awake while we keep for preemption

2019-09-12 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Keep the engine awake while we keep for preemption URL : https://patchwork.freedesktop.org/series/66601/ State : success == Summary == CI Bug Log - changes from CI_DRM_6881 -> Patchwork_14379

Re: [Intel-gfx] [PATCH 2/4] drm/i915/tgl: s/ss/eu fuse reading support

2019-09-12 Thread Tvrtko Ursulin
On 12/09/2019 16:35, Chris Wilson wrote: Quoting Tvrtko Ursulin (2019-09-12 16:18:08) On 12/09/2019 14:38, Mika Kuoppala wrote: diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index 469dc512cca3..30c542144016 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/d

Re: [Intel-gfx] [PATCH v7 04/11] drm: revocation check at drm subsystem

2019-09-12 Thread Harry Wentland
On 2019-09-12 2:54 a.m., Ramalingam C wrote: > On 2019-09-12 at 00:15:32 +, Harry Wentland wrote: >> Adding a couple AMD guys. >> >> I know this is already merged but I have a few questions after some >> internal discussions. >> >> On 2019-05-07 12:27 p.m., Ramalingam C wrote: >>> On every hdcp

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/4] drm/i915: Fix cdclk bypass freq readout for tgl/bxt/glk (rev2)

2019-09-12 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915: Fix cdclk bypass freq readout for tgl/bxt/glk (rev2) URL : https://patchwork.freedesktop.org/series/66537/ State : success == Summary == CI Bug Log - changes from CI_DRM_6875_full -> Patchwork_14374_full ===

Re: [Intel-gfx] [PATCH 01/23] drm/i915/dp: Fix dsc bpp calculations.

2019-09-12 Thread Maarten Lankhorst
Hey, Op 12-09-2019 om 16:34 schreef Sasha Levin: > Hi, > > [This is an automated email] > > This commit has been processed because it contains a "Fixes:" tag, > fixing commit: d9218c8f6cf4 drm/i915/dp: Add helpers for Compressed BPP and > Slice Count for DSC. > > The bot has tested the following

[Intel-gfx] [PATCH v2] drm/i915: Don't mix srcu tag and negative error codes

2019-09-12 Thread Chris Wilson
While srcu may use an integer tag, it does not exclude potential error codes and so may overlap with our own use of -EINTR. Use a separate outparam to store the tag, and report the error code separately. While changing the function signature allow the caller to choose whether or not the potential w

Re: [Intel-gfx] [PATCH 1/2] drm/connector: Share with non-atomic drivers the function to get the single encoder

2019-09-12 Thread kbuild test robot
mmits/Jos-Roberto-de-Souza/drm-connector-Share-with-non-atomic-drivers-the-function-to-get-the-single-encoder/20190912-213415 config: x86_64-randconfig-g003-201936 (attached as .config) compiler: gcc-7 (Debian 7.4.0-11) 7.4.0 reproduce: # save the attached .config to linux build tree

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pmu: Use GT parked for estimating RC6 while asleep (rev8)

2019-09-12 Thread Patchwork
== Series Details == Series: drm/i915/pmu: Use GT parked for estimating RC6 while asleep (rev8) URL : https://patchwork.freedesktop.org/series/56583/ State : success == Summary == CI Bug Log - changes from CI_DRM_6882 -> Patchwork_14380 Sum

[Intel-gfx] ✓ Fi.CI.BAT: success for Fix i915_interrupt_info debugfs with display off on VLV

2019-09-12 Thread Patchwork
== Series Details == Series: Fix i915_interrupt_info debugfs with display off on VLV URL : https://patchwork.freedesktop.org/series/66604/ State : success == Summary == CI Bug Log - changes from CI_DRM_6882 -> Patchwork_14381 Summary --

Re: [Intel-gfx] [PATCH 1/4] drm/i915/tgl: Introduce gen12 forcewake ranges

2019-09-12 Thread Daniele Ceraolo Spurio
On 9/12/19 6:38 AM, Mika Kuoppala wrote: From: Michel Thierry The media ranges extend beyond what gen11 gives so we can't piggypack on gen11 ranges, even on read side. Introduce a table for gen12 and accessors for it. v2: correctly implement gen12_fwtable_write/read (Daniele) v3: update wit

Re: [Intel-gfx] [PATCH 01/23] drm/i915/dp: Fix dsc bpp calculations.

2019-09-12 Thread Ville Syrjälä
On Thu, Sep 12, 2019 at 06:01:57PM +0200, Maarten Lankhorst wrote: > Hey, > > Op 12-09-2019 om 16:34 schreef Sasha Levin: > > Hi, > > > > [This is an automated email] > > > > This commit has been processed because it contains a "Fixes:" tag, > > fixing commit: d9218c8f6cf4 drm/i915/dp: Add helpers

[Intel-gfx] ✓ Fi.CI.BAT: success for Revert "drm/i915/userptr: Acquire the page lock around set_page_dirty()"

2019-09-12 Thread Patchwork
== Series Details == Series: Revert "drm/i915/userptr: Acquire the page lock around set_page_dirty()" URL : https://patchwork.freedesktop.org/series/66605/ State : success == Summary == CI Bug Log - changes from CI_DRM_6882 -> Patchwork_14382 ===

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/tgl: Disable preemption while being debugged (rev2)

2019-09-12 Thread Patchwork
== Series Details == Series: drm/i915/tgl: Disable preemption while being debugged (rev2) URL : https://patchwork.freedesktop.org/series/66607/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6882 -> Patchwork_14383 Summary -

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/execlists: Add a paranoid flush of the CSB pointers upon reset

2019-09-12 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/execlists: Add a paranoid flush of the CSB pointers upon reset URL : https://patchwork.freedesktop.org/series/66586/ State : success == Summary == CI Bug Log - changes from CI_DRM_6876_full -> Patchwork_14375_full ==

Re: [Intel-gfx] [PATCH 0/6] Remaining patches to enable Transcoder Port Sync for tiled displays

2019-09-12 Thread Manasi Navare
On Thu, Sep 12, 2019 at 09:42:11AM +0300, Jani Nikula wrote: > On Wed, 11 Sep 2019, Manasi Navare wrote: > > On Wed, Sep 11, 2019 at 12:08:00PM +0300, Jani Nikula wrote: > >> On Tue, 10 Sep 2019, Manasi Navare wrote: > >> > On Tue, Sep 10, 2019 at 11:07:30AM -0700, Manasi Navare wrote: > >> >> On

Re: [Intel-gfx] [PATCH v2] drm/i915/tgl: Disable preemption while being debugged

2019-09-12 Thread Daniele Ceraolo Spurio
On 9/12/19 6:23 AM, Chris Wilson wrote: We see failures where the context continues executing past a preemption event, eventually leading to situations where a request has executed before we have event submitted it to HW! It seems like tgl is AFAIK on TGL the CS can detect tail updates in the

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915/tgl: Introduce gen12 forcewake ranges (rev2)

2019-09-12 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915/tgl: Introduce gen12 forcewake ranges (rev2) URL : https://patchwork.freedesktop.org/series/66608/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/i915/tgl: Introduce gen12 forcewake

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915/tgl: Introduce gen12 forcewake ranges (rev2)

2019-09-12 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915/tgl: Introduce gen12 forcewake ranges (rev2) URL : https://patchwork.freedesktop.org/series/66608/ State : success == Summary == CI Bug Log - changes from CI_DRM_6883 -> Patchwork_14384 ==

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: introduce INTEL_DISPLAY_ENABLED()

2019-09-12 Thread Patchwork
== Series Details == Series: drm/i915: introduce INTEL_DISPLAY_ENABLED() URL : https://patchwork.freedesktop.org/series/66610/ State : warning == Summary == $ dim checkpatch origin/drm-tip 427d67464aa8 drm/i915: introduce INTEL_DISPLAY_ENABLED() -:135: WARNING:LONG_LINE: line over 100 characte

Re: [Intel-gfx] [PATCH v2] drm/i915/tgl: Disable preemption while being debugged

2019-09-12 Thread Chris Wilson
Quoting Daniele Ceraolo Spurio (2019-09-12 19:45:27) > > > On 9/12/19 6:23 AM, Chris Wilson wrote: > > We see failures where the context continues executing past a > > preemption event, eventually leading to situations where a request has > > executed before we have event submitted it to HW! It s

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: introduce INTEL_DISPLAY_ENABLED()

2019-09-12 Thread Patchwork
== Series Details == Series: drm/i915: introduce INTEL_DISPLAY_ENABLED() URL : https://patchwork.freedesktop.org/series/66610/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6883 -> Patchwork_14385 Summary --- **FAILU

[Intel-gfx] [PATCH 1/2] drm/connector: Share with non-atomic drivers the function to get the single encoder

2019-09-12 Thread José Roberto de Souza
This 3 non-atomic drivers all have the same function getting the only encoder available in the connector, also atomic drivers have this fallback. So moving it a common place and sharing between atomic and non-atomic drivers. While at it I also removed the mention of drm_atomic_helper_best_encoder(

[Intel-gfx] [PATCH 2/2] drm/connector: Allow max possible encoders to attach to a connector

2019-09-12 Thread José Roberto de Souza
Currently we restrict the number of encoders that can be linked to a connector to 3, increase it to match the maximum number of encoders that can be initialized(32). To more effiently do that lets switch from an array of encoder ids to bitmask. v2: Fixing missed return on amdgpu_dm_connector_to_e

Re: [Intel-gfx] [PATCH 01/23] drm/i915/dp: Fix dsc bpp calculations.

2019-09-12 Thread Maarten Lankhorst
Op 12-09-2019 om 20:05 schreef Ville Syrjälä: > On Thu, Sep 12, 2019 at 06:01:57PM +0200, Maarten Lankhorst wrote: >> Hey, >> >> Op 12-09-2019 om 16:34 schreef Sasha Levin: >>> Hi, >>> >>> [This is an automated email] >>> >>> This commit has been processed because it contains a "Fixes:" tag, >>> fi

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Don't mix srcu tag and negative error codes (rev2)

2019-09-12 Thread Patchwork
== Series Details == Series: drm/i915: Don't mix srcu tag and negative error codes (rev2) URL : https://patchwork.freedesktop.org/series/66524/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/i915: Don't mix srcu tag and negative error codes +driver

[Intel-gfx] [PATCH] drm/i915/tgl: Extend MI_SEMAPHORE_WAIT

2019-09-12 Thread Chris Wilson
On Tigerlake, MI_SEMAPHORE_WAIT grew an extra dword, so be sure to update the length field and emit that extra parameter and any padding noop as required. Signed-off-by: Chris Wilson Cc: Mika Kuoppala Cc: Daniele Ceraolo Spurio --- drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 1 + drivers/g

[Intel-gfx] ✓ Fi.CI.IGT: success for Mdev: support mutiple kinds of devices

2019-09-12 Thread Patchwork
== Series Details == Series: Mdev: support mutiple kinds of devices URL : https://patchwork.freedesktop.org/series/66588/ State : success == Summary == CI Bug Log - changes from CI_DRM_6877_full -> Patchwork_14376_full Summary --- **

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Don't mix srcu tag and negative error codes (rev2)

2019-09-12 Thread Patchwork
== Series Details == Series: drm/i915: Don't mix srcu tag and negative error codes (rev2) URL : https://patchwork.freedesktop.org/series/66524/ State : success == Summary == CI Bug Log - changes from CI_DRM_6885 -> Patchwork_14386 Summary -

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/connector: Share with non-atomic drivers the function to get the single encoder

2019-09-12 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/connector: Share with non-atomic drivers the function to get the single encoder URL : https://patchwork.freedesktop.org/series/66619/ State : warning == Summary == $ dim checkpatch origin/drm-tip 87c2a5a45bc0 drm/connector: Share wit

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/connector: Share with non-atomic drivers the function to get the single encoder

2019-09-12 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/connector: Share with non-atomic drivers the function to get the single encoder URL : https://patchwork.freedesktop.org/series/66619/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/connec

[Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [1/2] drm/i915: Show the logical context ring state on dumping (rev3)

2019-09-12 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Show the logical context ring state on dumping (rev3) URL : https://patchwork.freedesktop.org/series/66422/ State : failure == Summary == Applying: drm/i915: Show the logical context ring state on dumping Applying: drm/i915/sel

Re: [Intel-gfx] [RFC] drm/i915/guc: Enable guc logging on guc log relay write

2019-09-12 Thread Daniele Ceraolo Spurio
On 9/11/19 2:28 PM, Fosha, Robert M wrote: On 9/10/19 5:48 PM, Daniele Ceraolo Spurio wrote: On 9/10/19 3:46 PM, Robert M. Fosha wrote: Creating and opening the GuC log relay file enables and starts the relay potentially before the caller is ready to consume logs. Change the behavior so th

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/connector: Share with non-atomic drivers the function to get the single encoder

2019-09-12 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/connector: Share with non-atomic drivers the function to get the single encoder URL : https://patchwork.freedesktop.org/series/66619/ State : success == Summary == CI Bug Log - changes from CI_DRM_6885 -> Patchwork_14387

[Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [1/4] drm/i915/tgl: Introduce gen12 forcewake ranges (rev3)

2019-09-12 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915/tgl: Introduce gen12 forcewake ranges (rev3) URL : https://patchwork.freedesktop.org/series/66608/ State : failure == Summary == Applying: drm/i915/tgl: Introduce gen12 forcewake ranges Applying: drm/i915/tgl: s/ss/eu fuse readi

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tgl: Extend MI_SEMAPHORE_WAIT

2019-09-12 Thread Patchwork
== Series Details == Series: drm/i915/tgl: Extend MI_SEMAPHORE_WAIT URL : https://patchwork.freedesktop.org/series/66625/ State : success == Summary == CI Bug Log - changes from CI_DRM_6885 -> Patchwork_14389 Summary --- **SUCCESS**

[Intel-gfx] [PATCH 1/2] drm/i915/uc: Update HuC firmware naming convention and load latest HuC

2019-09-12 Thread Anusha Srivatsa
Make both GuC and HuC to use "." as the separator. Hardcode the separator in MAKE_UC_FW_PATH. Remove the usage of "ver" from HuC. The current convention being: _uc_..patch.bin Update the versions of HuC being loaded of the platforms. SKL - v2.0.0 BXT - v2.0.0 KBL - v4.0.0 GLK - v4.0.0 CFL - KBL

[Intel-gfx] [PATCH 2/2] HAX: force enable_guc=2

2019-09-12 Thread Anusha Srivatsa
Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/i915/i915_params.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index d29ade3b7de6..f9fbb1f2fabf 100644 --- a/drivers/gpu/drm/i915/i915_params.h +++ b

Re: [Intel-gfx] [PATCH AUTOSEL 5.2 13/23] drm/i915/userptr: Acquire the page lock around set_page_dirty()

2019-09-12 Thread Sasha Levin
On Thu, Sep 12, 2019 at 11:51:33PM +0300, Thomas Backlund wrote: Den 03-09-2019 kl. 19:24, skrev Sasha Levin: From: Chris Wilson [ Upstream commit aa56a292ce623734ddd30f52d73f527d1f3529b5 ] set_page_dirty says: For pages with a mapping this should be done under the page lock

Re: [Intel-gfx] [PATCH] drm/i915/dmc: Update ICL DMC version to v1.09

2019-09-12 Thread Souza, Jose
On Wed, 2019-09-11 at 12:21 -0700, Anusha Srivatsa wrote: > We have a new version of DMC for ICL - v1.09. > > This version adds the Half Refresh Rate capability > into DMC. Reviewed-by: José Roberto de Souza > > Cc: José Roberto de Souza > Signed-off-by: Anusha Srivatsa > --- > drivers/gpu/

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/uc: Update HuC firmware naming convention and load latest HuC

2019-09-12 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/uc: Update HuC firmware naming convention and load latest HuC URL : https://patchwork.freedesktop.org/series/66626/ State : warning == Summary == $ dim checkpatch origin/drm-tip 3a37f385bcf4 drm/i915/uc: Update HuC firmware nami

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/uc: Update HuC firmware naming convention and load latest HuC

2019-09-12 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/uc: Update HuC firmware naming convention and load latest HuC URL : https://patchwork.freedesktop.org/series/66626/ State : success == Summary == CI Bug Log - changes from CI_DRM_6885 -> Patchwork_14391 =

[Intel-gfx] [RFC v2] drm/i915/guc: Enable guc logging on guc log relay write

2019-09-12 Thread Robert M. Fosha
Creating and opening the GuC log relay file enables and starts the relay potentially before the caller is ready to consume logs. Change the behavior so that relay starts only on an explicit call to the write function (with a value of '1'). Other values flush the log relay as before. v2: Style chan

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Enable guc logging on guc log relay write (rev2)

2019-09-12 Thread Patchwork
== Series Details == Series: drm/i915/guc: Enable guc logging on guc log relay write (rev2) URL : https://patchwork.freedesktop.org/series/66502/ State : success == Summary == CI Bug Log - changes from CI_DRM_6885 -> Patchwork_14392 Summary

Re: [Intel-gfx] [PATCH v3 21/23] drm/i915/tgl: Gen-12 render decompression

2019-09-12 Thread Sripada, Radhakrishna
> -Original Message- > From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf > Of Lucas De Marchi > Sent: Friday, August 23, 2019 1:21 AM > To: intel-gfx@lists.freedesktop.org > Cc: Vetter, Daniel ; Pandiyan, Dhinakaran > > Subject: [Intel-gfx] [PATCH v3 21/23] drm/i

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dp: Support for DP HDR outputs (rev7)

2019-09-12 Thread Patchwork
== Series Details == Series: drm/i915/dp: Support for DP HDR outputs (rev7) URL : https://patchwork.freedesktop.org/series/65656/ State : success == Summary == CI Bug Log - changes from CI_DRM_6881_full -> Patchwork_14378_full Summary -

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Keep the engine awake while we keep for preemption

2019-09-12 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Keep the engine awake while we keep for preemption URL : https://patchwork.freedesktop.org/series/66601/ State : success == Summary == CI Bug Log - changes from CI_DRM_6881_full -> Patchwork_14379_full ===

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/pmu: Use GT parked for estimating RC6 while asleep (rev8)

2019-09-12 Thread Patchwork
== Series Details == Series: drm/i915/pmu: Use GT parked for estimating RC6 while asleep (rev8) URL : https://patchwork.freedesktop.org/series/56583/ State : success == Summary == CI Bug Log - changes from CI_DRM_6882_full -> Patchwork_14380_full ===

[Intel-gfx] [CI] drm/i915/gtt: Make sure the gen6 ppgtt is bound before first use

2019-09-12 Thread Chris Wilson
As we remove the struct_mutex protection from around the vma pinning, counters need to be atomic and aware that there may be multiple threads simultaneously active. Signed-off-by: Chris Wilson Reviewed-by: Matthew Auld --- drivers/gpu/drm/i915/i915_gem_gtt.c | 40 -

[Intel-gfx] [PATCH 3/3] drm/i915/tgl: Re-enable rc6

2019-09-12 Thread Chris Wilson
From: Mika Kuoppala We think that we got rc6 problems sorted out. Flip the switch and let CI expose our tendency to naive optimism. Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_pci.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/

[Intel-gfx] [PATCH 2/3] drm/i915/tgl: s/ss/eu fuse reading support

2019-09-12 Thread Chris Wilson
From: Daniele Ceraolo Spurio Gen12 has dual-subslices (DSS), which compared to gen11 subslices have some duplicated resources/paths. Although DSS behave similarly to 2 subslices, instead of splitting this and presenting userspace with bits not directly representative of hardware resources, presen

[Intel-gfx] [PATCH 1/3] drm/i915/tgl: Introduce gen12 forcewake ranges

2019-09-12 Thread Chris Wilson
From: Michel Thierry The media ranges extend beyond what gen11 gives so we can't piggypack on gen11 ranges, even on read side. Introduce a table for gen12 and accessors for it. v2: correctly implement gen12_fwtable_write/read (Daniele) v3: update with ranges from bspec. v4: avoid GEN11_NEEDS_FO

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