On Thu, Oct 03, 2019 at 09:55:22PM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/tgl: Add the Thunderbolt PLL divider values (rev3)
> URL : https://patchwork.freedesktop.org/series/67498/
> State : success
Thanks for the review, pushed to -dinq.
>
> == Summary ==
>
>
The L3 cache remapping is stored as u32 elements, and we should ensure
that the user only supplies complete slice information(u32).
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_sysfs.c | 57 ---
1 file changed, 29 insertions(+), 28
== Series Details ==
Series: TGL HAX drm/i915/tgl: Interrupts are overrated (rev7)
URL : https://patchwork.freedesktop.org/series/67558/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
cbf4264ef04e TGL HAX drm/i915/tgl: Interrupts are overrated
-:244: ERROR:COMPLEX_MACRO: Macros
On 03/10/2019 15:20, Chris Wilson wrote:
Keep track of the GEM contexts underneath i915->gem.contexts and assign
them their own lock for the purposes of list management.
v2: Focus on lock tracking; ctx->vm is protected by ctx->mutex
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
Another
Make dma_fence_enable_sw_signaling() behave like its
dma_fence_add_callback() and dma_fence_default_wait() counterparts and
perform the test to enable signaling under the fence->lock, along with
the action to do so. This ensure that should an implementation be trying
to flush the cb_list (by
== Series Details ==
Series: series starting with [1/5] drm/i915/execlists: Skip redundant
resubmission (rev2)
URL : https://patchwork.freedesktop.org/series/67566/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
6adbc5589cd8 drm/i915/execlists: Skip redundant resubmission
In this patch series, basically added 3 patches
1. Fixing broken state-checker during boot since legacy platforms
i.e. platforms for which state checker was already enabled
2. Moving gamma_enable checks in bit_precision func() to platform
specific func()
3. Enabling state checker for
For icl+, have hw read out to create hw blob of gamma
lut values. icl+ platforms supports multi segmented gamma
mode by default, add hw lut creation for this mode.
This will be used to validate gamma programming using dsb
(display state buffer) which is a tgl specific feature.
Major change
Only to print hw and sw lut values/channel.
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
index 168e9daae3de..2b8706dba746
On 03/10/2019 22:00, Chris Wilson wrote:
A straightforward conversion of assignment and checking of the boolean
state flags (allocated, scanned) into non-atomic bitops. The caller
remains responsible for all locking around the drm_mm and its nodes.
Signed-off-by: Chris Wilson
---
Moved common code to check gamma_enable to specific funcs per platform
in bit_precision func. icl doesn't support that and chv has separate
enable knob for CGM LUT.
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 23 +-
1 file changed, 18
Premature gamma lut prepration and loading which was getting
reflected in first modeset causing different colors on
screen during boot.
Issue: In BIOS, gamma is disabled by default. However, legacy read_luts()
was setting crtc_state->base.gamma_lut and gamma_lut was programmed
with junk values
Why sleep when you can busywait for an interrupt? Throw out the old irq
handlers, and use irq_poll instead.
References: https://bugs.freedesktop.org/show_bug.cgi?id=111880
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/Kconfig | 1 +
On 03/10/2019 22:01, Chris Wilson wrote:
A few callers need to serialise the destruction of their drm_mm_node and
ensure it is removed from the drm_mm before freeing. However, to be
completely sure that any access from another thread is complete before
we free the struct, we require the RELEASE
On 03/10/2019 22:00, Chris Wilson wrote:
If we unwind the active requests, and on resubmission discover that we
intend to preempt the active context with itself, simply skip the ELSP
submission.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 17 -
1
Quoting Tvrtko Ursulin (2019-10-04 10:15:20)
>
> On 03/10/2019 22:01, Chris Wilson wrote:
> > A few callers need to serialise the destruction of their drm_mm_node and
> > ensure it is removed from the drm_mm before freeing. However, to be
> > completely sure that any access from another thread is
== Series Details ==
Series: fix broken state checker and enable state checker for icl+
URL : https://patchwork.freedesktop.org/series/67586/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a31640d6d4c0 drm/i915/color: fix broken gamma state-checker during boot
-:18:
== Series Details ==
Series: TGL HAX drm/i915/tgl: Interrupts are overrated (rev5)
URL : https://patchwork.freedesktop.org/series/67558/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7001 -> Patchwork_14662
Summary
---
On 04/10/2019 11:11, Chris Wilson wrote:
Make dma_fence_enable_sw_signaling() behave like its
dma_fence_add_callback() and dma_fence_default_wait() counterparts and
perform the test to enable signaling under the fence->lock, along with
the action to do so. This ensure that should an
On 03/10/2019 22:00, Chris Wilson wrote:
In preparation for rearranging the booleans into a flags field, ensure
all the current users are using the inline helpers and not directly
accessing the members.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/drm_mm.c | 19
On 03/10/2019 22:00, Chris Wilson wrote:
Make dma_fence_enable_sw_signaling() behave like its
dma_fence_add_callback() and dma_fence_default_wait() counterparts and
perform the test to enable signaling under the fence->lock, along with
the action to do so. This ensure that should an
== Series Details ==
Series: TGL HAX drm/i915/tgl: Interrupts are overrated (rev4)
URL : https://patchwork.freedesktop.org/series/67558/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7001 -> Patchwork_14661
Summary
---
== Series Details ==
Series: TGL HAX drm/i915/tgl: Interrupts are overrated (rev4)
URL : https://patchwork.freedesktop.org/series/67558/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
9b1dcf587b4b TGL HAX drm/i915/tgl: Interrupts are overrated
-:190: ERROR:COMPLEX_MACRO: Macros
Why sleep when you can busywait for an interrupt? Throw out the old irq
handlers, and use irq_poll instead.
References: https://bugs.freedesktop.org/show_bug.cgi?id=111880
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/Kconfig | 1 +
== Series Details ==
Series: series starting with [CI,v6,1/6] drm/i915/display/icl: Save Master
transcoder in slave's crtc_state for Transcoder Port Sync
URL : https://patchwork.freedesktop.org/series/67551/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6999_full ->
Why sleep when you can busywait for an interrupt? Throw out the old irq
handlers, and use irq_poll instead.
References: https://bugs.freedesktop.org/show_bug.cgi?id=111880
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/Kconfig | 1 +
Why sleep when you can busywait for an interrupt? Throw out the old irq
handlers, and use irq_poll instead.
References: https://bugs.freedesktop.org/show_bug.cgi?id=111880
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/Kconfig | 1 +
Why sleep when you can busywait for an interrupt? Throw out the old irq
handlers, and use irq_poll instead.
References: https://bugs.freedesktop.org/show_bug.cgi?id=111880
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/Kconfig | 1 +
Quoting Stimson, Dale B (2019-10-04 00:26:24)
> > On Wed, Oct 02, 2019 at 12:26:48PM +0100, Chris Wilson wrote:
> > > There's very little variation in non-privileged registers for Tigerlake,
> > > so we can mostly inherit the set from gen11. There is no whitelist at
> > > present, so we do not
== Series Details ==
Series: TGL HAX drm/i915/tgl: Interrupts are overrated (rev5)
URL : https://patchwork.freedesktop.org/series/67558/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
25e18100cd25 TGL HAX drm/i915/tgl: Interrupts are overrated
-:209: ERROR:COMPLEX_MACRO: Macros
On Fri, Sep 27, 2019 at 03:28:37PM -0700, Radhakrishna Sripada wrote:
> Render Decompression is supported with Y-Tiled main surface. The CCS is
> linear and has 4 bits of data for each main surface cache line pair, a
> ratio of 1:256. Additional Clear Color information is passed from the
>
On Mon, 2019-09-23 at 17:03 -0700, Radhakrishna Sripada wrote:
> Gen12 display can decompress surfaces compressed by render engine with Clear
> Color, add
> a new modifier as the driver needs to know the surface was compressed by
> render engine.
>
> V2: Description changes as suggested by
== Series Details ==
Series: drm/i915: customize DPCD brightness control for specific panel
URL : https://patchwork.freedesktop.org/series/67595/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7011_full -> Patchwork_14670_full
On Fri, Oct 04, 2019 at 05:17:07PM -0700, Dhinakaran Pandiyan wrote:
> On Fri, 2019-10-04 at 16:52 -0700, Matt Roper wrote:
> > On Fri, Sep 27, 2019 at 03:28:37PM -0700, Radhakrishna Sripada wrote:
> > > Render Decompression is supported with Y-Tiled main surface. The CCS is
> > > linear and has 4
On Fri, 2019-10-04 at 18:36 +0300, Ville Syrjälä wrote:
> On Thu, Sep 26, 2019 at 03:55:12AM -0700, Dhinakaran Pandiyan wrote:
> > Detect the modifier corresponding to media compression to enable
> > display decompression for YUV and xRGB packed formats. A new modifier is
> > added so that the
== Series Details ==
Series: LMEM basics (rev3)
URL : https://patchwork.freedesktop.org/series/67350/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7011_full -> Patchwork_14674_full
Summary
---
**FAILURE**
In prep for newer platforms having more complicated ways to determine
the SAGV block time, move the variable to dev_priv, and extract the
setting to an initial setup function. While we're at it, update the if
ladder to follow the new gen -> old gen order preference, and warn on
any non-specified
Starting from TGL, we now need to read the SAGV block time via a PCODE
mailbox, rather than having a static value.
BSpec: 49326
v2: Fix up pcode val data type (Ville), tighten variable scope (Ville)
Cc: Ville Syrjälä
Cc: Stanislav Lisovskiy
Cc: Lucas De Marchi
Signed-off-by: James Ausmus
Quoting Matthew Auld (2019-10-04 18:04:33)
> +struct drm_i915_gem_object *
> +i915_gem_object_create_region(struct intel_memory_region *mem,
> + resource_size_t size,
> + unsigned int flags)
Ok, while dma_addr_t can technically exceed
On Fri, 2019-10-04 at 13:27 -0700, Matt Roper wrote:
> On Thu, Sep 26, 2019 at 03:55:12AM -0700, Dhinakaran Pandiyan wrote:
> > Detect the modifier corresponding to media compression to enable
> > display decompression for YUV and xRGB packed formats. A new modifier is
> > added so that the driver
On Fri, 2019-10-04 at 16:52 -0700, Matt Roper wrote:
> On Fri, Sep 27, 2019 at 03:28:37PM -0700, Radhakrishna Sripada wrote:
> > Render Decompression is supported with Y-Tiled main surface. The CCS is
> > linear and has 4 bits of data for each main surface cache line pair, a
> > ratio of 1:256.
== Series Details ==
Series: series starting with [1/4] drm/edid: Make drm_get_cea_aspect_ratio()
static
URL : https://patchwork.freedesktop.org/series/67600/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7011_full -> Patchwork_14671_full
On Tue, Oct 01, 2019 at 11:07:39AM +0300, Jani Nikula wrote:
> The kernel has plenty of ternary operators to choose between constant
> strings, such as condition ? "yes" : "no", as well as value == 1 ? "" :
> "s":
>
> $ git grep '? "yes" : "no"' | wc -l
> 258
> $ git grep '? "on" : "off"' | wc -l
On Thu, Oct 03, 2019 at 01:47:33PM +0530, Anshuman Gupta wrote:
> Adding following definition to i915_reg.h
> 1. DC_STATE_EN register DC3CO bit fields and masks.
>DC3CO enable bit will be used by driver to make DC3CO
>ready for DMC f/w and status bit will be used as DC3CO
>entry
On 04/10/2019 15:22, Chris Wilson wrote:
A subset of 71724f708997 ("drm/mm: Use helpers for drm_mm_node booleans")
in order to prepare drm-intel-next-queued for subsequent patches before
we can backmerge 71724f708997 itself.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
== Series Details ==
Series: series starting with [01/20] drm/i915: Only track bound elements of the
GTT
URL : https://patchwork.freedesktop.org/series/67594/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7008 -> Patchwork_14669
On Fri, Oct 04, 2019 at 05:51:16PM +0200, Maarten Lankhorst wrote:
> Op 04-10-2019 om 15:31 schreef Ville Syrjälä:
> > On Fri, Oct 04, 2019 at 01:34:59PM +0200, Maarten Lankhorst wrote:
> >> We are still looking at drm_crtc_state in a few places, convert those
> >> to use intel_crtc_state instead.
A subset of 71724f708997 ("drm/mm: Use helpers for drm_mm_node booleans")
in order to prepare drm-intel-next-queued for subsequent patches before
we can backmerge 71724f708997 itself.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 4 ++--
And only verify cursor allocation when cursor plane is active.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_display.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
On Mon, Sep 23, 2019 at 03:29:31AM -0700, Dhinakaran Pandiyan wrote:
> intel_fill_fb_info() has grown quite large and wrapping the offset checks
> into a separate function makes the loop a bit easier to follow.
>
> Cc: Ville Syrjälä
> Cc: Matt Roper
> Signed-off-by: Dhinakaran Pandiyan
> ---
>
There's very little variation in non-privileged registers for Tigerlake,
so we can mostly inherit the set from gen11. There is no whitelist at
present, so we do not need to add any special registers.
v2: Add COMMON_SLICE_CHICKEN2, GEN9_SLICE_COMMON_ECO_CHICKEN1 and a
variety of huc readonly
On Sat, 2019-10-05 at 05:58 +0800, Lee Shawn C wrote:
> This panel (manufacturer is SDC, product ID is 0x4141)
> used manufacturer defined DPCD register to control brightness
> that not defined in eDP spec so far. This change follow panel
> vendor's instruction to support brightness adjustment.
== Series Details ==
Series: fix broken state checker and enable state checker for icl+
URL : https://patchwork.freedesktop.org/series/67586/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7003_full -> Patchwork_14663_full
Chris Wilson writes:
> There's very little variation in non-privileged registers for Tigerlake,
> so we can mostly inherit the set from gen11. There is no whitelist at
> present, so we do not need to add any special registers.
>
> v2: Add COMMON_SLICE_CHICKEN2, GEN9_SLICE_COMMON_ECO_CHICKEN1 and
== Series Details ==
Series: series starting with [01/20] drm/i915: Only track bound elements of the
GTT
URL : https://patchwork.freedesktop.org/series/67594/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d11fa436d327 drm/i915: Only track bound elements of the GTT
From: Ville Syrjälä
Extract the logic to compute the final CEA VIC to a small helper.
We'll reorder it a bit to make future modifications more
straightforward. No function changes.
Cc: Wayne Lin
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_edid.c | 53
From: Ville Syrjälä
I think this should provide most of necessary logic for
adding aspecr ratios to the HDMI 4k modes.
Cc: Wayne Lin
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_edid.c | 37 +++--
1 file changed, 31 insertions(+), 6 deletions(-)
diff
From: Ville Syrjälä
drm_get_cea_aspect_ratio() is not used outside drm_edid.c.
Make it static.
Cc: Wayne Lin
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_edid.c | 10 +-
include/drm/drm_edid.h | 1 -
2 files changed, 1 insertion(+), 10 deletions(-)
diff --git
From: Ville Syrjälä
Extract drm_mode_hdmi_vic() to correctly calculate the final HDMI
VIC for us. Currently this is being done a bit differently between
the AVI and HDMI infoframes. Let's get both to agree on this.
We need to allow the case where a mode is both 3D and has a HDMI
VIC. Currently
On Thu, Sep 26, 2019 at 03:55:12AM -0700, Dhinakaran Pandiyan wrote:
> Detect the modifier corresponding to media compression to enable
> display decompression for YUV and xRGB packed formats. A new modifier is
> added so that the driver can distinguish between media and render
> compressed
Op 04-10-2019 om 15:31 schreef Ville Syrjälä:
> On Fri, Oct 04, 2019 at 01:34:59PM +0200, Maarten Lankhorst wrote:
>> We are still looking at drm_crtc_state in a few places, convert those
>> to use intel_crtc_state instead. Look at uapi/hw where appropriate.
>>
>> Signed-off-by: Maarten Lankhorst
== Series Details ==
Series: TGL HAX drm/i915/tgl: Interrupts are overrated (rev7)
URL : https://patchwork.freedesktop.org/series/67558/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7003_full -> Patchwork_14664_full
On 04/10/2019 11:59, Chris Wilson wrote:
The L3 cache remapping is stored as u32 elements, and we should ensure
that the user only supplies complete slice information(u32).
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_sysfs.c | 57
== Series Details ==
Series: fix broken state checker and enable state checker for icl+
URL : https://patchwork.freedesktop.org/series/67586/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7003 -> Patchwork_14663
Summary
== Series Details ==
Series: drm: Add getfb2 ioctl
URL : https://patchwork.freedesktop.org/series/67553/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7000_full -> Patchwork_14656_full
Summary
---
**FAILURE**
== Series Details ==
Series: series starting with [1/5] drm/i915/execlists: Skip redundant
resubmission
URL : https://patchwork.freedesktop.org/series/67566/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7000_full -> Patchwork_14659_full
Hey,
On Fri, 4 Oct 2019, Patchwork wrote:
> URL : https://patchwork.freedesktop.org/series/67350/
[...]
> **FAILURE**
>
> Serious unknown changes coming with Patchwork_14658_full absolutely need to
> be
> verified manually.
[...]
> * igt@gem_mmap_gtt@hang:
> - shard-kbl:
== Series Details ==
Series: drm/i915: Restrict L3 remapping sysfs interface to dwords
URL : https://patchwork.freedesktop.org/series/67588/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7005 -> Patchwork_14666
Summary
On Thu, 03 Oct 2019, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/dp: remove static variable for aux last status (rev3)
> URL : https://patchwork.freedesktop.org/series/67499/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_6996_full ->
Split out code related to vga switcheroo register/unregister and state
handling from i915_drv.c into new i915_switcheroo.[ch] files.
It's a bit difficult to draw the line how much to move to the new file
from i915_drv.c, but it seemed to me keeping i915_suspend_switcheroo()
and
Pair the gmbus setup and teardown in the same layer. This also fixes the
double gmbus teardown on the i915_driver_modeset_probe() error path.
Move the gmbus setup a bit later in the sequence to make the follow-up
refactoring easier, and to pinpoint any unexpected consequences of this
change right
Rename the function per Ville's suggestion. No functional changes.
Cc: Ville Syrjälä
Suggested-by: Ville Syrjälä
Reviewed-by: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display_power.c | 2 +-
drivers/gpu/drm/i915/display/intel_vga.c | 2 +-
On Fri, Oct 04, 2019 at 01:34:54PM +0200, Maarten Lankhorst wrote:
> We have a src and dect rectangle, use it instead of relying on
> the core drm properties.
>
> This removes the special case in the watermark code for cursor w/h.
I like getting rid of special cases. I guess the only concern I
== Series Details ==
Series: series starting with [CI,1/3] drm/i915/vga: rename
intel_vga_msr_write() to intel_vga_reset_io_mem()
URL : https://patchwork.freedesktop.org/series/67592/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7007 -> Patchwork_14668
Splitting plane state is easier than splitting crtc_state,
before plane check we copy the drm properties to hw so we can
do the same in bigjoiner later on.
We copy the state after we did all the modeset handling, but fortunately
i915 seems to be split correctly and nothing during modeset looks
at
Make sure that when a plane is set in a bigjoiner mode, we will add
their counterpart to the atomic state as well. This will allow us to
make sure all state is available when planes are checked.
Because of the funny interactions with bigjoiner and planar YUV
formats, we may end up adding a lot of
Make vdsc work when no output is enabled. The big joiner needs VDSC
on the slave, so enable it and set the appropriate bits.
Also update timestamping constants, because slave crtc's are not
updated in drm_atomic_helper_update_legacy_modeset_state().
This should be enough to bring up CRTC's in a
Signed-off-by: Maarten Lankhorst
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 60 +++
.../gpu/drm/i915/display/intel_atomic_plane.h | 4 ++
drivers/gpu/drm/i915/display/intel_display.c | 19 +++---
drivers/gpu/drm/i915/display/intel_sprite.c | 21 +++
4 files
Use this in all the places where we try to acquire planes after the planes
atomic_check().
In case of intel_modeset_all_pipes() this is not yet done after atomic_check,
but seems like it will be in the future. To add some paranoia, add all planes
rather than active planes, because of bigjoiner
We split plane_state into hw and uapi, this will allow us to
make bigjoiner work without rewriting the entire atomic_check and
plane programming to be bigjoienr aware.
This results in a cleaner bigjoiner implementation than if we use
a separate plane_state.
The only exception is
When the clock is higher than the dotclock, try with 2 pipes enabled.
If we can enable 2, then we will go into big joiner mode, and steal
the adjacent crtc.
This only links the crtc's in software, no hardware or plane
programming is done yet. Blobs are also copied from the master's
crtc_state, so
Instead of looking at drm_plane_state, look at intel_plane_state directly.
This will allow us to make the watermarks bigjoiner aware, when we make it
work for bigjoiner slave pipes as well.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_display.h | 8 +++
We have a src and dect rectangle, use it instead of relying on
the core drm properties.
This removes the special case in the watermark code for cursor w/h.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_display.c | 57 +++
Using for_each_intel_plane_mask() fails because of an extra bracket,
remove the bracket so we can use it in the next commit.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_display.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
From: Ville Syrjälä
We need to insert stuff between the plane and crtc .atomic_check()
drm_atomic_helper_check_planes() doesn't allow us to do that so
stop using it and hand roll the loops instead.
Signed-off-by: Ville Syrjälä
Reviewed-by: Stanislav Lisovskiy
Signed-off-by: Maarten Lankhorst
== Series Details ==
Series: LMEM basics (rev2)
URL : https://patchwork.freedesktop.org/series/67350/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7000_full -> Patchwork_14658_full
Summary
---
**FAILURE**
Small changes to intel_dp_mode_valid(), allow listing modes that
can only be supported in the bigjoiner configuration, which is
not supported yet.
eDP does not support bigjoiner, so do not expose bigjoiner only
modes on the eDP port.
Changes since v1:
- Disallow bigjoiner on eDP.
Signed-off-by:
The first approach centered on ensuring that bigjoiner had a separate
master_plane_state and slave_plane_state, this complicated the code
too much.
The new approach performs the same uapi and hw split as I did for
crtc_state, and allows bigjoiner to work with very small modifications
in
== Series Details ==
Series: Enable bigjoiner support, second approach.
URL : https://patchwork.freedesktop.org/series/67590/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
CHK include/generated/compile.h
AR
On Fri, Oct 04, 2019 at 01:34:52PM +0200, Maarten Lankhorst wrote:
> Using for_each_intel_plane_mask() fails because of an extra bracket,
> remove the bracket so we can use it in the next commit.
>
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Ville Syrjälä
> ---
>
On Fri, Oct 04, 2019 at 01:34:53PM +0200, Maarten Lankhorst wrote:
> Instead of looking at drm_plane_state, look at intel_plane_state directly.
>
> This will allow us to make the watermarks bigjoiner aware, when we make it
> work for bigjoiner slave pipes as well.
>
> Signed-off-by: Maarten
On Fri, Oct 04, 2019 at 01:34:59PM +0200, Maarten Lankhorst wrote:
> We are still looking at drm_crtc_state in a few places, convert those
> to use intel_crtc_state instead. Look at uapi/hw where appropriate.
>
> Signed-off-by: Maarten Lankhorst
> Reviewed-by: Matt Roper
> ---
>
On 04/10/2019 14:40, Chris Wilson wrote:
Keep track of the GEM contexts underneath i915->gem.contexts and assign
them their own lock for the purposes of list management.
v2: Focus on lock tracking; ctx->vm is protected by ctx->mutex
v3: Correct split with removal of logical HW ID
== Series Details ==
Series: series starting with [1/5] drm/i915/execlists: Skip redundant
resubmission (rev2)
URL : https://patchwork.freedesktop.org/series/67566/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7003 -> Patchwork_14665
== Series Details ==
Series: series starting with [CI,1/3] drm/i915/vga: rename
intel_vga_msr_write() to intel_vga_reset_io_mem()
URL : https://patchwork.freedesktop.org/series/67592/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
095e27e1a8ba drm/i915/vga: rename
Requests are run from the gt and are tided into the gt runtime power
management, so pull the runtime request management under gt/
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/gem/i915_gem_mman.c |
Quoting Mika Kuoppala (2019-10-04 14:51:05)
> Chris Wilson writes:
>
> > There's very little variation in non-privileged registers for Tigerlake,
> > so we can mostly inherit the set from gen11. There is no whitelist at
> > present, so we do not need to add any special registers.
> >
> >
Forgo the struct_mutex serialisation for i915_active, and interpose its
own mutex handling for active/retire.
This is a multi-layered sleight-of-hand. First, we had to ensure that no
active/retire callbacks accidentally inverted the mutex ordering rules,
nor assumed that they were themselves
We no longer need struct_mutex to serialise request emission, so remove
it from the gt selftests.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
.../gpu/drm/i915/gem/selftests/huge_pages.c | 15 +-
.../drm/i915/gem/selftests/i915_gem_context.c | 4 -
As our global unpark/park keep track of the number of active users, we
can simply move the accounting from the GEM layer to the base GT layer.
It was placed originally inside GEM to benefit from the 100ms extra
delay on idleness, but that has been eliminated and now there is no
substantive
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