Re: [Intel-gfx] [PATCH] drm/i915/rps: Add frequency translation helpers

2019-12-04 Thread Andi Shyti
Hi Chris, > > @@ -1633,21 +1633,11 @@ static int i915_rps_boost_info(struct seq_file *m, > > void *data) > > { > > struct drm_i915_private *dev_priv = node_to_i915(m->private); > > struct intel_rps *rps = _priv->gt.rps; > > - u32 act_freq = rps->cur_freq; > > + u32

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/rps: Add frequency translation helpers

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915/rps: Add frequency translation helpers URL : https://patchwork.freedesktop.org/series/70427/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7480 -> Patchwork_15578 Summary ---

[Intel-gfx] [CI] drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET

2019-12-04 Thread Chris Wilson
From: Abdiel Janulgue This is really just an alias of mmap_gtt. The 'mmap offset' nomenclature comes from the value returned by this ioctl which is the offset into the device fd which userpace uses with mmap(2). mmap_gtt was our initial mmap_offset implementation, this extends our CPU mmap

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET (rev7)

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET (rev7) URL : https://patchwork.freedesktop.org/series/70164/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7480 -> Patchwork_15576 Summary ---

Re: [Intel-gfx] [PATCH 6/7] drm/i915/display/tgl: Fix the order of the step to turn transcoder clock off

2019-12-04 Thread Ville Syrjälä
On Tue, Dec 03, 2019 at 11:29:49PM +, Souza, Jose wrote: > On Thu, 2019-11-28 at 20:40 +0200, Ville Syrjälä wrote: > > On Fri, Nov 22, 2019 at 04:54:58PM -0800, José Roberto de Souza > > wrote: > > > For TGL the step to turn off the transcoder clock was moved to > > > after > > > the complete

Re: [Intel-gfx] [PATCH v3 02/13] drm/i915/bios: parse compression parameters block

2019-12-04 Thread Kulkarni, Vandita
> -Original Message- > From: Jani Nikula > Sent: Tuesday, November 26, 2019 7:13 PM > To: intel-gfx@lists.freedesktop.org > Cc: Nikula, Jani ; Kulkarni, Vandita > ; Ville Syrjälä > Subject: [PATCH v3 02/13] drm/i915/bios: parse compression parameters > block > > Check for child devices

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET (rev8)

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET (rev8) URL : https://patchwork.freedesktop.org/series/70164/ State : warning == Summary == $ dim checkpatch origin/drm-tip 042af211fedc drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET -:462: WARNING:UNNECESSARY_ELSE: else

[Intel-gfx] [PATCH i-g-t] i915/gem_exec_balancer: Race SUBMIT_FENCE against semaphores

2019-12-04 Thread Chris Wilson
The scheduler may use a semaphore between engines to serialise requests, and in doing so submit the request before its signalers are ready. This dependency must also be copied across any SUBMIT_FENCE so that a bonded-pair will not execute ahead of any of its implicit dependencies -- it too must

[Intel-gfx] [CI] drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET

2019-12-04 Thread Chris Wilson
From: Abdiel Janulgue This is really just an alias of mmap_gtt. The 'mmap offset' nomenclature comes from the value returned by this ioctl which is the offset into the device fd which userpace uses with mmap(2). mmap_gtt was our initial mmap_offset implementation, this extends our CPU mmap

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display/tgl: Do not program clockgating (rev3)

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915/display/tgl: Do not program clockgating (rev3) URL : https://patchwork.freedesktop.org/series/70076/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7478_full -> Patchwork_15571_full

[Intel-gfx] [PATCH v2] drm/i915: Copy across scheduler behaviour flags across submit fences

2019-12-04 Thread Chris Wilson
We want the bonded request to have the same scheduler properties as its master so that it is placed at the same depth in the queue. For example, consider we have requests A, B and B', where B & B' are a bonded pair to run in parallel on two engines. A -> B \- B' B will run

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET (rev6)

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET (rev6) URL : https://patchwork.freedesktop.org/series/70164/ State : warning == Summary == $ dim checkpatch origin/drm-tip 27cfdf6b3d94 drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET -:458: WARNING:UNNECESSARY_ELSE: else

[Intel-gfx] [CI] drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET

2019-12-04 Thread Chris Wilson
From: Abdiel Janulgue This is really just an alias of mmap_gtt. The 'mmap offset' nomenclature comes from the value returned by this ioctl which is the offset into the device fd which userpace uses with mmap(2). mmap_gtt was our initial mmap_offset implementation, this extends our CPU mmap

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Add new EHL/JSL PCI ids

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915: Add new EHL/JSL PCI ids URL : https://patchwork.freedesktop.org/series/70399/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7478_full -> Patchwork_15569_full Summary ---

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Copy across scheduler behaviour flags across submit fences (rev2)

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915: Copy across scheduler behaviour flags across submit fences (rev2) URL : https://patchwork.freedesktop.org/series/70107/ State : warning == Summary == $ dim checkpatch origin/drm-tip d65868d85183 drm/i915: Copy across scheduler behaviour flags across

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET (rev6)

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET (rev6) URL : https://patchwork.freedesktop.org/series/70164/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7480 -> Patchwork_15575 Summary ---

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET (rev8)

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET (rev8) URL : https://patchwork.freedesktop.org/series/70164/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7480 -> Patchwork_15577 Summary ---

[Intel-gfx] [PATCH] drm/i915/rps: Add frequency translation helpers

2019-12-04 Thread Andi Shyti
Add two helpers that for reading the actual GT's frequency. The two helpers are: - intel_cagf_read: reads the frequency and returns it not normalized - intel_cagf_freq_read: provides the frequency in Hz. Use the above helpers in sysfs and debugfs. Signed-off-by: Andi Shyti ---

Re: [Intel-gfx] [PATCH 3/7] drm/i915/tgl: Select master trasconder for MST stream

2019-12-04 Thread Ville Syrjälä
On Tue, Dec 03, 2019 at 10:12:47PM +, Souza, Jose wrote: > On Tue, 2019-12-03 at 14:47 +0200, Ville Syrjälä wrote: > > On Mon, Dec 02, 2019 at 10:03:38PM +, Souza, Jose wrote: > > > On Thu, 2019-11-28 at 14:06 +0200, Ville Syrjälä wrote: > > > > On Thu, Nov 28, 2019 at 01:14:37AM +,

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET (rev7)

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET (rev7) URL : https://patchwork.freedesktop.org/series/70164/ State : warning == Summary == $ dim checkpatch origin/drm-tip b8f37a94c78c drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET -:462: WARNING:UNNECESSARY_ELSE: else

Re: [Intel-gfx] [PATCH] drm/i915/rps: Add frequency translation helpers

2019-12-04 Thread Chris Wilson
Quoting Andi Shyti (2019-12-04 10:30:14) > Add two helpers that for reading the actual GT's frequency. The > two helpers are: > > - intel_cagf_read: reads the frequency and returns it not >normalized > > - intel_cagf_freq_read: provides the frequency in Hz. > > Use the above helpers in

Re: [Intel-gfx] [PATCH v3 10/12] media: constify fb ops across all drivers

2019-12-04 Thread Sakari Ailus
On Tue, Dec 03, 2019 at 06:38:52PM +0200, Jani Nikula wrote: > Now that the fbops member of struct fb_info is const, we can start > making the ops const as well. > > Remove the redundant fbops assignments while at it. > > v2: > - actually add const in vivid > - fix typo (Christophe de Dinechin)

[Intel-gfx] [PATCH] drm/i915/gem: Try to flush pending unbind events

2019-12-04 Thread Chris Wilson
If we cannot handle a vma within the unbind loop, try to flush the pending events (i915_vma_parked, i915_vm_release) and try again. This avoids a round trip to userspace that is not guaranteed to make forward progress, as the events we wait upon require being idle. References: cb6c3d45f948

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: eDP DPCD aux backlight fixes (rev2)

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915: eDP DPCD aux backlight fixes (rev2) URL : https://patchwork.freedesktop.org/series/69914/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7479_full -> Patchwork_15572_full Summary

Re: [Intel-gfx] [PATCH v2] drm/i915: Copy across scheduler behaviour flags across submit fences

2019-12-04 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-12-04 14:12:42) > > On 04/12/2019 11:26, Chris Wilson wrote: > > We want the bonded request to have the same scheduler properties as its > > master so that it is placed at the same depth in the queue. For example, > > consider we have requests A, B and B', where B &

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v4,1/2] drm/i915/display/icl+: Do not program clockgating

2019-12-04 Thread Patchwork
== Series Details == Series: series starting with [v4,1/2] drm/i915/display/icl+: Do not program clockgating URL : https://patchwork.freedesktop.org/series/70404/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7479_full -> Patchwork_15573_full

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/perf: drop pointless static qualifier in i915_perf_add_config_ioctl()

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915/perf: drop pointless static qualifier in i915_perf_add_config_ioctl() URL : https://patchwork.freedesktop.org/series/70405/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7479_full -> Patchwork_15574_full

[Intel-gfx] [CI] drm/i915/gt: Bump the PP_DIR invalidation for Baytrail

2019-12-04 Thread Chris Wilson
Invalidate the ring TLB and increase the delay required for Baytrail. Signed-off-by: Chris Wilson --- .../gpu/drm/i915/gt/intel_ring_submission.c | 29 +-- 1 file changed, 26 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET (rev9)

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET (rev9) URL : https://patchwork.freedesktop.org/series/70164/ State : warning == Summary == $ dim checkpatch origin/drm-tip 96cd87266bd7 drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET -:462: WARNING:UNNECESSARY_ELSE: else

Re: [Intel-gfx] [PATCH v2] drm/i915: Copy across scheduler behaviour flags across submit fences

2019-12-04 Thread Tvrtko Ursulin
On 04/12/2019 11:26, Chris Wilson wrote: We want the bonded request to have the same scheduler properties as its master so that it is placed at the same depth in the queue. For example, consider we have requests A, B and B', where B & B' are a bonded pair to run in parallel on two engines.

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET (rev9)

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET (rev9) URL : https://patchwork.freedesktop.org/series/70164/ State : success == Summary == CI Bug Log - changes from CI_DRM_7480 -> Patchwork_15580 Summary ---

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Copy across scheduler behaviour flags across submit fences (rev2)

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915: Copy across scheduler behaviour flags across submit fences (rev2) URL : https://patchwork.freedesktop.org/series/70107/ State : success == Summary == CI Bug Log - changes from CI_DRM_7480 -> Patchwork_15579

Re: [Intel-gfx] [PATCH] drm/i915/gem: Try to flush pending unbind events

2019-12-04 Thread Matthew Auld
On Wed, 4 Dec 2019 at 12:36, Chris Wilson wrote: > > If we cannot handle a vma within the unbind loop, try to flush the > pending events (i915_vma_parked, i915_vm_release) and try again. This > avoids a round trip to userspace that is not guaranteed to make forward > progress, as the events we

[Intel-gfx] [PATCH i-g-t] i915/perf_pmu: Measure how many batches can fit into the ring

2019-12-04 Thread Chris Wilson
Do not blindly assume 30 spin batches will always fit into the ring, but use our measurement tool instead. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- tests/perf_pmu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c index

[Intel-gfx] [PATCH v2] drm/i915: Copy across scheduler behaviour flags across submit fences

2019-12-04 Thread Chris Wilson
We want the bonded request to have the same scheduler properties as its master so that it is placed at the same depth in the queue. For example, consider we have requests A, B and B', where B & B' are a bonded pair to run in parallel on two engines. A -> B \- B' B will run

Re: [Intel-gfx] [PATCH 4/7] drm/i915: Clean up intel_{pre, post}_plane_update()

2019-12-04 Thread Ville Syrjälä
On Tue, Dec 03, 2019 at 09:44:42PM +, Souza, Jose wrote: > On Thu, 2019-11-28 at 14:02 +0200, Ville Syrjälä wrote: > > On Wed, Nov 27, 2019 at 11:25:07PM +, Souza, Jose wrote: > > > On Wed, 2019-11-27 at 21:05 +0200, Ville Syrjala wrote: > > > > From: Ville Syrjälä > > > > > > > > Change

Re: [Intel-gfx] [PATCH] drm/i915/gem: Hook user-extensions upto MMAP_OFFSET_IOCTL

2019-12-04 Thread Matthew Auld
On Wed, 4 Dec 2019 at 16:29, Chris Wilson wrote: > > From: Chris Wilson > > Call i915_user_extensions() to validate the arg->extensions pointer, and > so return consistent error numbers for the future. > > Signed-off-by: Chris Wilson > Cc: Abdiel Janulgue > Cc: Matthew Auld > --- >

Re: [Intel-gfx] [PATCH] drm/i915/gem: Hook user-extensions upto MMAP_OFFSET_IOCTL

2019-12-04 Thread Chris Wilson
Quoting Matthew Auld (2019-12-04 16:52:12) > On Wed, 4 Dec 2019 at 16:29, Chris Wilson wrote: > > > > From: Chris Wilson > > > > Call i915_user_extensions() to validate the arg->extensions pointer, and > > so return consistent error numbers for the future. > > > > Signed-off-by: Chris Wilson >

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gem: Try to flush pending unbind events

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915/gem: Try to flush pending unbind events URL : https://patchwork.freedesktop.org/series/70435/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7482 -> Patchwork_15581 Summary ---

[Intel-gfx] [PATCH 6/9] drm/i915: Relocate intel_attached_dp()

2019-12-04 Thread Ville Syrjala
From: Ville Syrjälä We have uses for intel_attached_dp() outside of intel_dp.c. Move it to a header. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display_types.h | 5 + drivers/gpu/drm/i915/display/intel_dp.c| 5 - 2 files changed, 5 insertions(+), 5

Re: [Intel-gfx] [PATCH] Revert "drm/i915: use a separate context for gpu relocs"

2019-12-04 Thread Chris Wilson
Quoting Daniele Ceraolo Spurio (2019-12-03 22:19:07) > > > On 11/29/19 4:48 AM, Chris Wilson wrote: > > Since commit c45e788d95b4 ("drm/i915/tgl: Suspend pre-parser across GTT > > invalidations"), we now disable the advanced preparser on Tigerlake for the > > invalidation phase at the start of

Re: [Intel-gfx] [PATCH 3/7] drm/i915/tgl: Select master trasconder for MST stream

2019-12-04 Thread Souza, Jose
On Wed, 2019-12-04 at 12:55 +0200, Ville Syrjälä wrote: > On Tue, Dec 03, 2019 at 10:12:47PM +, Souza, Jose wrote: > > On Tue, 2019-12-03 at 14:47 +0200, Ville Syrjälä wrote: > > > On Mon, Dec 02, 2019 at 10:03:38PM +, Souza, Jose wrote: > > > > On Thu, 2019-11-28 at 14:06 +0200, Ville

Re: [Intel-gfx] [PATCH] drm/i915/gem: Hook user-extensions upto MMAP_OFFSET_IOCTL

2019-12-04 Thread Matthew Auld
On Wed, 4 Dec 2019 at 17:24, Chris Wilson wrote: > > Quoting Matthew Auld (2019-12-04 16:52:12) > > On Wed, 4 Dec 2019 at 16:29, Chris Wilson wrote: > > > > > > From: Chris Wilson > > > > > > Call i915_user_extensions() to validate the arg->extensions pointer, and > > > so return consistent

[Intel-gfx] [PATCH 3/9] drm/i915: Pass intel_encoder to enc_to_*()

2019-12-04 Thread Ville Syrjala
From: Ville Syrjälä Lots of enc_to_foo(>base) around. Simplify by passing in the intel_encoder instead. @find@ identifier F =~ "^enc_to_.*"; identifier E; @@ F(struct drm_encoder *E) { ... } @@ identifier find.F; identifier find.E; @@ F( - struct drm_encoder *E + struct intel_encoder *encoder

[Intel-gfx] [PATCH 2/9] drm/i915: Pass intel_connector to intel_attached_*()

2019-12-04 Thread Ville Syrjala
From: Ville Syrjälä Life is usually easier when we pass around intel_ types instead of drm_ types. In this case it might not be, but I think being consistent is a good thing anyway. Also some of this might get cleaned up a bit more later as we keep propagating the intel_ types further. @find@

[Intel-gfx] [PATCH 4/9] drm/i915: Use the passed in encoder

2019-12-04 Thread Ville Syrjala
From: Ville Syrjälä Just use the passed in encoder instead of digging it out via the legacy drm_connector->encoder pointer (which we'll want to stop using). Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_audio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)

[Intel-gfx] [PATCH 0/9] drm/i915: Cleanups around intel_attached_encoder() & co.

2019-12-04 Thread Ville Syrjala
From: Ville Syrjälä A bunch of cleanup around intel_attached_encoder() and its cousins. The main motivation is to make it easier to spot the remaining legacy drm_connector->encoder uses from the attached encoder's intel_connector->encoder. I'm working towards neutering the former in favor of

[Intel-gfx] [PATCH 5/9] drm/i915: Use intel_attached_encoder()

2019-12-04 Thread Ville Syrjala
From: Ville Syrjälä It's easy to confuse the drm_connector->encoder (legacy state adjusted during modeset) and intel_connector->encoder (the statically (sans. MST) attached encoder of the connector). For the latter let's use intel_attached_encoder() consistently. @@ identifier F !~

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gem: Try to flush pending unbind events

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915/gem: Try to flush pending unbind events URL : https://patchwork.freedesktop.org/series/70435/ State : warning == Summary == $ dim checkpatch origin/drm-tip 0b81c27c3b36 drm/i915/gem: Try to flush pending unbind events -:11: WARNING:COMMIT_LOG_LONG_LINE:

Re: [Intel-gfx] [PATCH 3/7] drm/i915/tgl: Select master trasconder for MST stream

2019-12-04 Thread Ville Syrjälä
On Wed, Dec 04, 2019 at 06:48:42PM +, Souza, Jose wrote: > On Wed, 2019-12-04 at 12:55 +0200, Ville Syrjälä wrote: > > On Tue, Dec 03, 2019 at 10:12:47PM +, Souza, Jose wrote: > > > On Tue, 2019-12-03 at 14:47 +0200, Ville Syrjälä wrote: > > > > On Mon, Dec 02, 2019 at 10:03:38PM +,

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] i915/perf_pmu: Measure how many batches can fit into the ring

2019-12-04 Thread Summers, Stuart
On Wed, 2019-12-04 at 13:20 +, Chris Wilson wrote: > Do not blindly assume 30 spin batches will always fit into the ring, > but > use our measurement tool instead. > > Signed-off-by: Chris Wilson > Cc: Tvrtko Ursulin > --- > tests/perf_pmu.c | 4 +++- > 1 file changed, 3 insertions(+), 1

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] i915/perf_pmu: Measure how many batches can fit into the ring

2019-12-04 Thread Chris Wilson
Quoting Summers, Stuart (2019-12-04 19:13:16) > On Wed, 2019-12-04 at 13:20 +, Chris Wilson wrote: > > Do not blindly assume 30 spin batches will always fit into the ring, > > but > > use our measurement tool instead. > > > > Signed-off-by: Chris Wilson > > Cc: Tvrtko Ursulin > > --- > >

[Intel-gfx] [PATCH i-g-t 1/2] Sync i915_drm.h

2019-12-04 Thread Chris Wilson
From: Chris Wilson Sync upto kernel commit cc662126b4134e25fcfb6cad480de0fa95a4d3d8 Author: Abdiel Janulgue Date: Wed Dec 4 12:00:32 2019 + drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET to expose MMAP_OFFSET_IOCTL Signed-off-by: Chris Wilson --- include/drm-uapi/i915_drm.h | 32

[Intel-gfx] [PATCH 8/9] drm/i915: Rename conn_to_dig_port() to intel_attached_dig_port()

2019-12-04 Thread Ville Syrjala
From: Ville Syrjälä Use the standard naming convention and rename conn_to_dig_port() to intel_attached_dig_port(). @@ @@ - conn_to_dig_port + intel_attached_dig_port (...) { ... } @@ expression C; @@ - conn_to_dig_port(C) + intel_attached_dig_port(C) Signed-off-by: Ville Syrjälä ---

[Intel-gfx] [PATCH 9/9] drm/i915/hdcp: Clean up local variables

2019-12-04 Thread Ville Syrjala
From: Ville Syrjälä Eliminate the inconsistencies in the hdcp code local variables: - use dev_priv over dev - use to_i915() instead of dev->dev_private - initialize variables when declaring them - a bit of declaration suffling to make appease ocd Signed-off-by: Ville Syrjälä ---

[Intel-gfx] [PATCH 7/9] drm/i915: Use intel_attached_dp() instead of hand rolling it

2019-12-04 Thread Ville Syrjala
From: Ville Syrjälä Replace the hand rolled intel_attached_dp() with the real thing. @@ identifier F !~ "^intel_attached_dp$"; expression C; @@ F(...) { <... - enc_to_intel_dp(intel_attached_encoder(C)) + intel_attached_dp(C) ...> } Signed-off-by: Ville Syrjälä ---

[Intel-gfx] [PATCH 1/9] drm/i915/hdcp: Nuke intel_hdcp_transcoder_config()

2019-12-04 Thread Ville Syrjala
From: Ville Syrjälä intel_hdcp_transcoder_config() is clobbering some globally visible state in .compute_config(). That is a big no no as .compute_config() is supposed to have no visible side effects when either the commit fails or it's just a TEST_ONLY commit. Inline this stuff into

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] i915/perf_pmu: Measure how many batches can fit into the ring

2019-12-04 Thread Summers, Stuart
On Wed, 2019-12-04 at 19:21 +, Chris Wilson wrote: > Quoting Summers, Stuart (2019-12-04 19:13:16) > > On Wed, 2019-12-04 at 13:20 +, Chris Wilson wrote: > > > Do not blindly assume 30 spin batches will always fit into the > > > ring, > > > but > > > use our measurement tool instead. > > >

[Intel-gfx] [PATCH i-g-t 2/2] tests/i915/gem_mmap_offset: Add new API test for gem_mmap_offset

2019-12-04 Thread Chris Wilson
From: Lukasz Kalamarz Few simple tests which tries to create / mmap buffer objects using GEM_MMAP_OFFSET uAPI. v2: change from WC -> WB (according to Chris review comment) v3: add mmap-offset-close-race test Signed-off-by: Lukasz Kalamarz Signed-off-by: Zbigniew Kempczyński Cc: Chris Wilson

[Intel-gfx] [PATCH] drm/i915/gem: Hook user-extensions upto MMAP_OFFSET_IOCTL

2019-12-04 Thread Chris Wilson
From: Chris Wilson Call i915_user_extensions() to validate the arg->extensions pointer, and so return consistent error numbers for the future. Signed-off-by: Chris Wilson Cc: Abdiel Janulgue Cc: Matthew Auld --- drivers/gpu/drm/i915/gem/i915_gem_mman.c | 8 ++-- 1 file changed, 6

Re: [Intel-gfx] [PATCH] drm/i915/gem: Hold the obj->vma.lock while walking the vma.list

2019-12-04 Thread Matthew Auld
On Wed, 4 Dec 2019 at 16:45, Chris Wilson wrote: > > Remember to take the lock before walking the obj->vma.list so that the > nodes do not change beneath us! E.g., > > i915_gem_object_bump_inactive_ggtt: i915_gem_object_bump_inactive_ggtt:387 > GEM_BUG_ON(vma->vm != >ggtt.vm) > > Closes:

[Intel-gfx] [PATCH] drm/i915/gem: Hold the obj->vma.lock while walking the vma.list

2019-12-04 Thread Chris Wilson
Remember to take the lock before walking the obj->vma.list so that the nodes do not change beneath us! E.g., i915_gem_object_bump_inactive_ggtt: i915_gem_object_bump_inactive_ggtt:387 GEM_BUG_ON(vma->vm != >ggtt.vm) Closes: https://gitlab.freedesktop.org/drm/intel/issues/691 Signed-off-by:

[Intel-gfx] [CI 2/2] drm/i915: Try hard to bind the context

2019-12-04 Thread Chris Wilson
It is not acceptable for context pinning to fail with -ENOSPC as we should always be able to make space in the GGTT. The only reason we may fail is that other "temporary" context pins are reserving their space and we need to wait for an available slot. Closes:

[Intel-gfx] [CI 1/2] drm/i915: Ignore most failures during evict-vm

2019-12-04 Thread Chris Wilson
Removing all vma from the VM is best effort -- we only remove all those ready to be removed, so forgive and VMA that becomes pinned. While forgiving those that become pinned, also take a second look for any that became unpinned as we waited. Signed-off-by: Chris Wilson ---

[Intel-gfx] [PATCH v2 3/3] drm/i915/display: Refactor intel_commit_modeset_disables()

2019-12-04 Thread José Roberto de Souza
Commit 9c722e17c1b9 ("drm/i915: Disable pipes in reverse order") reverted the order that pipes gets disabled because of TGL master/slave relationship between transcoders in MST mode. But as stated in a comment in skl_commit_modeset_enables() the enabling order is not always crescent, possibly

[Intel-gfx] [PATCH v2 1/3] drm/i915/display: Do not check for the ddb allocations of turned off pipes

2019-12-04 Thread José Roberto de Souza
It should not care about DDB allocations of pipes going through a fullmodeset, as at this point those pipes are disabled. The comment in the code also points to that but that was not what was being executed. Cc: Ville Syrjälä Signed-off-by: José Roberto de Souza ---

[Intel-gfx] [PATCH v2 2/3] drm/i915/display/tgl: Fix the order of the step to turn transcoder clock off

2019-12-04 Thread José Roberto de Souza
For TGL the step to turn off the transcoder clock was moved to after the complete shutdown of DDI. Only the MST slave transcoders should disable the clock before that. v2: - Adding last_mst_stream to intel_mst_post_disable_dp, make code more easy to read and is similar to first_mst_stream in

[Intel-gfx] [PATCH i-g-t] i915/gem_exec_balancer: Swap bond-chain engines over

2019-12-04 Thread Chris Wilson
Another situation arises where the master is on the same engine as its signaler. It is submitted to the second ELSP, causing the submission of its bonded pairs, but it remains blocked. However, if we do not stall the bonded pair, it will proceed to execute immediately ahead of its master

[Intel-gfx] [CI 3/3] drm/i915/gt: Bump the PP_DIR invalidation for Baytrail

2019-12-04 Thread Chris Wilson
Invalidate the ring TLB and increase the delay required for Baytrail. Signed-off-by: Chris Wilson --- .../gpu/drm/i915/gt/intel_ring_submission.c | 39 +-- 1 file changed, 35 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c

[Intel-gfx] [CI 1/3] drm/i915: Ignore most failures during evict-vm

2019-12-04 Thread Chris Wilson
Removing all vma from the VM is best effort -- we only remove all those ready to be removed, so forgive and VMA that becomes pinned. While forgiving those that become pinned, also take a second look for any that became unpinned as we waited. Signed-off-by: Chris Wilson ---

[Intel-gfx] [CI 2/3] drm/i915: Try hard to bind the context

2019-12-04 Thread Chris Wilson
It is not acceptable for context pinning to fail with -ENOSPC as we should always be able to make space in the GGTT. The only reason we may fail is that other "temporary" context pins are reserving their space and we need to wait for an available slot. Closes:

Re: [Intel-gfx] [PATCH] drm/i915/selftests: re-init the GT in live_gt_pm

2019-12-04 Thread Daniele Ceraolo Spurio
On 11/19/19 4:32 PM, Daniele Ceraolo Spurio wrote: On 11/19/19 4:21 PM, Chris Wilson wrote: Quoting Daniele Ceraolo Spurio (2019-11-20 00:04:25) When GuC is in use we need to make sure it is re-loaded before the call to gt_resume, otherwise communication from the engines to the GuC will

[Intel-gfx] [PATCH] drm/i915: Remove vestigal i915_gem_context locals from cmdparser

2019-12-04 Thread Chris Wilson
The use GEM context itself was removed in commit cd30a5031704 ("drm/i915/gem: Excise the per-batch whitelist from the context"), but the locals were left in place as an oversight. Remove the parameters and clean up. References: cd30a5031704 ("drm/i915/gem: Excise the per-batch whitelist from the

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gem: Hold the obj->vma.lock while walking the vma.list

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915/gem: Hold the obj->vma.lock while walking the vma.list URL : https://patchwork.freedesktop.org/series/70451/ State : failure == Summary == Applying: drm/i915/gem: Hold the obj->vma.lock while walking the vma.list Using index info to reconstruct a base

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Copy across scheduler behaviour flags across submit fences (rev3)

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915: Copy across scheduler behaviour flags across submit fences (rev3) URL : https://patchwork.freedesktop.org/series/70107/ State : warning == Summary == $ dim checkpatch origin/drm-tip dd51b5894071 drm/i915: Copy across scheduler behaviour flags across

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Copy across scheduler behaviour flags across submit fences (rev3)

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915: Copy across scheduler behaviour flags across submit fences (rev3) URL : https://patchwork.freedesktop.org/series/70107/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7484 -> Patchwork_15582

[Intel-gfx] [PULL] drm-misc-next-fixes

2019-12-04 Thread Sean Paul
Hi Dave & Daniel, A handful of fixes this week, all straightforward. drm-misc-next-fixes-2019-12-04: mgag200- Fix hw with broken 'startadd' support (Thomas) mst- Avoid skipping payloads in payload deletion loop (Wayne) omap- Fix dma_addr refcounting (Tomi) Cc: Wayne Lin Cc: Tomi Valkeinen

Re: [Intel-gfx] [PATCH v2 2/3] drm/i915/display/tgl: Fix the order of the step to turn transcoder clock off

2019-12-04 Thread Ville Syrjälä
On Wed, Dec 04, 2019 at 12:55:09PM -0800, José Roberto de Souza wrote: > For TGL the step to turn off the transcoder clock was moved to after > the complete shutdown of DDI. Only the MST slave transcoders should > disable the clock before that. > > v2: > - Adding last_mst_stream to

Re: [Intel-gfx] [RFC 06/13] drm/i915/svm: Page table mirroring support

2019-12-04 Thread Jerome Glisse
On Tue, Dec 03, 2019 at 11:19:43AM -0800, Niranjan Vishwanathapura wrote: > On Tue, Nov 26, 2019 at 06:32:52PM +, Jason Gunthorpe wrote: > > On Mon, Nov 25, 2019 at 11:33:27AM -0500, Jerome Glisse wrote: > > > On Fri, Nov 22, 2019 at 11:33:12PM +, Jason Gunthorpe wrote: > > > > On Fri, Nov

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Bump the PP_DIR invalidation for Baytrail

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915/gt: Bump the PP_DIR invalidation for Baytrail URL : https://patchwork.freedesktop.org/series/70442/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7485 -> Patchwork_15583 Summary

[Intel-gfx] [PATCH v3] drm/i915: Copy across scheduler behaviour flags across submit fences

2019-12-04 Thread Chris Wilson
We want the bonded request to have the same scheduler properties as its master so that it is placed at the same depth in the queue. For example, consider we have requests A, B and B', where B & B' are a bonded pair to run in parallel on two engines. A -> B \- B' B will run

Re: [Intel-gfx] [PATCH v2 1/3] drm/i915/display: Do not check for the ddb allocations of turned off pipes

2019-12-04 Thread Ville Syrjälä
On Wed, Dec 04, 2019 at 12:55:08PM -0800, José Roberto de Souza wrote: > It should not care about DDB allocations of pipes going through > a fullmodeset, as at this point those pipes are disabled. > The comment in the code also points to that but that was not what > was being executed. > > Cc:

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gem: Hook user-extensions upto MMAP_OFFSET_IOCTL

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915/gem: Hook user-extensions upto MMAP_OFFSET_IOCTL URL : https://patchwork.freedesktop.org/series/70450/ State : failure == Summary == Applying: drm/i915/gem: Hook user-extensions upto MMAP_OFFSET_IOCTL Using index info to reconstruct a base tree... M

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Cleanups around intel_attached_encoder() & co.

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915: Cleanups around intel_attached_encoder() & co. URL : https://patchwork.freedesktop.org/series/70456/ State : warning == Summary == $ dim checkpatch origin/drm-tip 199f293c61f6 drm/i915/hdcp: Nuke intel_hdcp_transcoder_config() 6802b68a8c89 drm/i915: Pass

[Intel-gfx] [PATCH] drm/i915/tgl: Program BW_BUDDY registers during display init

2019-12-04 Thread Matt Roper
Gen12 can improve bandwidth efficiency by pairing up memory requests with similar addresses. We need to program the BW_BUDDY1 and BW_BUDDY2 registers according to the memory configuration during display initialization to take advantage of this capability. The magic numbers we program here feel

Re: [Intel-gfx] [PATCH v3] drm/i915: Copy across scheduler behaviour flags across submit fences

2019-12-04 Thread Chris Wilson
Quoting Chris Wilson (2019-12-04 21:17:03) > We want the bonded request to have the same scheduler properties as its > master so that it is placed at the same depth in the queue. For example, > consider we have requests A, B and B', where B & B' are a bonded pair to > run in parallel on two

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Add new EHL/JSL PCI ids (rev2)

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915: Add new EHL/JSL PCI ids (rev2) URL : https://patchwork.freedesktop.org/series/70399/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7485 -> Patchwork_15586 Summary ---

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/tgl: Program BW_BUDDY registers during display init

2019-12-04 Thread Matt Roper
On Thu, Dec 05, 2019 at 01:46:48AM +, Patchwork wrote: > == Series Details == > > Series: drm/i915/tgl: Program BW_BUDDY registers during display init > URL : https://patchwork.freedesktop.org/series/70461/ > State : failure > > == Summary == > > CI Bug Log - changes from CI_DRM_7485 ->

Re: [Intel-gfx] [PATCH v3 05/12] video: fbdev: make fbops member of struct fb_info a const pointer

2019-12-04 Thread kbuild test robot
to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982] url: https://github.com/0day-ci/linux/commits/Jani-Nikula/video-drm-etc-constify-fbops-in-struct-fb_info/20191204-055320 base: git

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: eDP DPCD aux backlight fixes (rev3)

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915: eDP DPCD aux backlight fixes (rev3) URL : https://patchwork.freedesktop.org/series/69914/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7485 -> Patchwork_15589 Summary ---

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/tgl: Program BW_BUDDY registers during display init

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915/tgl: Program BW_BUDDY registers during display init URL : https://patchwork.freedesktop.org/series/70461/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7485 -> Patchwork_15590 Summary

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Remove vestigal i915_gem_context locals from cmdparser

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915: Remove vestigal i915_gem_context locals from cmdparser URL : https://patchwork.freedesktop.org/series/70467/ State : warning == Summary == $ dim checkpatch origin/drm-tip ffb501993b60 drm/i915: Remove vestigal i915_gem_context locals from cmdparser -:12:

Re: [Intel-gfx] [PATCH v3 03/13] drm/i915/bios: add support for querying DSC details for encoder

2019-12-04 Thread Kulkarni, Vandita
> -Original Message- > From: Jani Nikula > Sent: Tuesday, November 26, 2019 7:13 PM > To: intel-gfx@lists.freedesktop.org > Cc: Nikula, Jani ; Kulkarni, Vandita > ; Ville Syrjälä > Subject: [PATCH v3 03/13] drm/i915/bios: add support for querying DSC > details for encoder > > Add

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/tgl: Program BW_BUDDY registers during display init

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915/tgl: Program BW_BUDDY registers during display init URL : https://patchwork.freedesktop.org/series/70461/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/i915/tgl: Program BW_BUDDY registers during display init

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Copy across scheduler behaviour flags across submit fences (rev4)

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915: Copy across scheduler behaviour flags across submit fences (rev4) URL : https://patchwork.freedesktop.org/series/70107/ State : warning == Summary == $ dim checkpatch origin/drm-tip 9445907506b3 drm/i915: Copy across scheduler behaviour flags across

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Copy across scheduler behaviour flags across submit fences (rev4)

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915: Copy across scheduler behaviour flags across submit fences (rev4) URL : https://patchwork.freedesktop.org/series/70107/ State : success == Summary == CI Bug Log - changes from CI_DRM_7486 -> Patchwork_15592

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Remove vestigal i915_gem_context locals from cmdparser

2019-12-04 Thread Patchwork
== Series Details == Series: drm/i915: Remove vestigal i915_gem_context locals from cmdparser URL : https://patchwork.freedesktop.org/series/70467/ State : success == Summary == CI Bug Log - changes from CI_DRM_7486 -> Patchwork_15594

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/2] drm/i915: Ignore most failures during evict-vm

2019-12-04 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915: Ignore most failures during evict-vm URL : https://patchwork.freedesktop.org/series/70459/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7485 -> Patchwork_15588

[Intel-gfx] [PATCH i-g-t] i915/gem_exec_parse_blt: Fix COND_BBEND used by bb-start-(cmd|far)

2019-12-04 Thread Chris Wilson
Correct the COND_BBEND instruction to perform the compare and apply the relocation so that it looks at the correct address. In the process, prepare for pipelined failures. Signed-off-by: Chris Wilson Cc: Mika Kuoppala --- tests/i915/gem_exec_parse_blt.c | 116 +---

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/3] drm/i915/display: Do not check for the ddb allocations of turned off pipes

2019-12-04 Thread Patchwork
== Series Details == Series: series starting with [v2,1/3] drm/i915/display: Do not check for the ddb allocations of turned off pipes URL : https://patchwork.freedesktop.org/series/70462/ State : success == Summary == CI Bug Log - changes from CI_DRM_7486 -> Patchwork_15591

  1   2   >