Re: [Intel-gfx] [PATCH 1/3] drm/i915: Set all unused color plane offsets to ~0xfff again

2020-10-08 Thread Imre Deak
On Thu, Oct 08, 2020 at 01:16:06PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > When the number of potential color planes grew to 4 we stopped > setting all unused color plane offsets to ~0xfff. The code > still tries to do this, but actually does nothing since the > loop limits are

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Exclude low pages (128KiB) of stolen from use (rev3)

2020-10-08 Thread Patchwork
== Series Details == Series: drm/i915: Exclude low pages (128KiB) of stolen from use (rev3) URL : https://patchwork.freedesktop.org/series/82443/ State : warning == Summary == $ dim checkpatch origin/drm-tip b386647f0366 drm/i915: Exclude low pages (128KiB) of stolen from use -:142:

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Exclude low pages (128KiB) of stolen from use (rev3)

2020-10-08 Thread Patchwork
== Series Details == Series: drm/i915: Exclude low pages (128KiB) of stolen from use (rev3) URL : https://patchwork.freedesktop.org/series/82443/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/3] drm/i915: Reorder hpd init vs. display resume (rev3)

2020-10-08 Thread Patchwork
== Series Details == Series: series starting with [v2,1/3] drm/i915: Reorder hpd init vs. display resume (rev3) URL : https://patchwork.freedesktop.org/series/82417/ State : warning == Summary == $ dim checkpatch origin/drm-tip f5192fdf6756 drm/i915: Reorder hpd init vs. display resume -:26:

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for rm/i915: Add support for LTTPR non-transparent link training mode (rev2)

2020-10-08 Thread Patchwork
== Series Details == Series: rm/i915: Add support for LTTPR non-transparent link training mode (rev2) URL : https://patchwork.freedesktop.org/series/82449/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gem: Poison stolen pages before use

2020-10-08 Thread Patchwork
== Series Details == Series: drm/i915/gem: Poison stolen pages before use URL : https://patchwork.freedesktop.org/series/82463/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9113_full -> Patchwork_18653_full Summary

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev3)

2020-10-08 Thread Patchwork
== Series Details == Series: series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev3) URL : https://patchwork.freedesktop.org/series/82453/ State : success == Summary == CI Bug Log - changes from CI_DRM_9113 -> Patchwork_18659

[Intel-gfx] [PATCH] drm/i915: Verify the captured request is still active

2020-10-08 Thread Chris Wilson
Since the state we try and capture from the request is only stable while active (once the request is completed it may be retired, and unpin/free the logical state) double check the request has not yet completed. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gpu_error.c | 3 +++ 1

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/3] drm/i915: Reorder hpd init vs. display resume (rev3)

2020-10-08 Thread Patchwork
== Series Details == Series: series starting with [v2,1/3] drm/i915: Reorder hpd init vs. display resume (rev3) URL : https://patchwork.freedesktop.org/series/82417/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9113_full -> Patchwork_18657_full

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Verify the captured request is still active

2020-10-08 Thread Patchwork
== Series Details == Series: drm/i915: Verify the captured request is still active URL : https://patchwork.freedesktop.org/series/82478/ State : success == Summary == CI Bug Log - changes from CI_DRM_9113 -> Patchwork_18660 Summary ---

[Intel-gfx] PR - DG1 DMC v2.02

2020-10-08 Thread Srivatsa, Anusha
Sending PR for DG1 DMC for our CI to install DG1 DMC. The following changes since commit 58d41d0facca2478d3e45f6321224361519aee96: ice: Add comms package file for Intel E800 series driver (2020-10-05 08:09:03 -0400) are available in the Git repository at:

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev2)

2020-10-08 Thread Patchwork
== Series Details == Series: series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev2) URL : https://patchwork.freedesktop.org/series/82453/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9113 -> Patchwork_18656

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/3] drm/i915: Reorder hpd init vs. display resume (rev3)

2020-10-08 Thread Patchwork
== Series Details == Series: series starting with [v2,1/3] drm/i915: Reorder hpd init vs. display resume (rev3) URL : https://patchwork.freedesktop.org/series/82417/ State : success == Summary == CI Bug Log - changes from CI_DRM_9113 -> Patchwork_18657

[Intel-gfx] ✓ Fi.CI.BAT: success for rm/i915: Add support for LTTPR non-transparent link training mode (rev2)

2020-10-08 Thread Patchwork
== Series Details == Series: rm/i915: Add support for LTTPR non-transparent link training mode (rev2) URL : https://patchwork.freedesktop.org/series/82449/ State : success == Summary == CI Bug Log - changes from CI_DRM_9113 -> Patchwork_18658

Re: [Intel-gfx] [PATCH 1/2] drm/i915/dpcd_bl: Skip testing control capability with force DPCD quirk

2020-10-08 Thread Lyude Paul
On Thu, 2020-10-08 at 10:32 +0800, Kai-Heng Feng wrote: > Hi Lyude, > > > On Oct 8, 2020, at 05:53, Lyude Paul wrote: > > > > Hi! I thought this patch rang a bell, we actually already had some > > discussion > > about this since there's a couple of other systems this was causing issues > > for.

Re: [Intel-gfx] [PATCH v3 4/6] drm/dp: Add LTTPR helpers

2020-10-08 Thread Lyude Paul
Acked-by: Lyude Paul On Thu, 2020-10-08 at 19:46 +0300, Imre Deak wrote: > Hi Dave et all, > > On Wed, Oct 07, 2020 at 08:09:15PM +0300, Imre Deak wrote: > > Add the helpers and register definitions needed to read out the common > > and per-PHY LTTPR capabilities and perform link training in

Re: [Intel-gfx] [PATCH 1/2] drm/i915/dpcd_bl: Skip testing control capability with force DPCD quirk

2020-10-08 Thread Lyude Paul
oh hold on, I misspoke. Here's the patch I was thinking of: https://patchwork.freedesktop.org/series/82041/ On Thu, 2020-10-08 at 10:32 +0800, Kai-Heng Feng wrote: > Hi Lyude, > > > On Oct 8, 2020, at 05:53, Lyude Paul wrote: > > > > Hi! I thought this patch rang a bell, we actually already

Re: [Intel-gfx] [PATCH v3 4/6] drm/dp: Add LTTPR helpers

2020-10-08 Thread Imre Deak
Hi Dave et all, On Wed, Oct 07, 2020 at 08:09:15PM +0300, Imre Deak wrote: > Add the helpers and register definitions needed to read out the common > and per-PHY LTTPR capabilities and perform link training in the LTTPR > non-transparent mode. > > v2: > - Add drm_dp_dpcd_read_phy_link_status()

[Intel-gfx] ✓ Fi.CI.IGT: success for rm/i915: Add support for LTTPR non-transparent link training mode (rev2)

2020-10-08 Thread Patchwork
== Series Details == Series: rm/i915: Add support for LTTPR non-transparent link training mode (rev2) URL : https://patchwork.freedesktop.org/series/82449/ State : success == Summary == CI Bug Log - changes from CI_DRM_9113_full -> Patchwork_18658_full

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gem: Poison stolen pages before use

2020-10-08 Thread Patchwork
== Series Details == Series: drm/i915/gem: Poison stolen pages before use URL : https://patchwork.freedesktop.org/series/82463/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. -

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gem: Poison stolen pages before use

2020-10-08 Thread Patchwork
== Series Details == Series: drm/i915/gem: Poison stolen pages before use URL : https://patchwork.freedesktop.org/series/82463/ State : success == Summary == CI Bug Log - changes from CI_DRM_9113 -> Patchwork_18653 Summary ---

Re: [Intel-gfx] [v7 04/10] drm/i915/display: Enable BT2020 for HDR on LSPCON devices

2020-10-08 Thread Ville Syrjälä
On Tue, Oct 06, 2020 at 06:36:48PM +0530, Uma Shankar wrote: > Enable Colorspace as BT2020 if driving HDR content.Sending Colorimetry > data for HDR using AVI infoframe. LSPCON firmware expects this and though > SOC drives DP, for HDMI panel AVI infoframe is sent to the LSPCON device > which

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch

2020-10-08 Thread Patchwork
== Series Details == Series: series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch URL : https://patchwork.freedesktop.org/series/82453/ State : success == Summary == CI Bug Log - changes from CI_DRM_9111 -> Patchwork_18651

Re: [Intel-gfx] [PATCH 3/3] drm/i915: s/int/u32/ for aux_offset/alignment

2020-10-08 Thread Imre Deak
On Thu, Oct 08, 2020 at 01:16:08PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > ggtt offsets/alignments are u32 everywhere else. Don't use > a signed int for them here. > > Signed-off-by: Ville Syrjälä Reviewed-by: Imre Deak > --- > drivers/gpu/drm/i915/display/intel_display.c | 4

Re: [Intel-gfx] [v7 01/10] drm/i915/display: Add HDR Capability detection for LSPCON

2020-10-08 Thread Shankar, Uma
> -Original Message- > From: Ville Syrjälä > Sent: Thursday, October 8, 2020 4:25 PM > To: Shankar, Uma > Cc: intel-gfx@lists.freedesktop.org > Subject: Re: [v7 01/10] drm/i915/display: Add HDR Capability detection for > LSPCON > > On Tue, Oct 06, 2020 at 06:36:45PM +0530, Uma Shankar

[Intel-gfx] [PATCH v3] drm/i915: Exclude low pages (128KiB) of stolen from use

2020-10-08 Thread Chris Wilson
The GPU is trashing the low pages of its reserved memory upon reset. If we are using this memory for ringbuffers, then we will dutiful resubmit the trashed rings after the reset causing further resets, and worse. We must exclude this range from our own use. The value of 128KiB was found by

Re: [Intel-gfx] [PATCH] drm/i915/gem: Poison stolen pages before use

2020-10-08 Thread Mika Kuoppala
Chris Wilson writes: > When allocating objects from stolen, memset() the backing store to > POISON_INUSE (0x5a) to help identify any uninitialised use of a stolen > object. > > Signed-off-by: Chris Wilson Reviewed-by: Mika Kuoppala > --- > drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 33

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gem: Poison stolen pages before use

2020-10-08 Thread Patchwork
== Series Details == Series: drm/i915/gem: Poison stolen pages before use URL : https://patchwork.freedesktop.org/series/82463/ State : warning == Summary == $ dim checkpatch origin/drm-tip 5dcceb34889a drm/i915/gem: Poison stolen pages before use -:39: WARNING:MEMORY_BARRIER: memory barrier

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/3] drm/i915: Reorder hpd init vs. display resume (rev2)

2020-10-08 Thread Patchwork
== Series Details == Series: series starting with [v2,1/3] drm/i915: Reorder hpd init vs. display resume (rev2) URL : https://patchwork.freedesktop.org/series/82417/ State : warning == Summary == $ dim checkpatch origin/drm-tip 9bfa4d97c74e drm/i915: Reorder hpd init vs. display resume -:26:

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915: Set all unused color plane offsets to ~0xfff again (rev2)

2020-10-08 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915: Set all unused color plane offsets to ~0xfff again (rev2) URL : https://patchwork.freedesktop.org/series/82462/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9113 -> Patchwork_18655

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Set all unused color plane offsets to ~0xfff again

2020-10-08 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915: Set all unused color plane offsets to ~0xfff again URL : https://patchwork.freedesktop.org/series/82462/ State : success == Summary == CI Bug Log - changes from CI_DRM_9111 -> Patchwork_18652

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Verify the captured request is still active

2020-10-08 Thread Patchwork
== Series Details == Series: drm/i915: Verify the captured request is still active URL : https://patchwork.freedesktop.org/series/82478/ State : success == Summary == CI Bug Log - changes from CI_DRM_9113_full -> Patchwork_18660_full

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v10,01/11] HAX to make DSC work on the icelake test system

2020-10-08 Thread Patchwork
== Series Details == Series: series starting with [v10,01/11] HAX to make DSC work on the icelake test system URL : https://patchwork.freedesktop.org/series/82483/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be

[Intel-gfx] [PATCH i-g-t v3] prime_vgem: Check that we wrap the vgem mmap with userptr

2020-10-08 Thread Chris Wilson
This came up in a discussion about importing virtio dma-buf, which are themselves plain shmemfs objects and so not only backed by struct pages, but wrappable by userptr. vgem share the same properties and so should serve as a useful proxy for testing. Signed-off-by: Chris Wilson Cc: "Graunke,

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev3)

2020-10-08 Thread Patchwork
== Series Details == Series: series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev3) URL : https://patchwork.freedesktop.org/series/82453/ State : success == Summary == CI Bug Log - changes from CI_DRM_9113_full ->

[Intel-gfx] [PATCH v10 03/11] drm/i915: Add hw.pipe_mode to allow bigjoiner pipe/transcoder split

2020-10-08 Thread Manasi Navare
From: Maarten Lankhorst With bigjoiner, there will be 2 pipes driving 2 halfs of 1 transcoder, because of this, we need a pipe_mode for various calculations, including for example watermarks, plane clipping, etc. v6: * renaming in separate function, only pipe_mode here (Ville) * Add description

[Intel-gfx] [PATCH v10 05/11] drm/i915: Try to make bigjoiner work in atomic check

2020-10-08 Thread Manasi Navare
From: Maarten Lankhorst When the clock is higher than the dotclock, try with 2 pipes enabled. If we can enable 2, then we will go into big joiner mode, and steal the adjacent crtc. This only links the crtc's in software, no hardware or plane programming is done yet. Blobs are also copied

[Intel-gfx] [PATCH v10 01/11] HAX to make DSC work on the icelake test system

2020-10-08 Thread Manasi Navare
From: Maarten Lankhorst DSC is available on the display emulator, but not set in DPCD. Override the entries to allow bigjoiner testing. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/drm_dp_helper.c | 4 ++-- include/drm/drm_dp_helper.h | 1 + 2 files changed, 3 insertions(+), 2

[Intel-gfx] [PATCH v10 02/11] drm/i915/display: Rename pipe_timings to transcoder_timings

2020-10-08 Thread Manasi Navare
No functional changes in this patch. With Bigjoiner, there are 2 pipes driving 2 halfs of 1 transcoder. The transcoder_mode has the full timings, and is used for configuring the transcoder with the intended mode after joining the 2 halves. To clear the confusion, we rename intel_set_pipe_timings

[Intel-gfx] [PATCH v10 11/11] drm/i915: Add debugfs dumping for bigjoiner, v3.

2020-10-08 Thread Manasi Navare
From: Maarten Lankhorst Dump debugfs and planar links as well, this will make it easier to debug when things go wrong. v4: * Rebase Changes since v1: - Report planar slaves as such, now that we have the plane_state switch. Changes since v2: - Rebase on top of the new plane format dumping

[Intel-gfx] [PATCH v10 09/11] drm/i915: Add bigjoiner aware plane clipping checks

2020-10-08 Thread Manasi Navare
From: Maarten Lankhorst We need to look at hw.fb for the framebuffer, and add the translation for the slave_plane_state. With these changes we set the correct rectangle on the bigjoiner slave, and don't set incorrect src/dst/visibility on the slave plane. v2: * Manual rebase (Manasi)

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v10,01/11] HAX to make DSC work on the icelake test system

2020-10-08 Thread Patchwork
== Series Details == Series: series starting with [v10,01/11] HAX to make DSC work on the icelake test system URL : https://patchwork.freedesktop.org/series/82483/ State : success == Summary == CI Bug Log - changes from CI_DRM_9113 -> Patchwork_18662

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/display: Use fallthrough pseudo-keyword

2020-10-08 Thread Patchwork
== Series Details == Series: drm/i915/display: Use fallthrough pseudo-keyword URL : https://patchwork.freedesktop.org/series/82486/ State : failure == Summary == Applying: drm/i915/display: Use fallthrough pseudo-keyword Using index info to reconstruct a base tree... M

[Intel-gfx] [PATCH v3 3/3] drm/i915/vbt: Add VRR VBT toggle

2020-10-08 Thread José Roberto de Souza
This will be used in future but already adding to VBT so we are updated with VBT changes. Reviewed-by: Matt Roper Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_vbt_defs.h | 1 + 1 file changed, 1 insertion(+) diff --git

[Intel-gfx] [PATCH v3 2/3] drm/i915/vbt: Update the version and expected size of BDB_GENERAL_DEFINITIONS map

2020-10-08 Thread José Roberto de Souza
This will remove the "Expected child device config size for VBT version 235 not known" debug message seen in TGL, although this is not fixing anything it good to keep our VBT parser updated. Reviewed-by: Matt Roper Signed-off-by: José Roberto de Souza ---

[Intel-gfx] [PATCH v3 1/3] drm/i915/vbt: Fix backlight parsing for VBT 234+

2020-10-08 Thread José Roberto de Souza
Child min_brightness is obsolete from VBT 234+, instead the new min_brightness field in the main structure should be used. This new field is 16 bits wide, so backlight_precision_bits is needed to check if value needs to be scaled down but it is only available in VBT 236+ so working around it by

[Intel-gfx] [PATCH i-g-t v2] prime_vgem: Check that we wrap the vgem mmap with userptr

2020-10-08 Thread Chris Wilson
This came up in a discussion about importing virtio dma-buf, which are themselves plain shmemfs objects and so not only backed by struct pages, but wrappable by userptr. vgem share the same properties and so should serve as a useful proxy for testing. Signed-off-by: Chris Wilson Cc: "Graunke,

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v3,1/3] drm/i915/vbt: Fix backlight parsing for VBT 234+

2020-10-08 Thread Patchwork
== Series Details == Series: series starting with [v3,1/3] drm/i915/vbt: Fix backlight parsing for VBT 234+ URL : https://patchwork.freedesktop.org/series/82482/ State : success == Summary == CI Bug Log - changes from CI_DRM_9113_full -> Patchwork_18661_full

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/3] drm/i915/vbt: Fix backlight parsing for VBT 234+

2020-10-08 Thread Patchwork
== Series Details == Series: series starting with [v3,1/3] drm/i915/vbt: Fix backlight parsing for VBT 234+ URL : https://patchwork.freedesktop.org/series/82482/ State : success == Summary == CI Bug Log - changes from CI_DRM_9113 -> Patchwork_18661

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v10,01/11] HAX to make DSC work on the icelake test system

2020-10-08 Thread Patchwork
== Series Details == Series: series starting with [v10,01/11] HAX to make DSC work on the icelake test system URL : https://patchwork.freedesktop.org/series/82483/ State : warning == Summary == $ dim checkpatch origin/drm-tip 999aa92a11f0 HAX to make DSC work on the icelake test system

[Intel-gfx] [PATCH v10 07/11] drm/i915: Make hardware readout work on i915.

2020-10-08 Thread Manasi Navare
From: Maarten Lankhorst Unfortunately I have no way to test this, but it should be correct if the bios sets up bigjoiner in a sane way. Skip iterating over bigjoiner slaves, only the master has the state we care about. Add the width of the bigjoiner slave to the reconstructed fb. Hide the

[Intel-gfx] [PATCH v10 06/11] drm/i915: Enable big joiner support in enable and disable sequences.

2020-10-08 Thread Manasi Navare
From: Maarten Lankhorst Make vdsc work when no output is enabled. The big joiner needs VDSC on the slave, so enable it and set the appropriate bits. Also update timestamping constants, because slave crtc's are not updated in drm_atomic_helper_update_legacy_modeset_state(). This should be enough

[Intel-gfx] [PATCH v10 10/11] drm/i915: Ensure correct master/slave enable/disable sequence

2020-10-08 Thread Manasi Navare
From: Maarten Lankhorst Enabling is done in a special sequence and so should plane updates be. Ideally the end user never notices the second pipe is used. This way ideally everything will be tear free, and updates are really atomic as userspace expects it. This uses generic modeset_enables()

[Intel-gfx] [PATCH v10 04/11] drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3.

2020-10-08 Thread Manasi Navare
From: Maarten Lankhorst Small changes to intel_dp_mode_valid(), allow listing modes that can only be supported in the bigjoiner configuration, which is not supported yet. eDP does not support bigjoiner, so do not expose bigjoiner only modes on the eDP port. v7: * Add can_bigjoiner() helper

[Intel-gfx] [PATCH v10 08/11] drm/i915: Link planes in a bigjoiner configuration, v3.

2020-10-08 Thread Manasi Navare
From: Maarten Lankhorst Make sure that when a plane is set in a bigjoiner mode, we will add their counterpart to the atomic state as well. This will allow us to make sure all state is available when planes are checked. Because of the funny interactions with bigjoiner and planar YUV formats,

[Intel-gfx] [PATCH][next] drm/i915/display: Use fallthrough pseudo-keyword

2020-10-08 Thread Gustavo A. R. Silva
In order to enable -Wimplicit-fallthrough for Clang[1], replace the existing /* fall through */ comments with the new pseudo-keyword macro fallthrough[2]. [1] https://git.kernel.org/linus/e2079e93f562c7f7a030eb7642017ee5eabaaa10 [2]

Re: [Intel-gfx] [PATCH 1/2] drm/i915/dpcd_bl: Skip testing control capability with force DPCD quirk

2020-10-08 Thread Satadru Pramanik
Kevin Chowski said he would be geting to working on upstreaming a version of that which was in the ChromeOS tree here: https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/2344844 when I last spoke to hi (This was two weeks ago.) Kevin - do you have any input on this?

[Intel-gfx] [PATCH i-g-t] prime_vgem: Check that we wrap the vgem mmap with userptr

2020-10-08 Thread Chris Wilson
This came up in a discussion about importing virtio dma-buf, which are themselves plain shmemfs objects and so not only backed by struct pages, but wrappable by userptr. vgem share the same properties and so should serve as a useful proxy for testing. Signed-off-by: Chris Wilson Cc: "Graunke,

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v10,01/11] HAX to make DSC work on the icelake test system

2020-10-08 Thread Patchwork
== Series Details == Series: series starting with [v10,01/11] HAX to make DSC work on the icelake test system URL : https://patchwork.freedesktop.org/series/82483/ State : success == Summary == CI Bug Log - changes from CI_DRM_9113_full -> Patchwork_18662_full

[Intel-gfx] ✓ Fi.CI.BAT: success for rm/i915: Add support for LTTPR non-transparent link training mode

2020-10-08 Thread Patchwork
== Series Details == Series: rm/i915: Add support for LTTPR non-transparent link training mode URL : https://patchwork.freedesktop.org/series/82449/ State : success == Summary == CI Bug Log - changes from CI_DRM_9111 -> Patchwork_18649

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/3] drm/i915: Reorder hpd init vs. display resume (rev2)

2020-10-08 Thread Patchwork
== Series Details == Series: series starting with [v2,1/3] drm/i915: Reorder hpd init vs. display resume (rev2) URL : https://patchwork.freedesktop.org/series/82417/ State : success == Summary == CI Bug Log - changes from CI_DRM_9111 -> Patchwork_18650

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Skip aux plane stuff when there is no aux plane

2020-10-08 Thread Imre Deak
On Thu, Oct 08, 2020 at 01:16:07PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > when the hardware isn't going to use the aux plane there's no > real point in dealing with the relevant hardware restrictions. > So let's just skip all that when not necessary. > > We can now also remove

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Exclude low pages (128KiB) of stolen from use (rev3)

2020-10-08 Thread Patchwork
== Series Details == Series: drm/i915: Exclude low pages (128KiB) of stolen from use (rev3) URL : https://patchwork.freedesktop.org/series/82443/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9113 -> Patchwork_18654

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for rm/i915: Add support for LTTPR non-transparent link training mode

2020-10-08 Thread Patchwork
== Series Details == Series: rm/i915: Add support for LTTPR non-transparent link training mode URL : https://patchwork.freedesktop.org/series/82449/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] [PATCH 03/20] drm/i915: Add PORT_TCn aliases to enum port

2020-10-08 Thread Ville Syrjälä
On Wed, Oct 07, 2020 at 03:28:48PM -0700, Lucas De Marchi wrote: > On Tue, Oct 06, 2020 at 05:33:32PM +0300, Ville Syrjälä wrote: > >diff --git a/drivers/gpu/drm/i915/display/intel_display.h > >b/drivers/gpu/drm/i915/display/intel_display.h > >index 8c93253cbd95..a39be3c9e0cf 100644 > >---

Re: [Intel-gfx] [PATCH v2 1/3] drm/i915: Reorder hpd init vs. display resume

2020-10-08 Thread Ville Syrjälä
On Wed, Oct 07, 2020 at 06:15:47PM -0400, Lyude Paul wrote: > On Wed, 2020-10-07 at 22:22 +0300, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > Currently we call .hpd_irq_setup() directly just before display > > resume, and follow it with another call via intel_hpd_init() > > just

Re: [Intel-gfx] [PATCH 07/20] drm/i915: Use AUX_CH_USBCn for the RKL VBT AUX CH setup

2020-10-08 Thread Ville Syrjälä
On Wed, Oct 07, 2020 at 04:11:45PM -0700, Lucas De Marchi wrote: > On Tue, Oct 06, 2020 at 05:33:36PM +0300, Ville Syrjälä wrote: > >From: Ville Syrjälä > > > >As with the VBT DVO port, RKL uses PHY based mapping for the > >VBT AUX CH. Adjust the code to use the new AUX_USBCn names > >and add a

Re: [Intel-gfx] [PATCH 05/20] drm/i915: Introduce AUX_CH_USBCn

2020-10-08 Thread Lucas De Marchi
On Thu, Oct 08, 2020 at 11:40:28AM +0300, Ville Syrjälä wrote: On Wed, Oct 07, 2020 at 03:51:11PM -0700, Lucas De Marchi wrote: On Tue, Oct 06, 2020 at 05:33:34PM +0300, Ville Syrjälä wrote: >From: Ville Syrjälä > >Just like with the DDIs tgl+ renamed the AUX CHs to reflect >the type of the

Re: [Intel-gfx] [PATCH] drm/fb-helper: Add locking to sysrq handling

2020-10-08 Thread Thomas Zimmermann
Hi Am 07.10.20 um 15:30 schrieb Daniel Vetter: > We didn't take the kernel_fb_helper_lock mutex, which protects that > code. While at it, simplify the code > - inline the function (originally shared with kgdb I think) > - drop the error tracking and all the complications > - drop the pointless

Re: [Intel-gfx] [PATCH v2] drm/i915: Exclude low pages (128KiB) of stolen from use

2020-10-08 Thread Ville Syrjälä
On Thu, Oct 08, 2020 at 11:12:37AM +0100, Chris Wilson wrote: > Quoting Ville Syrjälä (2020-10-08 11:04:22) > > On Thu, Oct 08, 2020 at 10:54:36AM +0100, Chris Wilson wrote: > > > The GPU is trashing the low pages of its reserved memory upon reset. If > > > we are using this memory for

Re: [Intel-gfx] [PATCH 05/20] drm/i915: Introduce AUX_CH_USBCn

2020-10-08 Thread Ville Syrjälä
On Wed, Oct 07, 2020 at 03:51:11PM -0700, Lucas De Marchi wrote: > On Tue, Oct 06, 2020 at 05:33:34PM +0300, Ville Syrjälä wrote: > >From: Ville Syrjälä > > > >Just like with the DDIs tgl+ renamed the AUX CHs to reflect > >the type of the DDI. Let's add the aliasing enum values for > >the type-C

Re: [Intel-gfx] [PATCH] drm/fb-helper: Add locking to sysrq handling

2020-10-08 Thread Daniel Vetter
On Thu, Oct 8, 2020 at 11:22 AM Thomas Zimmermann wrote: > > Hi > > Am 07.10.20 um 15:30 schrieb Daniel Vetter: > > We didn't take the kernel_fb_helper_lock mutex, which protects that > > code. While at it, simplify the code > > - inline the function (originally shared with kgdb I think) > > -

Re: [Intel-gfx] [PATCH 2/2] drm/atomic: debug output for EBUSY

2020-10-08 Thread Daniel Vetter
On Tue, Sep 29, 2020 at 04:48:39PM +0100, Daniel Stone wrote: > Hi, > > On Fri, 25 Sep 2020 at 09:46, Daniel Vetter wrote: > > Hopefully we'll have the drm crash recorder RSN, but meanwhile > > compositors would like to know a bit better why they get an EBUSY. > > Thanks a lot, this is super

[Intel-gfx] [PATCH v2] drm/i915: Exclude low pages (128KiB) of stolen from use

2020-10-08 Thread Chris Wilson
The GPU is trashing the low pages of its reserved memory upon reset. If we are using this memory for ringbuffers, then we will dutiful resubmit the trashed rings after the reset causing further resets, and worse. We must exclude this range from our own use. The value of 128KiB was found by

Re: [Intel-gfx] [PATCH v2] drm/i915: Exclude low pages (128KiB) of stolen from use

2020-10-08 Thread Ville Syrjälä
On Thu, Oct 08, 2020 at 10:54:36AM +0100, Chris Wilson wrote: > The GPU is trashing the low pages of its reserved memory upon reset. If > we are using this memory for ringbuffers, then we will dutiful resubmit > the trashed rings after the reset causing further resets, and worse. We > must exclude

Re: [Intel-gfx] [PATCH v2] drm/i915: Exclude low pages (128KiB) of stolen from use

2020-10-08 Thread Chris Wilson
Quoting Ville Syrjälä (2020-10-08 11:04:22) > On Thu, Oct 08, 2020 at 10:54:36AM +0100, Chris Wilson wrote: > > The GPU is trashing the low pages of its reserved memory upon reset. If > > we are using this memory for ringbuffers, then we will dutiful resubmit > > the trashed rings after the reset

[Intel-gfx] [PATCH 2/3] drm/i915: Skip aux plane stuff when there is no aux plane

2020-10-08 Thread Ville Syrjala
From: Ville Syrjälä when the hardware isn't going to use the aux plane there's no real point in dealing with the relevant hardware restrictions. So let's just skip all that when not necessary. We can now also remove the offset=~0xfff behaviour for unused color planes. Let's just zero out

[Intel-gfx] [PATCH 3/3] drm/i915: s/int/u32/ for aux_offset/alignment

2020-10-08 Thread Ville Syrjala
From: Ville Syrjälä ggtt offsets/alignments are u32 everywhere else. Don't use a signed int for them here. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

[Intel-gfx] [PATCH 1/3] drm/i915: Set all unused color plane offsets to ~0xfff again

2020-10-08 Thread Ville Syrjala
From: Ville Syrjälä When the number of potential color planes grew to 4 we stopped setting all unused color plane offsets to ~0xfff. The code still tries to do this, but actually does nothing since the loop limits are bogus. skl_check_main_surface() actually depends on this ~0xfff behaviour as

[Intel-gfx] [PATCH] drm/i915/gem: Poison stolen pages before use

2020-10-08 Thread Chris Wilson
When allocating objects from stolen, memset() the backing store to POISON_INUSE (0x5a) to help identify any uninitialised use of a stolen object. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 33 ++ 1 file changed, 33 insertions(+) diff --git

Re: [Intel-gfx] [v7 01/10] drm/i915/display: Add HDR Capability detection for LSPCON

2020-10-08 Thread Ville Syrjälä
On Tue, Oct 06, 2020 at 06:36:45PM +0530, Uma Shankar wrote: > LSPCON firmware exposes HDR capability through LPCON_CAPABILITIES > DPCD register. LSPCON implementations capable of supporting > HDR set HDR_CAPABILITY bit in LSPCON_CAPABILITIES to 1. This patch > reads the same, detects the HDR

Re: [Intel-gfx] [PATCH v5 3/3] drm/i915/display: Program PSR2 selective fetch registers

2020-10-08 Thread Mun, Gwan-gyeong
Looks good to me. Reviewed-by: Gwan-gyeong Mun On Wed, 2020-10-07 at 12:52 -0700, José Roberto de Souza wrote: > Another step towards PSR2 selective fetch, here programming plane > selective fetch registers and MAN_TRK_CTL enabling selective fetch > but > for now it is fetching the whole area