This patch is intended for drm-misc, where the issue comes from.
Lucas De Marchi
On Sat, Jun 05, 2021 at 12:30:18AM +, Patchwork wrote:
== Series Details ==
Series: dma-buf: fix build due to missing export
URL : https://patchwork.freedesktop.org/series/91045/
State : failure
== Summary
On Fri, Jun 04, 2021 at 02:00:33PM -0500, Jason Ekstrand wrote:
> On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
> >
> > Move active request tracking and its lock to i915_sched_engine. This
> > lock is also the submission lock so having it in the i915_sched_engine
> > is the correct place.
>
On Fri, Jun 04, 2021 at 02:17:58PM -0500, Jason Ekstrand wrote:
> On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
> >
> > Rather passing around an intel_engine_cs in the scheduling code, pass
> > around a i915_sched_engine.
>
>
>
> > Signed-off-by: Matthew Brost
> > ---
> >
== Series Details ==
Series: Pipe DMC Support (rev5)
URL : https://patchwork.freedesktop.org/series/90445/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
== Series Details ==
Series: drm + usb-type-c: Add support for out-of-band hotplug notification
(rev4)
URL : https://patchwork.freedesktop.org/series/89604/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10171 -> Patchwork_20287
== Series Details ==
Series: drm + usb-type-c: Add support for out-of-band hotplug notification
(rev4)
URL : https://patchwork.freedesktop.org/series/89604/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10171_full -> Patchwork_20287_full
On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
>
> Rather than touching execlist specific structures in the generic
> scheduling code, add a callback function in the backend.
Seems reasonable but why does the function that's there today do
nothing for the ringbuffer and current GuC
On 2021-06-02 4:26 p.m., Shankar, Uma wrote:
>
>
>> -Original Message-
>> From: Pekka Paalanen
>> Sent: Wednesday, June 2, 2021 3:04 PM
>> To: Shankar, Uma
>> Cc: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org; Modem,
>> Bhanuprakash
>> Subject: Re: [PATCH 01/21]
== Series Details ==
Series: Pipe DMC Support (rev5)
URL : https://patchwork.freedesktop.org/series/90445/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10171 -> Patchwork_20286
Summary
---
**SUCCESS**
No
Here is v3 of my patchset making DP over Type-C work on devices where the
Type-C controller does not drive the HPD pin on the GPU, but instead
we need to forward HPD events from the Type-C controller to the DRM driver.
Changes in v4:
- Rebase on top of latest drm-tip
- Add forward declaration for
Give connector sysfs devices there own device_type, this allows us to
check if a device passed to functions dealing with generic devices is
a drm_connector or not.
A check like this is necessary in the drm_connector_acpi_bus_match()
function added in the next patch in this series.
Tested-by:
On Sat, 5 Jun 2021 at 03:39, Daniel Vetter wrote:
>
> On Wed, May 26, 2021 at 04:33:56PM -0700, Matthew Brost wrote:
> > Add entry for i915 GuC submission / DRM scheduler integration plan.
> > Follow up patch with details of new parallel submission uAPI to come.
> >
> > v2:
> > (Daniel Vetter)
>
Thanks for staying with me! Still hoping I can get back to using KMS/Wayland
combination with my setup.
I understand the current recommendation is to push the mode setting to the
wayland compositor per Ville here:
https://gitlab.freedesktop.org/drm/intel/-/issues/393#note_337616
Alas, I am
Helps to fixe skia test failures on adl_p platform.
Cc: Matt Roper
Cc: Lucas De Marchi
Signed-off-by: Nataraj Deshpande
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
New binaries for all platforms.
Cc: Matthew Brost
Cc: John Harrison
The following changes since commit f8462923ed8fc874f770b8c6dfad49d39b381f14:
nvidia: fix symlinks for tu104/tu106 acr unload firmware (2021-05-18 11:03:08
-0400)
are available in the Git repository at:
== Series Details ==
Series: drm/i915/adl_p: Extend Wa_1606931601 for ADL-P
URL : https://patchwork.freedesktop.org/series/91042/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10171 -> Patchwork_20288
Summary
---
Thank you very much Mark, for testing the patch and providing the "Tested-by"
tag.
I shall incorporate you review comments and submit the patch.
Additionally, we have submitted the kernel alternative
https://patchwork.freedesktop.org/patch/436199/
Regards
Vidya
-Original Message-
Thank you very much Mark, for testing the patch and providing the "Tested-by"
tag.
Regards
Vidya
-Original Message-
From: Mark Yacoub
Sent: Friday, June 4, 2021 11:58 PM
To: Srinivas, Vidya
Cc: intel-gfx@lists.freedesktop.org; igt-...@lists.freedesktop.org;
Almahallawy, Khaled ;
On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
>
> Rather passing around an intel_engine_cs in the scheduling code, pass
> around a i915_sched_engine.
> Signed-off-by: Matthew Brost
> ---
> .../drm/i915/gt/intel_execlists_submission.c | 11 +++--
>
On Fri, Jun 04, 2021 at 02:03:46PM -0500, Jason Ekstrand wrote:
> On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
> >
> > The schedule function should be in the schedule object.
> >
> > Signed-off-by: Matthew Brost
> > ---
> > drivers/gpu/drm/i915/gem/i915_gem_wait.c | 4 ++--
> >
== Series Details ==
Series: Pipe DMC Support (rev5)
URL : https://patchwork.freedesktop.org/series/90445/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10171_full -> Patchwork_20286_full
Summary
---
**FAILURE**
On 2021-06-01 6:41 a.m., Uma Shankar wrote:
> Modern hardwares have multi segmented lut approach to prioritize
> the darker regions of the spectrum. This series introduces a new
> UAPI to define the lut ranges supported by the respective hardware.
>
> This also enables Pipe Color Management
== Series Details ==
Series: drm/i915/adl_p: Extend Wa_1606931601 for ADL-P
URL : https://patchwork.freedesktop.org/series/91042/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10171_full -> Patchwork_20288_full
Summary
tree: git://anongit.freedesktop.org/drm-intel drm-intel-gt-next
head: 84bdf4571d4dc36207bbc4b0fb2711723ee313d4
commit: 1fb12c5871521eab5fa428bf265841b1a3827a97 [1/19] drm/i915/guc: skip
disabling CTBs before sanitizing the GuC
config: x86_64-randconfig-r012-20210604 (attached as .config
On 2021-06-01 6:51 a.m., Uma Shankar wrote:
> Add Plane Degamma Mode as an enum property. Create a helper
> function for all plane color management features.
>
> This is an enum property with values as blob_id's and exposes
> the various gamma modes supported and the lut ranges. Getting
> the
On Fri, Jun 04, 2021 at 03:14:25PM -0700, Nataraj Deshpande wrote:
> Helps to fixe skia test failures on adl_p platform.
>
> Cc: Matt Roper
> Cc: Lucas De Marchi
> Signed-off-by: Nataraj Deshpande
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 4 ++--
> 1
Commit 0c6b522abc2a ("dma-buf: cleanup dma-resv shared fence debugging a bit
v2")
turned dma_resv_reset_shared_max() into a function when
CONFIG_DEBUG_MUTEXES is set, but forgot to export it. That resulted in a
broken build:
ERROR: modpost: "dma_resv_reset_shared_max"
Thank you very much Mark, for testing the patch and providing the "Tested-by"
tag.
Regards
Vidya
-Original Message-
From: Mark Yacoub
Sent: Saturday, June 5, 2021 12:20 AM
To: Srinivas, Vidya
Cc: intel-gfx@lists.freedesktop.org; igt-...@lists.freedesktop.org;
Almahallawy, Khaled ;
Thank you very much Mark, for testing the patch and providing the "Tested-by"
tag.
Regards
Vidya
-Original Message-
From: Mark Yacoub
Sent: Saturday, June 5, 2021 12:13 AM
To: Srinivas, Vidya
Cc: intel-gfx@lists.freedesktop.org; igt-...@lists.freedesktop.org;
Almahallawy, Khaled ;
Thank you very much Mark, for testing the patch and providing the "Tested-by"
tag.
Regards
Vidya
-Original Message-
From: Mark Yacoub
Sent: Saturday, June 5, 2021 12:12 AM
To: Srinivas, Vidya
Cc: intel-gfx@lists.freedesktop.org; igt-...@lists.freedesktop.org
Subject: Re: [igt-dev]
On Fri, Jun 04, 2021 at 02:26:38PM -0500, Jason Ekstrand wrote:
> On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
> >
> > The submission tasklet operates on i915_sched_engine, thus it is the
> > correct place for it.
> >
> > Signed-off-by: Matthew Brost
> > ---
> >
== Series Details ==
Series: drm + usb-type-c: Add support for out-of-band hotplug notification
(rev4)
URL : https://patchwork.freedesktop.org/series/89604/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked
== Series Details ==
Series: dma-buf: fix build due to missing export
URL : https://patchwork.freedesktop.org/series/91045/
State : failure
== Summary ==
Applying: dma-buf: fix build due to missing export
Using index info to reconstruct a base tree...
M drivers/dma-buf/dma-resv.c
Thank you so much Mark. This patch is not required. I have abandoned it.
We needed to stop tlsdate daemon which was holding the RTC lock (initctl stop
tlsdated).
Apologies for the same.
Regards
Vidya
-Original Message-
From: Mark Yacoub
Sent: Saturday, June 5, 2021 12:17 AM
To:
== Series Details ==
Series: Pipe DMC Support (rev5)
URL : https://patchwork.freedesktop.org/series/90445/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
fa1bf3879c91 drm/i915/dmc: Introduce DMC_FW_MAIN
2cdba84cf8be drm/i915/xelpd: Pipe A DMC plugging
-:45: WARNING:LONG_LINE:
Add a function to find a connector based on a fwnode.
This will be used by the new drm_connector_oob_hotplug_event()
function which is added by the next patch in this patch-set.
Changes in v2:
- Complete rewrite to use a global connector list in drm_connector.c
rather then using a
Add a new drm_connector_oob_hotplug_event() function and
oob_hotplug_event drm_connector_funcs member.
On some hardware a hotplug event notification may come from outside the
display driver / device. An example of this is some USB Type-C setups
where the hardware muxes the DisplayPort data and
From: Heikki Krogerus
On Intel platforms we know that the ACPI connector device
node order will follow the order the driver (i915) decides.
The decision is made using the custom Intel ACPI OpRegion
(intel_opregion.c), though the driver does not actually know
that the values it sends to ACPI
On some Cherry Trail devices, DisplayPort over Type-C is supported through
a USB-PD microcontroller (e.g. a fusb302) + a mux to switch the superspeed
datalines between USB-3 and DP (e.g. a pi3usb30532). The kernel in this
case does the PD/alt-mode negotiation itself, rather then everything being
Add a fwnode pointer to struct drm_connector and register an acpi_bus_type
for the connectors with the ACPI subsystem (when CONFIG_ACPI is enabled).
The adding of the fwnode pointer allows drivers to associate a fwnode
that represents a connector with that connector.
When the new fwnode pointer
Make dp_altmode_notify() handle the dp->data.conf == 0 case too,
rather then having separate code-paths for this in various places
which call it.
Reviewed-by: Heikki Krogerus
Tested-by: Heikki Krogerus
Signed-off-by: Hans de Goede
---
drivers/usb/typec/altmodes/displayport.c | 35
Use the new drm_connector_oob_hotplug_event() functions to let drm/kms
drivers know about DisplayPort over Type-C hotplug events.
Reviewed-by: Heikki Krogerus
Tested-by: Heikki Krogerus
Signed-off-by: Hans de Goede
---
Changes in v3:
- Only call drm_connector_oob_hotplug_event() on hpd status
On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
>
> The submission tasklet operates on i915_sched_engine, thus it is the
> correct place for it.
>
> Signed-off-by: Matthew Brost
> ---
> drivers/gpu/drm/i915/gt/intel_engine.h| 14 ---
> drivers/gpu/drm/i915/gt/intel_engine_cs.c |
On Fri, Jun 04, 2021 at 02:09:46PM -0500, Jason Ekstrand wrote:
> On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
> >
> > Rather than touching execlist specific structures in the generic
> > scheduling code, add a callback function in the backend.
>
> Seems reasonable but why does the
On Fri, Jun 4, 2021 at 5:25 AM Matthew Brost wrote:
>
> On Wed, Jun 02, 2021 at 03:33:43PM +0100, Tvrtko Ursulin wrote:
> >
> > On 06/05/2021 20:14, Matthew Brost wrote:
> > > Reset implementation for new GuC interface. This is the legacy reset
> > > implementation which is called when the i915
On Thu, Jun 03, 2021 at 07:02:57PM -0700, Matthew Brost wrote:
> On Thu, Jun 03, 2021 at 11:35:28PM +0200, Daniel Vetter wrote:
> > On Wed, Jun 02, 2021 at 10:16:18PM -0700, Matthew Brost wrote:
> > > From: Michal Wajdeczko
> > >
> > > Generic helpers should be placed in i915_utils.h.
> >
> >
> -Original Message-
> From: Navare, Manasi D
> Sent: Friday, June 4, 2021 12:16 AM
> To: Kulkarni, Vandita
> Cc: Manna, Animesh ; Nikula, Jani
> ; Saarinen, Jani ; intel-
> g...@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/dsc: Remove redundant checks in
> DSC
On Thu, Jun 03, 2021 at 04:04:08PM -0700, Matthew Brost wrote:
> From: Michal Wajdeczko
>
> Future GuC will require CTB buffers sizes to be multiple of 4K.
> Make these changes now as this shouldn't impact us too much.
>
> Signed-off-by: Michal Wajdeczko
> Signed-off-by: Matthew Brost
>
On 04.06.2021 10:20, Daniel Vetter wrote:
> On Thu, Jun 03, 2021 at 04:04:08PM -0700, Matthew Brost wrote:
>> From: Michal Wajdeczko
>>
>> Future GuC will require CTB buffers sizes to be multiple of 4K.
>> Make these changes now as this shouldn't impact us too much.
>>
>> Signed-off-by: Michal
> -Original Message-
> From: Jani Nikula
> Sent: Thursday, June 3, 2021 9:12 PM
> To: Manna, Animesh ; Roper, Matthew D
> ; intel-gfx@lists.freedesktop.org
> Cc: Navare, Manasi D ; Kulkarni, Vandita
>
> Subject: RE: [Intel-gfx] [CI 15/19] drm/i915/bigjoiner: atomic commit changes
>
On 6/4/21 9:51 AM, Christian König wrote:
Am 03.06.21 um 09:36 schrieb Daniel Vetter:
On Thu, Jun 3, 2021 at 8:50 AM Thomas Hellström
wrote:
On 6/2/21 8:40 PM, Daniel Vetter wrote:
On Wed, Jun 02, 2021 at 11:48:41AM +0200, Christian König wrote:
Am 02.06.21 um 11:16 schrieb Thomas
> From: Intel-gfx On Behalf Of Nischal
> Varide
> Sent: Wednesday, June 2, 2021 11:48 AM
> To: intel-gfx@lists.freedesktop.org; Varide, Nischal
> ; Shankar, Uma ; Gupta,
> Anshuman ; Nikula, Jani
> Subject: [Intel-gfx] [PATCH v2 1/1] drm/i915/xelpd: Enabling dithering after
> the CC1
>
> If the
This change takes care of resetting the dss_ctl registers
in case of dsc_disable, bigjoiner disable and also
uncompressed joiner disable.
Suggested-by: Jani Nikula
Fixes: d961eb20adb6 (drm/i915/bigjoiner: atomic commit changes for uncompressed
joiner)
Closes:
On Thu, 03 Jun 2021, "Navare, Manasi" wrote:
> On Thu, Jun 03, 2021 at 06:49:23AM -0700, Manna, Animesh wrote:
>>
>>
>> > -Original Message-
>> > From: Jani Nikula
>> > Sent: Thursday, June 3, 2021 6:03 PM
>> > To: Roper, Matthew D ; intel-
>> > g...@lists.freedesktop.org
>> > Cc:
On Fri, Jun 04, 2021 at 11:01:40AM +0200, Thomas Hellström wrote:
>
> On 6/4/21 9:51 AM, Christian König wrote:
> > Am 03.06.21 um 09:36 schrieb Daniel Vetter:
> > > On Thu, Jun 3, 2021 at 8:50 AM Thomas Hellström
> > > wrote:
> > > >
> > > > On 6/2/21 8:40 PM, Daniel Vetter wrote:
> > > > > On
== Series Details ==
Series: drm/i915/dsc: Fix bigjoiner check in dsc_disable
URL : https://patchwork.freedesktop.org/series/91006/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
54375f6d892e drm/i915/dsc: Fix bigjoiner check in dsc_disable
-:31: CHECK:LOGICAL_CONTINUATIONS:
On Wed, Jun 02, 2021 at 10:16:24PM -0700, Matthew Brost wrote:
> From: Michal Wajdeczko
>
> We want to stop using guc.send_mutex while sending CTB messages
> so we have to start protecting access to CTB send descriptor.
>
> For completeness protect also CTB receive descriptor.
>
> Add spinlock
https://patchwork.kernel.org/project/linux-pci/patch/20201104120506.172447-1-tejaskumarx.surendrakumar.upadh...@intel.com/
this was addressed way back but stuck up in discussions.
Thanks,
Tejas
> -Original Message-
> From: Intel-gfx On Behalf Of
> William Tseng
> Sent: 18 January 2021
On Wed, Jun 02, 2021 at 10:16:23PM -0700, Matthew Brost wrote:
> From: Michal Wajdeczko
>
> In upcoming patch we will allow more CTB requests to be sent in
> parallel to the GuC for processing, so we shouldn't assume any more
> that GuC will always reply without 10ms.
>
> Use bigger value from
On Thu, Jun 03, 2021 at 09:10:14AM -0700, Matthew Brost wrote:
> On Thu, Jun 03, 2021 at 11:44:57AM +0200, Michal Wajdeczko wrote:
> >
> >
> > On 03.06.2021 07:16, Matthew Brost wrote:
> > > Ensure H2G buffer updates are visible before descriptor tail updates by
> > > inserting a barrier between
On Wed, Jun 02, 2021 at 10:16:30PM -0700, Matthew Brost wrote:
> From: Daniele Ceraolo Spurio
>
> GuC has its own defines for the engine classes. They're currently
> mapping 1:1 to the defines used by the driver, but there is no guarantee
> this will continue in the future. Given that we've been
On 27/05/2021 11:22, Tvrtko Ursulin wrote:
On 27/05/2021 11:13, Daniel Vetter wrote:
On Wed, May 26, 2021 at 11:20:13AM +0100, Tvrtko Ursulin wrote:
On 25/05/2021 15:47, Daniel Vetter wrote:
On Tue, May 25, 2021 at 03:19:47PM +0100, Tvrtko Ursulin wrote:
+ dri-devel as per process
On
Am 04.06.21 um 11:12 schrieb Daniel Vetter:
On Fri, Jun 04, 2021 at 11:01:40AM +0200, Thomas Hellström wrote:
On 6/4/21 9:51 AM, Christian König wrote:
Am 03.06.21 um 09:36 schrieb Daniel Vetter:
On Thu, Jun 3, 2021 at 8:50 AM Thomas Hellström
wrote:
On 6/2/21 8:40 PM, Daniel Vetter wrote:
On Fri, 2021-06-04 at 16:06 +0200, Christian König wrote:
> Am 04.06.21 um 16:03 schrieb Thomas Hellström:
> > On Fri, 2021-06-04 at 15:38 +0200, Christian König wrote:
> > > Am 04.06.21 um 11:12 schrieb Daniel Vetter:
> > > > On Fri, Jun 04, 2021 at 11:01:40AM +0200, Thomas Hellström
> > > >
== Series Details ==
Series: drm/i915/dsc: Fix bigjoiner check in dsc_disable
URL : https://patchwork.freedesktop.org/series/91006/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10171 -> Patchwork_20282
Summary
---
Am 03.06.21 um 09:36 schrieb Daniel Vetter:
On Thu, Jun 3, 2021 at 8:50 AM Thomas Hellström
wrote:
On 6/2/21 8:40 PM, Daniel Vetter wrote:
On Wed, Jun 02, 2021 at 11:48:41AM +0200, Christian König wrote:
Am 02.06.21 um 11:16 schrieb Thomas Hellström (Intel):
On 6/2/21 10:32 AM, Christian
On Thu, Jun 03, 2021 at 03:07:54PM -0700, Manasi Navare wrote:
> Static analysis identified an issue in skl_crtc_allocate_ddb where
> mbus_offset may be used uninitialized.
> This patch fixes it.
I'm sorry, but I really cannot see what this tool is seeing...
I even tried to look to our internal
This patch disables gamma in degamma subtest which is missing.
It compares CRC between (linear degamma + solid colors) and (max
degamma + gradient colors).
v2 - Addressed review comments from Bhanuprakash Modem
Signed-off-by: Vidya Srinivas
Change-Id: Ibdb91b603e2e4024d170727d24c6a5425441e2e1
On Wed, 26 May 2021 at 17:21, Emil Velikov wrote:
>
> Hi Ville,
>
> On Tue, 18 May 2021 at 12:17, Ville Syrjälä
> wrote:
> >
> > On Tue, May 18, 2021 at 12:09:56PM +0100, Emil Velikov wrote:
> > > Hi Ville,
> > >
> > > On Mon, 17 May 2021 at 18:24, Ville Syrjälä
> > > wrote:
> > > >
> > > > On
== Series Details ==
Series: drm/i915/dsc: Fix bigjoiner check in dsc_disable
URL : https://patchwork.freedesktop.org/series/91006/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10171_full -> Patchwork_20282_full
Summary
On Fri, 2021-06-04 at 15:38 +0200, Christian König wrote:
> Am 04.06.21 um 11:12 schrieb Daniel Vetter:
> > On Fri, Jun 04, 2021 at 11:01:40AM +0200, Thomas Hellström wrote:
> > > On 6/4/21 9:51 AM, Christian König wrote:
> > > > Am 03.06.21 um 09:36 schrieb Daniel Vetter:
> > > > > On Thu, Jun 3,
On Fri, Jun 04, 2021 at 02:47:16PM +0100, Emil Velikov wrote:
> On Wed, 26 May 2021 at 17:21, Emil Velikov wrote:
> >
> > Hi Ville,
> >
> > On Tue, 18 May 2021 at 12:17, Ville Syrjälä
> > wrote:
> > >
> > > On Tue, May 18, 2021 at 12:09:56PM +0100, Emil Velikov wrote:
> > > > Hi Ville,
> > > >
>
== Series Details ==
Series: tests/kms_color: Disable gamma in degamma tests
URL : https://patchwork.freedesktop.org/series/91013/
State : failure
== Summary ==
Applying: tests/kms_color: Disable gamma in degamma tests
error: sha1 information is lacking or useless (tests/kms_color.c).
error:
Rodrigo Vivi writes:
> On Thu, Jun 03, 2021 at 03:07:54PM -0700, Manasi Navare wrote:
>> Static analysis identified an issue in skl_crtc_allocate_ddb where
>> mbus_offset may be used uninitialized.
>> This patch fixes it.
>
> I'm sorry, but I really cannot see what this tool is seeing...
> I
From: Emil Velikov
Currently as the workaround is applied the screen flickers. As a result
we do not achieve seamless boot experience.
Avoiding the issue in the common use-case might be hard, although we can
resolve it for dual GPU setups - when the "other" GPU is primary and/or
outputs are
On Fri, 4 Jun 2021 at 15:08, Ville Syrjälä
wrote:
>
> On Fri, Jun 04, 2021 at 02:47:16PM +0100, Emil Velikov wrote:
> > On Wed, 26 May 2021 at 17:21, Emil Velikov wrote:
> > >
> > > Hi Ville,
> > >
> > > On Tue, 18 May 2021 at 12:17, Ville Syrjälä
> > > wrote:
> > > >
> > > > On Tue, May 18,
On Thu, May 20, 2021 at 2:58 PM Kai-Heng Feng
wrote:
>
> On HP Fury G7 Workstations, graphics output is re-routed from Intel GFX
> to discrete GFX after S3. This is not desirable, because userspace will
> treat connected display as a new one, losing display settings.
>
> The expected behavior is
Am 04.06.21 um 16:11 schrieb Thomas Hellström:
On Fri, 2021-06-04 at 16:06 +0200, Christian König wrote:
Am 04.06.21 um 16:03 schrieb Thomas Hellström:
On Fri, 2021-06-04 at 15:38 +0200, Christian König wrote:
Am 04.06.21 um 11:12 schrieb Daniel Vetter:
On Fri, Jun 04, 2021 at 11:01:40AM
Am 04.06.21 um 16:03 schrieb Thomas Hellström:
On Fri, 2021-06-04 at 15:38 +0200, Christian König wrote:
Am 04.06.21 um 11:12 schrieb Daniel Vetter:
On Fri, Jun 04, 2021 at 11:01:40AM +0200, Thomas Hellström wrote:
On 6/4/21 9:51 AM, Christian König wrote:
Am 03.06.21 um 09:36 schrieb Daniel
On Fri, Jun 04, 2021 at 06:22:49PM +0300, Mika Kuoppala wrote:
> Rodrigo Vivi writes:
>
> > On Thu, Jun 03, 2021 at 03:07:54PM -0700, Manasi Navare wrote:
> >> Static analysis identified an issue in skl_crtc_allocate_ddb where
> >> mbus_offset may be used uninitialized.
> >> This patch fixes it.
On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
>
> Signed-off-by: Matthew Brost
> ---
> Documentation/gpu/i915.rst | 6
> drivers/gpu/drm/i915/i915_scheduler_types.h | 37 ++---
> 2 files changed, 38 insertions(+), 5 deletions(-)
>
> diff --git
On Fri, Jun 04, 2021 at 07:17:21PM +0200, Werner Sembach wrote:
> Add a new general drm property "active bpc" which can be used by graphic
> drivers
> to report the applied bit depth per pixel back to userspace.
>
> While "max bpc" can be used to change the color depth, there was no way to
>
On Fri, Jun 04, 2021 at 07:17:23PM +0200, Werner Sembach wrote:
> This commits implements the "active bpc" drm property for the Intel GPU
> driver.
>
> Signed-off-by: Werner Sembach
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 13 +
>
On Fri, Jun 04, 2021 at 12:38:22PM -0500, Jason Ekstrand wrote:
> On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
> >
> > Introduce i915_sched_engine object which is lower level data structure
> > that i915_scheduler / generic code can operate on without touching
> > execlist specific
On Fri, Jun 4, 2021 at 12:42 PM Matthew Brost wrote:
>
> On Fri, Jun 04, 2021 at 12:38:22PM -0500, Jason Ekstrand wrote:
> > On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost
> > wrote:
> > >
> > > Introduce i915_sched_engine object which is lower level data structure
> > > that i915_scheduler /
== Series Details ==
Series: drm/i915: apply WaEnableVGAAccessThroughIOPort as needed
URL : https://patchwork.freedesktop.org/series/91017/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10171 -> Patchwork_20284
Summary
On Fri, Jun 04, 2021 at 12:57:25PM -0400, Adam Chasen wrote:
> Thanks for staying with me! Still hoping I can get back to using KMS/Wayland
> combination with my setup.
>
> I understand the current recommendation is to push the mode setting to the
> wayland compositor per Ville here:
>
This commits implements the "active bpc" drm property for the AMD GPU driver.
Signed-off-by: Werner Sembach
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 18 +-
.../display/amdgpu_dm/amdgpu_dm_mst_types.c| 4 +++-
2 files changed, 20 insertions(+), 2 deletions(-)
Add a new general drm property "active bpc" which can be used by graphic drivers
to report the applied bit depth per pixel back to userspace.
While "max bpc" can be used to change the color depth, there was no way to check
which one actually got used. While in theory the driver chooses the
This commits implements the "active bpc" drm property for the Intel GPU driver.
Signed-off-by: Werner Sembach
---
drivers/gpu/drm/i915/display/intel_display.c | 13 +
drivers/gpu/drm/i915/display/intel_dp.c | 8 ++--
drivers/gpu/drm/i915/display/intel_dp_mst.c | 4 +++-
convert_dc_color_depth_into_bpc() that converts the enum dc_color_depth to an
integer had the casses for COLOR_DEPTH_999 and COLOR_DEPTH_11 missing.
Signed-off-by: Werner Sembach
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4
1 file changed, 4 insertions(+)
diff --git
I started work on my proposal for better color handling in Linux display
drivers: https://lkml.org/lkml/2021/5/12/764
Since the first read-only property is now implemented for amdgpu and i915 I
wanted to collect some feedback, since the other two read-only properties will
be quite similar, I
== Series Details ==
Series: Add "activ bpc" drm property and use it in AMD and Intel driver
URL : https://patchwork.freedesktop.org/series/91026/
State : failure
== Summary ==
Applying: drm/amd/display: Add missing cases convert_dc_color_depth_into_bpc
Applying: drm/uAPI: Add "active bpc" as
On Fri, Jun 04, 2021 at 12:20:36PM -0500, Jason Ekstrand wrote:
> On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
> >
> > Signed-off-by: Matthew Brost
> > ---
> > Documentation/gpu/i915.rst | 6
> > drivers/gpu/drm/i915/i915_scheduler_types.h | 37
On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
>
> Introduce i915_sched_engine object which is lower level data structure
> that i915_scheduler / generic code can operate on without touching
> execlist specific structures. This allows additional submission backends
> to be added without
On Wed, May 26, 2021 at 04:33:56PM -0700, Matthew Brost wrote:
> Add entry for i915 GuC submission / DRM scheduler integration plan.
> Follow up patch with details of new parallel submission uAPI to come.
>
> v2:
> (Daniel Vetter)
> - Expand explaination of why bonding isn't supported for GuC
Hi Claire,
On Thu, May 27, 2021 at 08:58:30PM +0800, Claire Chang wrote:
> This series implements mitigations for lack of DMA access control on
> systems without an IOMMU, which could result in the DMA accessing the
> system memory at unexpected times and/or unexpected addresses, possibly
>
Reviewed-by: Jason Ekstrand
On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
>
> Add wrapper function around RB tree to determine if i915_sched_engine is
> empty.
>
> Signed-off-by: Matthew Brost
> ---
> drivers/gpu/drm/i915/gt/intel_engine_cs.c| 2 +-
>
On Fri, Jun 04, 2021 at 12:51:43PM -0500, Jason Ekstrand wrote:
> On Fri, Jun 4, 2021 at 12:42 PM Matthew Brost wrote:
> >
> > On Fri, Jun 04, 2021 at 12:38:22PM -0500, Jason Ekstrand wrote:
> > > On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost
> > > wrote:
> > > >
> > > > Introduce
On Wed, May 26, 2021 at 04:33:57PM -0700, Matthew Brost wrote:
> Add entry for i915 new parallel submission uAPI plan.
>
> v2:
> (Daniel Vetter):
> - Expand logical order explaination
> - Add dummy header
> - Only allow N BBs in execbuf IOCTL
> - Configure parallel submission per slot
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