Re: [Intel-gfx] [PATCH] drm/i915/dg1: Read OPROM via SPI controller

On Fri, 17 Sep 2021, Lucas De Marchi wrote: > From: Clint Taylor > > Read OPROM SPI through MMIO and find VBT entry since we can't use > OpRegion and PCI mapping may not work on some systems due to most BIOSes > not leaving the Option ROM mapped. What happened here, still not merged? :o BR,

Re: [Intel-gfx] [PATCH v4 05/16] drm/i915/lmem: Enable lmem for platforms with Flat CCS

On 09/12/2021 15:45, Ramalingam C wrote: From: Abdiel Janulgue A portion of device memory is reserved for Flat CCS so usable device memory will be reduced by size of Flat CCS. Size of Flat CCS is specified in “XEHPSDV_FLAT_CCS_BASE_ADDR”. So to get effective device memory we need to subtract

Re: [Intel-gfx] [PATCH v3 7/8] drm/i915/migrate: add acceleration support for DG2

On 2021-12-06 at 13:31:39 +, Matthew Auld wrote: > This is all kinds of awkward since we now have to contend with using 64K > GTT pages when mapping anything in LMEM(including the page-tables > themselves). > > Signed-off-by: Matthew Auld > Cc: Thomas Hellström > Cc: Ramalingam C > --- >

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/2] drm/i915/cdclk: turn around i915_drv.h and intel_cdclk.h dependency (rev3)

== Series Details == Series: series starting with [v2,1/2] drm/i915/cdclk: turn around i915_drv.h and intel_cdclk.h dependency (rev3) URL : https://patchwork.freedesktop.org/series/97964/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used,

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix implicit use of struct pci_dev

On Tue, 14 Dec 2021, Mark Brown wrote: > On Tue, Dec 14, 2021 at 01:36:33AM -, Patchwork wrote: >> == Series Details == >> >> Series: drm/i915: Fix implicit use of struct pci_dev >> URL : https://patchwork.freedesktop.org/series/97975/ >> State : failure >> >> == Summary == >> >> CI Bug

Re: [Intel-gfx] [PATCH 0/3] drm/i915: Sanity Check for device memory region

On 2021-12-08 at 21:04:01 +0530, Ramalingam C wrote: > Changes for introducing the quick test on the device memory range and > also a test of detailed validation for each addr of the range with read > and write. > > Detailed testing is optionally enabled with a modparam i915.memtest=1 > > And

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915/cdclk: turn around i915_drv.h and intel_cdclk.h dependency (rev3)

== Series Details == Series: series starting with [v2,1/2] drm/i915/cdclk: turn around i915_drv.h and intel_cdclk.h dependency (rev3) URL : https://patchwork.freedesktop.org/series/97964/ State : success == Summary == CI Bug Log - changes from CI_DRM_11000 -> Patchwork_21844

Re: [Intel-gfx] [PULL] drm-misc-next

On Mon, Nov 29, 2021 at 09:56:47AM +0100, Thomas Zimmermann wrote: > Hi Dave and Daniel, > > here's the second PR for drm-misc-next for what will become Linux 5.17. > It's a bit late, as I was on vacation last week. The most significant > change moves the nomodeset parameter entirely into the DRM

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/debugfs: add noreclaim annotations

On 13/12/2021 18:15, Patchwork wrote: *Patch Details* *Series:* drm/i915/debugfs: add noreclaim annotations *URL:* https://patchwork.freedesktop.org/series/97966/ *State:*failure *Details:*

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/debugfs: add noreclaim annotations (rev2)

On 14/12/2021 04:55, Patchwork wrote: *Patch Details* *Series:* drm/i915/debugfs: add noreclaim annotations (rev2) *URL:* https://patchwork.freedesktop.org/series/97966/ *State:*failure *Details:*

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 01/11] tests/i915/i915_hangman: Add descriptions

On Mon, Dec 13, 2021 at 03:29:04PM -0800, john.c.harri...@intel.com wrote: > From: John Harrison > > Added descriptions of the various sub-tests and the test as a whole. > > Signed-off-by: John Harrison > --- > tests/i915/i915_hangman.c | 11 +-- > 1 file changed, 9 insertions(+), 2

Re: [Intel-gfx] [PATCH] drm/i915/dg1: Read OPROM via SPI controller

On Tue, Dec 14, 2021 at 11:42:41AM +0200, Jani Nikula wrote: On Fri, 17 Sep 2021, Lucas De Marchi wrote: From: Clint Taylor Read OPROM SPI through MMIO and find VBT entry since we can't use OpRegion and PCI mapping may not work on some systems due to most BIOSes not leaving the Option ROM

Re: [Intel-gfx] [PATCH v4 04/16] drm/i915/xehpsdv: Add has_flat_ccs to device info

On 09/12/2021 15:45, Ramalingam C wrote: From: CQ Tang Platforms of XeHP and beyond support 3D surface (buffer) compression and various compression formats. This is accomplished by an additional compression control state (CCS) stored for each surface. Gen 12 devices(TGL family and DG1) stores

Re: [Intel-gfx] [PATCH v3 7/8] drm/i915/migrate: add acceleration support for DG2

On 14/12/2021 10:56, Ramalingam C wrote: On 2021-12-06 at 13:31:39 +, Matthew Auld wrote: This is all kinds of awkward since we now have to contend with using 64K GTT pages when mapping anything in LMEM(including the page-tables themselves). Signed-off-by: Matthew Auld Cc: Thomas

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: PREEMPT_RT related fixups. (rev4)

== Series Details == Series: drm/i915: PREEMPT_RT related fixups. (rev4) URL : https://patchwork.freedesktop.org/series/95463/ State : failure == Summary == Applying: drm/i915: Drop the irqs_disabled() check Applying: drm/i915/gt: Queue and wait for the irq_work item. Applying: drm/i915/gt:

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/debugfs: add noreclaim annotations (rev2)

All are known issues. Re-reported the results. -Original Message- From: Auld, Matthew Sent: Tuesday, December 14, 2021 1:26 AM To: intel-gfx@lists.freedesktop.org; Vudum, Lakshminarayana Subject: Re: ✗ Fi.CI.IGT: failure for drm/i915/debugfs: add noreclaim annotations (rev2) On

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/debugfs: add noreclaim annotations (rev2)

== Series Details == Series: drm/i915/debugfs: add noreclaim annotations (rev2) URL : https://patchwork.freedesktop.org/series/97966/ State : success == Summary == CI Bug Log - changes from CI_DRM_10996_full -> Patchwork_21842_full Summary

[Intel-gfx] [PATCH v3 1/5] drm/i915/fbc: Parametrize FBC register offsets

From: Ville Syrjälä Parametrize ilk+ FBC register offsets based on the FBC instance. v2: More intel_ namespace (Jani) v3: Don't break gvt (Jani) Reviewed-by: Jani Nikula Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_fbc.c | 34 +---

Re: [Intel-gfx] [PATCH v3 4/4] drm/i915/fbc: Register per-crtc debugfs files

On Mon, Dec 13, 2021 at 09:09:40PM +0200, Jani Nikula wrote: > On Mon, 13 Dec 2021, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > Expose FBC debugfs files for each crtc. These may or may not point > > to the same FBC instance depending on the platform. > > > > We leave the old global

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: remove writeback hook

== Series Details == Series: drm/i915: remove writeback hook URL : https://patchwork.freedesktop.org/series/98029/ State : success == Summary == CI Bug Log - changes from CI_DRM_11002 -> Patchwork_21848 Summary --- **SUCCESS** No

Re: [Intel-gfx] [PATCH 7/7] drm/i915/guc: Selftest for stealing of guc ids

On Mon, Dec 13, 2021 at 04:26:07PM -0800, John Harrison wrote: > On 12/11/2021 09:35, Matthew Brost wrote: > > Testing the stealing of guc ids is hard from user space as we have 64k > > guc_ids. Add a selftest, which artificially reduces the number of guc > > ids, and forces a steal. Description

[Intel-gfx] [PATCH 2/7] drm/i915/guc: Only assign guc_id.id when stealing guc_id

Previously assigned whole guc_id structure (list, spin lock) which is incorrect, only assign the guc_id.id. Fixes: 0f7976506de61 ("drm/i915/guc: Rework and simplify locking") Signed-off-by: Matthew Brost Reviewed-by: John Harrison --- drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 +- 1

[Intel-gfx] [PATCH 6/7] drm/i915/guc: Kick G2H tasklet if no credits

Let's be paranoid and kick the G2H tasklet, which dequeues messages, if G2H credits are exhausted. Signed-off-by: Matthew Brost Reviewed-by: John Harrison --- drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git

[Intel-gfx] [PATCH 7/7] drm/i915/guc: Selftest for stealing of guc ids

Testing the stealing of guc ids is hard from user space as we have 64k guc_ids. Add a selftest, which artificially reduces the number of guc ids, and forces a steal. The test creates a spinner which is used to block all subsequent submissions until it completes. Next, a loop creates a context and

[Intel-gfx] [PATCH 5/7] drm/i915/guc: Add extra debug on CT deadlock

Print CT state (H2G + G2H head / tail pointers, credits) on CT deadlock. v2: (John Harrison) - Add units to debug messages Reviewed-by: John Harrison Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 9 + 1 file changed, 9 insertions(+) diff --git

[Intel-gfx] [PATCH 3/7] drm/i915/guc: Remove racey GEM_BUG_ON

A full GT reset can race with the last context put resulting in the context ref count being zero but the destroyed bit not yet being set. Remove GEM_BUG_ON in scrub_guc_desc_for_outstanding_g2h that asserts the destroyed bit must be set in ref count is zero. Reviewed-by: Daniele Ceraolo Spurio

[Intel-gfx] [PATCH 4/7] drm/i915/guc: Don't hog IRQs when destroying contexts

From: John Harrison While attempting to debug a CT deadlock issue in various CI failures (most easily reproduced with gem_ctx_create/basic-files), I was seeing CPU deadlock errors being reported. This were because the context destroy loop was blocking waiting on H2G space from inside an IRQ

[Intel-gfx] [PATCH 1/7] drm/i915/guc: Use correct context lock when callig clr_context_registered

s/ce/cn/ when grabbing guc_state.lock before calling clr_context_registered. Fixes: 0f7976506de61 ("drm/i915/guc: Rework and simplify locking") Signed-off-by: Matthew Brost Reviewed-by: Daniele Ceraolo Spurio --- drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 4 ++-- 1 file changed, 2

[Intel-gfx] [PATCH 0/7] Fix stealing guc_ids + test

Patches 1 & 2 address bugs in stealing of guc_ids and patch 7 tests this path. Patches 4-6 address some issues with the CTs exposed by the selftest in patch 7. Basically if a lot of contexts were all deregistered all at once, the CT channel could deadlock. Patch 3 is a small fix that is already

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Fix stealing guc_ids + test (rev3)

== Series Details == Series: Fix stealing guc_ids + test (rev3) URL : https://patchwork.freedesktop.org/series/97896/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] [PATCH] drm/i915: remove writeback hook

Ditch the writeback hook and drop i915_gem_object_writeback(). We already support the shrinker_release_pages hook which can just call shmem_writeback directly. Suggested-by: Tvrtko Ursulin Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/gem/i915_gem_object.h| 1 -

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Fix stealing guc_ids + test (rev3)

== Series Details == Series: Fix stealing guc_ids + test (rev3) URL : https://patchwork.freedesktop.org/series/97896/ State : warning == Summary == $ dim checkpatch origin/drm-tip b855be58ca75 drm/i915/guc: Use correct context lock when callig clr_context_registered b2c8358f28bf

Re: [Intel-gfx] [PATCH 7/8] drm/i915: Disable tracing points on PREEMPT_RT

On Tue, 14 Dec 2021 18:34:50 +0200 Ville Syrjälä wrote: > Looks lightly tedious. Can't we have "slow" (or whatever) versions of > the trace macros so we could just declare these the same was as before > without having to manually write that wrapper for every event? That would be quite tedious

Re: [Intel-gfx] [PATCH v2 1/4] drm/i915/fbc: Parametrize FBC register offsets

On Tue, Dec 14, 2021 at 06:25:43PM +0200, Ville Syrjälä wrote: > On Mon, Dec 13, 2021 at 09:54:04PM +0200, Jani Nikula wrote: > > On Mon, 13 Dec 2021, Ville Syrjala wrote: > > > > This one is only used in gvt, anyway. And that actually makes me wonder > > if this should be breaking the build.

[Intel-gfx] ✓ Fi.CI.BAT: success for Fix stealing guc_ids + test (rev3)

== Series Details == Series: Fix stealing guc_ids + test (rev3) URL : https://patchwork.freedesktop.org/series/97896/ State : success == Summary == CI Bug Log - changes from CI_DRM_11002 -> Patchwork_21847 Summary --- **SUCCESS**

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: remove writeback hook

== Series Details == Series: drm/i915: remove writeback hook URL : https://patchwork.freedesktop.org/series/98029/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] [PATCH v2 1/4] drm/i915/fbc: Parametrize FBC register offsets

On Tue, 14 Dec 2021, Ville Syrjälä wrote: > On Mon, Dec 13, 2021 at 09:54:04PM +0200, Jani Nikula wrote: >> On Mon, 13 Dec 2021, Ville Syrjala wrote: >> > From: Ville Syrjälä >> > >> > Parametrize ilk+ FBC register offsets based on the FBC instance. >> > >> > v2: More intel_ namespace (Jani) >>

[Intel-gfx] [PULL] drm-intel-next

Hi Dave & Daniel - drm-intel-next-2021-12-14: drm/i915 feature pull #2 for v5.17: Features and functionality: - Add eDP privacy screen support (Hans) - Add Raptor Lake S (RPL-S) support (Anusha) - Add CD clock squashing support (Mika) - Properly support ADL-P without force probe (Clint) -

Re: [Intel-gfx] [PATCH 7/8] drm/i915: Disable tracing points on PREEMPT_RT

On Tue, Dec 14, 2021 at 09:36:52AM -0500, Steven Rostedt wrote: > On Tue, 14 Dec 2021 15:03:00 +0100 > Sebastian Andrzej Siewior wrote: > > > Luca Abeni reported this: > > | BUG: scheduling while atomic: kworker/u8:2/15203/0x0003 > > | CPU: 1 PID: 15203 Comm: kworker/u8:2 Not tainted

Re: [Intel-gfx] [PATCH 7/8] drm/i915: Disable tracing points on PREEMPT_RT

On Tue, 14 Dec 2021 15:03:00 +0100 Sebastian Andrzej Siewior wrote: > Luca Abeni reported this: > | BUG: scheduling while atomic: kworker/u8:2/15203/0x0003 > | CPU: 1 PID: 15203 Comm: kworker/u8:2 Not tainted 4.19.1-rt3 #10 > | Call Trace: > | rt_spin_lock+0x3f/0x50 > |

Re: [Intel-gfx] [PATCH] drm/i915/ttm: fix large buffer population trucation

On Mon, 13 Dec 2021 at 13:03, Matthew Auld wrote: > > On 10/12/2021 19:50, Robert Beckett wrote: > > ttm->num_pages is uint32_t which was causing very large buffers to > > only populate a truncated size. > > > > This fixes gem_create@create-clear igt test on large memory systems. > > > > Fixes:

[Intel-gfx] [PATCH] drm/i915/guc: Log engine resets

From: Tvrtko Ursulin Log engine resets done by the GuC firmware in the similar way it is done by the execlists backend. This way we have notion of where the hangs are before the GuC gains support for proper error capture. Signed-off-by: Tvrtko Ursulin Cc: Matthew Brost Cc: John Harrison ---

Re: [Intel-gfx] [PATCH 7/8] drm/i915: Disable tracing points on PREEMPT_RT

On 2021-12-14 09:36:52 [-0500], Steven Rostedt wrote: > Another way around this that I can see is if the data for the tracepoints > can fit on the stack and add wrappers around the tracepoints. For example, > looking at the first tracepoint in i915_trace.h: … Nice. > We could modify this to be:

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/2] drm/i915/cdclk: turn around i915_drv.h and intel_cdclk.h dependency (rev3)

== Series Details == Series: series starting with [v2,1/2] drm/i915/cdclk: turn around i915_drv.h and intel_cdclk.h dependency (rev3) URL : https://patchwork.freedesktop.org/series/97964/ State : success == Summary == CI Bug Log - changes from CI_DRM_11000_full -> Patchwork_21844_full

[Intel-gfx] linux-next: manual merge of the drm-intel-gt tree with the drm-intel tree

Hi all, Today's linux-next merge of the drm-intel-gt tree got a conflict in: drivers/gpu/drm/i915/i915_pci.c between commit: 6678916dfa012 ("drm/i915: Move pipe/transcoder/abox masks under intel_device_info.display") from the drm-intel tree and commit: c83125bb2199b ("drm/i915: Add

[Intel-gfx] [PATCH 2/8] drm/i915/gt: Queue and wait for the irq_work item.

Disabling interrupts and invoking the irq_work function directly breaks on PREEMPT_RT. PREEMPT_RT does not invoke all irq_work from hardirq context because some of the user have spinlock_t locking in the callback function. These locks are then turned into a sleeping locks which can not be acquired

[Intel-gfx] [PATCH 8/8] drm/i915: skip DRM_I915_LOW_LEVEL_TRACEPOINTS with NOTRACE

The order of the header files is important. If this header file is included after tracepoint.h was included then the NOTRACE here becomes a nop. Currently this happens for two .c files which use the tracepoitns behind DRM_I915_LOW_LEVEL_TRACEPOINTS. Cc: Steven Rostedt Signed-off-by: Sebastian

[Intel-gfx] [PATCH 6/8] drm/i915: Don't check for atomic context on PREEMPT_RT

The !in_atomic() check in _wait_for_atomic() triggers on PREEMPT_RT because the uncore::lock is a spinlock_t and does not disable preemption or interrupts. Changing the uncore:lock to a raw_spinlock_t doubles the worst case latency on an otherwise idle testbox during testing. Therefore I'm

[Intel-gfx] [PATCH 5/8] drm/i915: Don't disable interrupts on PREEMPT_RT during atomic updates

From: Mike Galbraith Commit 8d7849db3eab7 ("drm/i915: Make sprite updates atomic") started disabling interrupts across atomic updates. This breaks on PREEMPT_RT because within this section the code attempt to acquire spinlock_t locks which are sleeping locks on PREEMPT_RT. According to the

[Intel-gfx] [PATCH 3/8] drm/i915/gt: Use spin_lock_irq() instead of local_irq_disable() + spin_lock()

execlists_dequeue() is invoked from a function which uses local_irq_disable() to disable interrupts so the spin_lock() behaves like spin_lock_irq(). This breaks PREEMPT_RT because local_irq_disable() + spin_lock() is not the same as spin_lock_irq(). execlists_dequeue_irq() and execlists_dequeue()

[Intel-gfx] [PATCH 0/8] drm/i915: PREEMPT_RT related fixups.

Hi, The following patches are from the PREEMPT_RT queue. One patch was applied, one added so here are eight again. I can post them in smaller batches if that is preferred. It is mostly about disabling interrupts/preemption which leads to problems. Unfortunately DRM_I915_LOW_LEVEL_TRACEPOINTS

[Intel-gfx] [PATCH 4/8] drm/i915: Use preempt_disable/enable_rt() where recommended

From: Mike Galbraith Mario Kleiner suggest in commit ad3543ede630f ("drm/intel: Push get_scanout_position() timestamping into kms driver.") a spots where preemption should be disabled on PREEMPT_RT. The difference is that on PREEMPT_RT the intel_uncore::lock disables neither preemption nor

[Intel-gfx] [PATCH 7/8] drm/i915: Disable tracing points on PREEMPT_RT

Luca Abeni reported this: | BUG: scheduling while atomic: kworker/u8:2/15203/0x0003 | CPU: 1 PID: 15203 Comm: kworker/u8:2 Not tainted 4.19.1-rt3 #10 | Call Trace: | rt_spin_lock+0x3f/0x50 | gen6_read32+0x45/0x1d0 [i915] | g4x_get_vblank_counter+0x36/0x40 [i915] |

Re: [Intel-gfx] [PATCH] drm/i915/gt: Do not add same i915_request to intel_context twice

On 14/12/2021 05:58, Yang, Dong wrote: Thanks Tvrtko, I will try the patch you mentioned. BTW, how do you think we use this patch in our project, any side-effect it may have? If no side-effect we can take it as WA for temporally fix till we got the final root fixed. For side effects I

Re: [Intel-gfx] [PATCH 7/8] drm/i915: Disable tracing points on PREEMPT_RT

On Tue, 14 Dec 2021, Steven Rostedt wrote: > On Tue, 14 Dec 2021 15:03:00 +0100 > Sebastian Andrzej Siewior wrote: > >> Luca Abeni reported this: >> | BUG: scheduling while atomic: kworker/u8:2/15203/0x0003 >> | CPU: 1 PID: 15203 Comm: kworker/u8:2 Not tainted 4.19.1-rt3 #10 >> | Call Trace:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Log engine resets

== Series Details == Series: drm/i915/guc: Log engine resets URL : https://patchwork.freedesktop.org/series/98020/ State : success == Summary == CI Bug Log - changes from CI_DRM_11001 -> Patchwork_21846 Summary --- **SUCCESS** No

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 01/11] tests/i915/i915_hangman: Add descriptions

On 12/14/2021 01:47, Petri Latvala wrote: On Mon, Dec 13, 2021 at 03:29:04PM -0800, john.c.harri...@intel.com wrote: From: John Harrison Added descriptions of the various sub-tests and the test as a whole. Signed-off-by: John Harrison --- tests/i915/i915_hangman.c | 11 +-- 1

Re: [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: PREEMPT_RT related fixups. (rev4)

On 2021-12-14 15:58:45 [-], Patchwork wrote: > == Series Details == > > Series: drm/i915: PREEMPT_RT related fixups. (rev4) > URL : https://patchwork.freedesktop.org/series/95463/ > State : failure > > == Summary == > > Applying: drm/i915: Drop the irqs_disabled() check > Applying:

Re: [Intel-gfx] [PATCH v2 1/4] drm/i915/fbc: Parametrize FBC register offsets

On Mon, Dec 13, 2021 at 09:54:04PM +0200, Jani Nikula wrote: > On Mon, 13 Dec 2021, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > Parametrize ilk+ FBC register offsets based on the FBC instance. > > > > v2: More intel_ namespace (Jani) > > > > Cc: Jani Nikula > > Signed-off-by: Ville

Re: [Intel-gfx] [PATCH 7/7] drm/i915/guc: Selftest for stealing of guc ids

On 12/14/2021 09:05, Matthew Brost wrote: Testing the stealing of guc ids is hard from user space as we have 64k guc_ids. Add a selftest, which artificially reduces the number of guc ids, and forces a steal. The test creates a spinner which is used to block all subsequent submissions until it

Re: [Intel-gfx] [PATCH] drm/i915: Increment composite fence seqno

On Tue, 14 Dec 2021, Matthew Brost wrote: > Increment composite fence seqno on each fence creation. > > Fixes: 544460c33821 ("drm/i915: Multi-BB execbuf") > Signed-off-by: Matthew Brost > --- > drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 2 +- > 1 file changed, 1 insertion(+), 1

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Increment composite fence seqno

== Series Details == Series: drm/i915: Increment composite fence seqno URL : https://patchwork.freedesktop.org/series/98034/ State : success == Summary == CI Bug Log - changes from CI_DRM_11003 -> Patchwork_21850 Summary ---

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/guc: Log engine resets

== Series Details == Series: drm/i915/guc: Log engine resets URL : https://patchwork.freedesktop.org/series/98020/ State : success == Summary == CI Bug Log - changes from CI_DRM_11001_full -> Patchwork_21846_full Summary ---

[Intel-gfx] [PATCH v8 04/16] drm/i915/gt: Use to_gt() helper

From: Michał Winiarski Use to_gt() helper consistently throughout the codebase. Pure mechanical s/i915->gt/to_gt(i915). No functional changes. Signed-off-by: Michał Winiarski Signed-off-by: Andi Shyti Reviewed-by: Matt Roper --- drivers/gpu/drm/i915/gt/intel_engine_user.c | 2 +-

[Intel-gfx] [PATCH v8 01/16] drm/i915: Store backpointer to GT in uncore

From: Michał Winiarski We now support a per-gt uncore, yet we're not able to infer which GT we're operating upon. Let's store a backpointer for now. At this point the early initialization of the gt needs to be broken in two parts where the first is needed to assign to the gt the i915 private

[Intel-gfx] [PATCH v8 00/16] More preparation for multi gt patches

Hi, the first patch concludes the first stage of refactoring which makes the use of intel_gt on the different subsystem. It's taken from Matt's series and it has alread been reviewed. The patch has just been replaced before any multitile patches and I think it can be already pushed. Patch 2-10

[Intel-gfx] [PATCH v8 03/16] drm/i915/display: Use to_gt() helper

From: Michał Winiarski Use to_gt() helper consistently throughout the codebase. Pure mechanical s/i915->gt/to_gt(i915). No functional changes. Signed-off-by: Michał Winiarski Signed-off-by: Andi Shyti Reviewed-by: Matt Roper --- .../gpu/drm/i915/display/intel_atomic_plane.c | 4 ++--

[Intel-gfx] [PATCH v8 02/16] drm/i915: Introduce to_gt() helper

From: Michał Winiarski To allow further refactoring and abstract away the fact that GT is stored inside i915 private. No functional changes. Signed-off-by: Michał Winiarski Signed-off-by: Andi Shyti Reviewed-by: Matt Roper --- drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c | 7 +--

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for More preparation for multi gt patches

== Series Details == Series: More preparation for multi gt patches URL : https://patchwork.freedesktop.org/series/98032/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] [PATCH v2 2/2] drm/i915/cdclk: move struct intel_cdclk_funcs to intel_cdclk.c

On Mon, 13 Dec 2021, Ville Syrjälä wrote: > On Mon, Dec 13, 2021 at 01:41:06PM +0200, Jani Nikula wrote: >> The funcs struct can be opaque, make it internal to intel_cdclk.c. >> >> Suggested-by: Ville Syrjälä >> Signed-off-by: Jani Nikula > > Reviewed-by: Ville Syrjälä Thanks, pushed both to

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for More preparation for multi gt patches

== Series Details == Series: More preparation for multi gt patches URL : https://patchwork.freedesktop.org/series/98032/ State : warning == Summary == $ dim checkpatch origin/drm-tip 9213cee2d3f1 drm/i915: Store backpointer to GT in uncore 03c38fe5890e drm/i915: Introduce to_gt() helper

Re: [Intel-gfx] [PATCH] drm/i915: Increment composite fence seqno

On Tue, Dec 14, 2021 at 10:17:48PM +0200, Jani Nikula wrote: > On Tue, 14 Dec 2021, Matthew Brost wrote: > > Increment composite fence seqno on each fence creation. > > > > Fixes: 544460c33821 ("drm/i915: Multi-BB execbuf") > > Signed-off-by: Matthew Brost > > --- > >

[Intel-gfx] [PATCH v8 15/16] drm/i915: Use to_gt() helper for GGTT accesses

From: Michał Winiarski GGTT is currently available both through i915->ggtt and gt->ggtt, and we eventually want to get rid of the i915->ggtt one. Use to_gt() for all i915->ggtt accesses to help with the future refactoring. Signed-off-by: Michał Winiarski Cc: Michal Wajdeczko Signed-off-by:

[Intel-gfx] [PATCH v8 14/16] drm/i915/selftests: Use to_gt() helper for GGTT accesses

From: Michał Winiarski GGTT is currently available both through i915->ggtt and gt->ggtt, and we eventually want to get rid of the i915->ggtt one. Use to_gt() for all i915->ggtt accesses to help with the future refactoring. Signed-off-by: Michał Winiarski Cc: Michal Wajdeczko Signed-off-by:

[Intel-gfx] [PATCH v8 16/16] drm/i915: Remove unused i915->ggtt

The reference to the GGTT from the private date is not used anymore. Remove it. Suggested-by: Matt Roper Signed-off-by: Andi Shyti Cc: Michał Winiarski --- drivers/gpu/drm/i915/gt/intel_gt.c| 7 +-- drivers/gpu/drm/i915/gt/intel_gt.h| 2 +-

[Intel-gfx] [PATCH] drm/i915: Increment composite fence seqno

Increment composite fence seqno on each fence creation. Fixes: 544460c33821 ("drm/i915: Multi-BB execbuf") Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[Intel-gfx] [PATCH v8 09/16] drm/i915: Use to_gt() helper

From: Michał Winiarski Use to_gt() helper consistently throughout the codebase. Pure mechanical s/i915->gt/to_gt(i915). No functional changes. Signed-off-by: Michał Winiarski Signed-off-by: Andi Shyti Reviewed-by: Matt Roper --- drivers/gpu/drm/i915/i915_debugfs.c| 38

[Intel-gfx] [PATCH v8 05/16] drm/i915/gem: Use to_gt() helper

From: Michał Winiarski Use to_gt() helper consistently throughout the codebase. Pure mechanical s/i915->gt/to_gt(i915). No functional changes. Signed-off-by: Michał Winiarski Signed-off-by: Andi Shyti Reviewed-by: Matt Roper --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 22

[Intel-gfx] [PATCH v8 11/16] drm/i915/gem: Use to_gt() helper for GGTT accesses

From: Michał Winiarski GGTT is currently available both through i915->ggtt and gt->ggtt, and we eventually want to get rid of the i915->ggtt one. Use to_gt() for all i915->ggtt accesses to help with the future refactoring. Signed-off-by: Michał Winiarski Cc: Michal Wajdeczko Signed-off-by:

[Intel-gfx] [PATCH v8 07/16] drm/i915/selftests: Use to_gt() helper

Use to_gt() helper consistently throughout the codebase. Pure mechanical s/i915->gt/to_gt(i915). No functional changes. Signed-off-by: Andi Shyti Cc: Michał Winiarski Reviewed-by: Matt Roper --- drivers/gpu/drm/i915/selftests/i915_active.c | 2 +- drivers/gpu/drm/i915/selftests/i915_gem.c

[Intel-gfx] [PATCH v8 08/16] drm/i915/pxp: Use to_gt() helper

Use to_gt() helper consistently throughout the codebase. Pure mechanical s/i915->gt/to_gt(i915). No functional changes. Signed-off-by: Andi Shyti Reviewed-by: Matt Roper --- drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git

[Intel-gfx] [PATCH v8 12/16] drm/i915/display: Use to_gt() helper for GGTT accesses

From: Michał Winiarski GGTT is currently available both through i915->ggtt and gt->ggtt, and we eventually want to get rid of the i915->ggtt one. Use to_gt() for all i915->ggtt accesses to help with the future refactoring. Signed-off-by: Michał Winiarski Cc: Michal Wajdeczko Signed-off-by:

[Intel-gfx] [PATCH v8 13/16] drm/i915/gt: Use to_gt() helper for GGTT accesses

From: Michał Winiarski GGTT is currently available both through i915->ggtt and gt->ggtt, and we eventually want to get rid of the i915->ggtt one. Use to_gt() for all i915->ggtt accesses to help with the future refactoring. Signed-off-by: Michał Winiarski Cc: Michal Wajdeczko Signed-off-by:

[Intel-gfx] [PATCH v8 06/16] drm/i915/gvt: Use to_gt() helper

From: Michał Winiarski Use to_gt() helper consistently throughout the codebase. Pure mechanical s/i915->gt/to_gt(i915). No functional changes. Signed-off-by: Michał Winiarski Signed-off-by: Andi Shyti Reviewed-by: Matt Roper --- drivers/gpu/drm/i915/gvt/gvt.c | 2 +-

[Intel-gfx] [PATCH v8 10/16] drm/i915: Rename i915->gt to i915->gt0

In preparation of the multitile support, highlight the root GT by calling it gt0 inside the drm i915 private data. Signed-off-by: Andi Shyti Cc: Chris Wilson Cc: Joonas Lahtinen Cc: Lucas De Marchi Cc: Rodrigo Vivi Cc: Tvrtko Ursulin Reviewed-by: Matt Roper ---

[Intel-gfx] ✓ Fi.CI.BAT: success for More preparation for multi gt patches

== Series Details == Series: More preparation for multi gt patches URL : https://patchwork.freedesktop.org/series/98032/ State : success == Summary == CI Bug Log - changes from CI_DRM_11002 -> Patchwork_21849 Summary --- **SUCCESS**

[Intel-gfx] ✗ Fi.CI.IGT: failure for Fix stealing guc_ids + test (rev3)

== Series Details == Series: Fix stealing guc_ids + test (rev3) URL : https://patchwork.freedesktop.org/series/97896/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11002_full -> Patchwork_21847_full Summary ---

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: remove writeback hook

== Series Details == Series: drm/i915: remove writeback hook URL : https://patchwork.freedesktop.org/series/98029/ State : success == Summary == CI Bug Log - changes from CI_DRM_11002_full -> Patchwork_21848_full Summary ---

[Intel-gfx] ✗ Fi.CI.IGT: failure for More preparation for multi gt patches

== Series Details == Series: More preparation for multi gt patches URL : https://patchwork.freedesktop.org/series/98032/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11002_full -> Patchwork_21849_full Summary ---