From: John Harrison
Compute workloads are inherently not pre-emptible on current hardware.
Thus the pre-emption timeout was disabled as a workaround to prevent
unwanted resets. Instead, the hang detection was left to the heartbeat
and its (longer) timeout. This is undesirable with GuC submission
From: John Harrison
A workaround was added to the driver to allow OpenCL workloads to run
'forever' by disabling pre-emption on the RCS engine for Gen12.
It is not totally unbound as the heartbeat will kick in eventually
and cause a reset of the hung engine.
However, this does not work well in
From: John Harrison
GuC converts the pre-emption timeout and timeslice quantum values into
clock ticks internally. That significantly reduces the point of 32bit
overflow. On current platforms, worst case scenario is approximately
110 seconds. Rather than allowing the user to set higher values
From: John Harrison
Compute workloads are inherantly not pre-emptible for long periods on
current hardware. As a workaround for this, the pre-emption timeout
for compute capable engines was disabled. This is undesirable with GuC
submission as it prevents per engine reset of hung contexts. Hence
The move to softpin in igt is ongoing and should land soon.
Meanwhile, like was done for ADL and RKL, add an exception to allow
running the igt display tests before that conversion is complete
so we can unblock CI.
Cc: Zbigniew Kempczynski
Cc: Dave Airlie
Cc: Daniel Vetter
Cc: Jason Ekstrand
== Series Details ==
Series: drm/i915/adlp: Add TypeC PHY TBT->DP-alt/legacy mode switch workaround
(rev2)
URL : https://patchwork.freedesktop.org/series/100404/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11250 -> Patchwork_22332
== Series Details ==
Series: drm/i915: Enable DG2
URL : https://patchwork.freedesktop.org/series/100419/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Wed, Feb 16, 2022 at 09:41:45AM -0800, Lucas De Marchi wrote:
> Now that the regset list is prepared, convert guc_mmio_reg_state_init()
> to use iosys_map to copy the array to the final location and
> initialize additional fields in ads.reg_state_list.
>
> v2: Just use an offset instead of
TGL+ and newer platforms don't support RPS up and low interruption
limits.
It is not used for broadwell and newer plaforms that supports
execlist but here making sure that it is explicit not used even in
debug scenarios.
BSpec: 33301
BSpec: 52069
BSpec: 9520
HSD: 1405911647
Cc: Vinay Belgaumkar
On Fri, 18 Feb 2022 14:38:53 -0800, Lucas De Marchi wrote:
>
> The move to softpin in igt is ongoing and should land soon.
> Meanwhile, like was done for ADL and RKL, add an exception to allow
> running the igt display tests before that conversion is complete
> so we can unblock CI.
One example
On Thu, Jan 06, 2022 at 04:55:36PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Similar to AMD commit
874442541133 ("drm/amdgpu: Add show_fdinfo() interface"), using the
infrastructure added in previous patches, we add basic client info
and GPU engine utilisation for i915.
Example of the
From: Matthew Auld
discrete cards optimise 64K GTT pages for local-memory, since everything
should be allocated at 64K granularity. We say goodbye to sparse
entries, and instead get a compact 256B page-table for 64K pages,
which should be more cache friendly. 4K pages for local-memory
are no
From: Matthew Auld
For local-memory objects we need to align the GTT addresses
to 64K, both for the ppgtt and ggtt.
We need to support vm->min_alignment > 4K, depending
on the vm itself and the type of object we are inserting.
With this in mind update the GTT selftests to take this
into
From: Robert Beckett
add test to check handling of misaligned offsets and sizes
v4:
* remove spurious blank lines
* explicitly cast intel_region_id to intel_memory_type in misaligned_pin
Reported-by: kernel test robot
v6:
* use NEEDS_COMPACT_PT instead of hard coding
Add a new platform flag, needs_compact_pt, to mark the requirement of
compact pt layout support for the ppGTT when using 64K GTT pages.
With this flag has_64k_pages will only indicate requirement of 64K
GTT page sizes or larger for device local memory access.
v6:
* minor doc formatting
From: Matthew Auld
On some platforms we have alignment restrictions when accessing LMEM
from the GTT. In the next few patches we need to be able to modify the
page-tables directly via the GTT itself.
Suggested-by: Ramalingam C
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Ramalingam C
From: Matthew Auld
If this is LMEM then we get a 32 entry PT, with each PTE pointing to
some 64K block of memory, otherwise it's just the usual 512 entry PT.
This very much assumes the caller knows what they are doing.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Ramalingam C
From: Matthew Auld
This is all kinds of awkward since we now have to contend with using 64K
GTT pages when mapping anything in LMEM(including the page-tables
themselves).
v2(Ram)
- Document the ppGTT layout and add a better description for the
different windows.
Signed-off-by: Matthew
From: Ayaz A Siddiqui
Xe-HP and latest devices support Flat CCS which reserved a portion of
the device memory to store compression metadata, during the clearing of
device memory buffer object we also need to clear the associated
CCS buffer.
Flat CCS memory can not be directly accessed by S/W.
From: Abdiel Janulgue
A portion of device memory is reserved for Flat CCS so usable
device memory will be reduced by size of Flat CCS. Size of
Flat CCS is specified in “XEHPSDV_FLAT_CCS_BASE_ADDR”.
So to get effective device memory we need to subtract
total device memory by Flat CCS memory size.
== Series Details ==
Series: drm/i915/guc: Refactor ADS access to use iosys_map (rev4)
URL : https://patchwork.freedesktop.org/series/99711/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Wed, Feb 16, 2022 at 09:41:41AM -0800, Lucas De Marchi wrote:
> Use the saved ads_map to prepare the golden context. One difference from
> the init context is that this function can be called before there is a
> gem object (and thus the guc->ads_map) to calculare the size of the
> golden
On Thu, Feb 17, 2022 at 05:40:51PM +0800, kernel test robot wrote:
tree: git://anongit.freedesktop.org/drm-intel topic/core-for-CI
head: b56d8d7bad86a9badc1d1b9ea2d1730fa1d3978b
commit: b56d8d7bad86a9badc1d1b9ea2d1730fa1d3978b [1/1] drm/i915: Add DG2 PCI IDs
config: x86_64-randconfig-a011
Just a note here. To enable the dg2 with basic support sooner on CI we
have taken a subset of this series separtely at
https://patchwork.freedesktop.org/series/100419/
Remaining patches will be pursued on top the above series. Thanks for
the review comments. We will fix them working with
== Series Details ==
Series: drm/i915/guc: Refactor ADS access to use iosys_map (rev4)
URL : https://patchwork.freedesktop.org/series/99711/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11250 -> Patchwork_22334
Summary
+Daniele, +Rodrigo
On Tue, Feb 08, 2022 at 11:14:57PM -0800, Lucas De Marchi wrote:
On Mon, Feb 07, 2022 at 12:36:42PM -0800, john.c.harri...@intel.com wrote:
From: John Harrison
First release of GuC for DG2.
Signed-off-by: John Harrison
CC: Tomasz Mistat
CC: Ramalingam C
CC: Daniele
== Series Details ==
Series: drm/i915/rps/tgl+: Remove RPS interrupt support
URL : https://patchwork.freedesktop.org/series/100426/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11253 -> Patchwork_22336
Summary
---
On 2022-02-18 at 18:06:00 +, Robert Beckett wrote:
>
>
> On 18/02/2022 13:47, Ramalingam C wrote:
> > On 2022-02-17 at 20:57:35 -0800, Jordan Justen wrote:
> > > Robert Beckett writes:
> > >
> > > > From: Matthew Auld
> > > >
> > > > On discrete platforms like DG2, we need to support a
On Thu, Feb 17, 2022 at 06:02:23PM +0530, Tejas Upadhyay wrote:
> We dont need to implement reset_domain in intel_engine
> _setup(), but can be done as a helper. Implemented as
> engine->reset_domain = get_reset_domain().
>
> Cc: Rodrigo Vivi
> Signed-off-by: Tejas Upadhyay
it is a good
On Wed, Feb 16, 2022 at 09:41:43AM -0800, Lucas De Marchi wrote:
> Use iosys_map to write the fields system_info.mapping_table[][].
> Since we already have the info_map around where needed, just use it
> instead of going through guc->ads_map.
>
> Cc: Matt Roper
> Cc: Thomas Hellström
> Cc:
On Wed, Feb 16, 2022 at 09:41:46AM -0800, Lucas De Marchi wrote:
> Now that all the called functions from __guc_ads_init() are converted to
> use ads_map, stop using ads_blob in __guc_ads_init().
>
> Cc: Matt Roper
> Cc: Thomas Hellström
> Cc: Daniel Vetter
> Cc: John Harrison
> Cc: Matthew
On 2/17/2022 3:52 PM, john.c.harri...@intel.com wrote:
From: John Harrison
The LRC descriptor pool is going away. So, stop using it as a check for
context registration, use the GuC id instead (being the thing that
actually gets registered with the GuC).
Also, rename the set/clear/query
== Series Details ==
Series: Move #define wbvind_on_all_cpus (rev3)
URL : https://patchwork.freedesktop.org/series/1/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
8c5741d746ef drm_cache: Add logic for wbvind_on_all_cpus
-:34: WARNING:INCLUDE_LINUX: Use #include instead
== Series Details ==
Series: Move #define wbvind_on_all_cpus (rev3)
URL : https://patchwork.freedesktop.org/series/1/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Move #define wbvind_on_all_cpus (rev3)
URL : https://patchwork.freedesktop.org/series/1/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11253 -> Patchwork_22335
Summary
---
On 2/14/2022 17:11, Daniele Ceraolo Spurio wrote:
Move initialization of submission-related spinlock, lists and workers to
init_early. This fixes an issue where if the GuC init fails we might
still try to get the lock in the context cleanup code. Note that it is
safe to call the GuC context
From: Matt Roper
Our early understanding of DG2 was incorrect; since the 5th display
isn't actually a Type-C output, 38.4 MHz input clocks are never used on
this platform and we can drop the corresponding MPLLB tables.
Cc: Anusha Srivatsa
Cc: José Roberto de Souza
Signed-off-by: Matt Roper
From: Jouni Högander
Currently ICL_PHY_MISC macro is returning offset 0x64C10 for PHY_E.
The PORT_TC1 port is not yet enabled properly in the driver, but
intel_phy_snps.c is relying on intel_phy_is_snps() to filter out
unavailable phys. That function was already considering the last phy as
From: Matt Roper
DG2 supports a 5th display output which the hardware refers to as "TC1,"
even though it isn't a Type-C output. This behaves similarly to the TC1
on past platforms with just a couple minor differences:
* DG2's TC1 bit in SDEISR is at bit 25 rather than 24 as it is on
From: Matthew Auld
On discrete platforms like DG2, we need to support a minimum page size
of 64K when dealing with device local-memory. This is quite tricky for
various reasons, so try to document the new implicit uapi for this.
v4: Kdoc modification.
v3: fix typos and less emphasis
v2: Fixed
From: CQ Tang
Platforms of XeHP and beyond support 3D surface (buffer) compression and
various compression formats. This is accomplished by an additional
compression control state (CCS) stored for each surface.
Gen 12 devices(TGL family and DG1) stores compression states in a separate
region of
Enabling the Dg2 on drm/i915.
This series adds support for 64k pagesize and documents the uapi
impacts. And also adds basic flat-ccs enabling patches to
support the local memory initialization and object creation. Kdoc is
added to document the Flat-ccs support.
Flat-ccs modifiers will be enabled
From: John Harrison
First release of GuC for DG2.
Signed-off-by: John Harrison
CC: Tomasz Mistat
CC: Ramalingam C
CC: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
On Wed, Feb 16, 2022 at 09:41:42AM -0800, Lucas De Marchi wrote:
> In the other places in this function, guc->ads_map is being protected
> from access when it's not yet set. However the last check is actually
> about guc->ads_golden_ctxt_size been set before. These checks should
> always match as
Ramalingam C writes:
> On 2022-02-18 at 18:06:00 +, Robert Beckett wrote:
>>
>> If desired, we can make the wording clearer, maybe something like:
>>
>> "To keep things simple for userland, we mandate that any GTT mappings
>> must be aligned to 2MB. The kernel will internally pad them out
On Wed, Feb 16, 2022 at 09:41:44AM -0800, Lucas De Marchi wrote:
> Use iosys_map to write the fields ads.capture_*.
>
> Cc: Matt Roper
> Cc: Thomas Hellström
> Cc: Daniel Vetter
> Cc: John Harrison
> Cc: Matthew Brost
> Cc: Daniele Ceraolo Spurio
> Signed-off-by: Lucas De Marchi
On Wed, Feb 16, 2022 at 09:41:47AM -0800, Lucas De Marchi wrote:
> Now we have the access to content of GuC ADS either using iosys_map
> API or using a temporary buffer. Remove guc->ads_blob as there shouldn't
> be updates using the bare pointer anymore.
>
> Cc: Matt Roper
> Cc: Thomas Hellström
On 2/17/2022 3:52 PM, john.c.harri...@intel.com wrote:
From: John Harrison
The LRC descriptor pool is going away. So, stop using it as a check
for whether submission has been initialised or not.
Signed-off-by: John Harrison
grep confirmed those are the only places we use the pool that
== Series Details ==
Series: drm/i915/guc: Refactor ADS access to use iosys_map (rev4)
URL : https://patchwork.freedesktop.org/series/99711/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
554203971464 iosys-map: Add offset to iosys_map_memcpy_to()
5a68a5465b0a iosys-map: Add a
On Wed, Feb 16, 2022 at 09:41:40AM -0800, Lucas De Marchi wrote:
> Use iosys_map_memset() to zero the private data as ADS may be either
> on system or IO memory.
>
> Cc: Matt Roper
> Cc: Thomas Hellström
> Cc: Daniel Vetter
> Cc: John Harrison
> Cc: Matthew Brost
> Cc: Daniele Ceraolo Spurio
Quoting Janusz Krzysztofik (2022-02-18 17:08:41)
> Hi Chris,
>
> On Friday, 18 February 2022 17:03:01 CET Chris Wilson wrote:
> > Quoting Janusz Krzysztofik (2022-02-18 15:19:35)
> > > @@ -206,15 +229,19 @@ static struct pci_device
> > > *__igt_device_get_pci_device(int fd)
> > >
== Series Details ==
Series: drm/i915: SAGV fixes (rev3)
URL : https://patchwork.freedesktop.org/series/100091/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11244_full -> Patchwork_22327_full
Summary
---
== Series Details ==
Series: drm/i915: Enable DG2
URL : https://patchwork.freedesktop.org/series/100419/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ecf3a6aabe11 drm/i915/dg2: Define GuC firmware version for DG2
9d7f9f8a3467 drm/i915: Fix for PHY_MISC_TC1 offset
-:49:
On 2/18/2022 10:47 AM, Ramalingam C wrote:
From: John Harrison
First release of GuC for DG2.
Signed-off-by: John Harrison
CC: Tomasz Mistat
CC: Ramalingam C
CC: Daniele Ceraolo Spurio
Reviewed-by: Daniele Ceraolo Spurio
Daniele
---
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 1 +
== Series Details ==
Series: drm/i915: Enable DG2
URL : https://patchwork.freedesktop.org/series/100419/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11250 -> Patchwork_22333
Summary
---
**SUCCESS**
No
> -Original Message-
> From: Intel-gfx On Behalf Of Tejas
> Upadhyay
> Sent: Thursday, January 27, 2022 2:35 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH] drm/i915/adl-n: Add PCH Support for Alder Lake
> N
>
> Add the PCH ID for ADL-N.
>
> Signed-off-by:
== Series Details ==
Series: Improve anti-pre-emption w/a for compute workloads
URL : https://patchwork.freedesktop.org/series/100428/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Fri, Feb 18, 2022 at 01:54:36AM -0800, Lucas De Marchi wrote:
This is an alternative to
https://patchwork.freedesktop.org/series/100151/
("drm/i915/dg2: 5th Display output").
After talking with Matt Roper, it seems the issue calibrating the phy
happens sporadically on any phy. So, there
== Series Details ==
Series: drm/i915/dg2: Add relocation exception
URL : https://patchwork.freedesktop.org/series/100433/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11254 -> Patchwork_22338
Summary
---
On Fri, Feb 18, 2022 at 01:08:36PM +, Patchwork wrote:
== Series Details ==
Series: drm/i915: Kill the fake lmem support (rev2)
URL : https://patchwork.freedesktop.org/series/100276/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11244_full -> Patchwork_22319_full
On Sat, Feb 19, 2022 at 12:17:52AM +0530, Ramalingam C wrote:
> From: Ayaz A Siddiqui
>
> Xe-HP and latest devices support Flat CCS which reserved a portion of
> the device memory to store compression metadata, during the clearing of
> device memory buffer object we also need to clear the
== Series Details ==
Series: drm: Review of mode copies
URL : https://patchwork.freedesktop.org/series/100394/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11248_full -> Patchwork_22330_full
Summary
---
**FAILURE**
== Series Details ==
Series: drm/i915/dg2: Do not use phy E
URL : https://patchwork.freedesktop.org/series/100390/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11248_full -> Patchwork_22329_full
Summary
---
== Series Details ==
Series: drm/i915/ttm: fixup the mock_bo (rev2)
URL : https://patchwork.freedesktop.org/series/100255/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11248_full -> Patchwork_22328_full
Summary
---
On Thu, Feb 17, 2022 at 06:09:53PM +, Matthew Auld wrote:
On Thu, 17 Feb 2022 at 17:55, Lucas De Marchi wrote:
This was useful for early development of lmem, but it's not used
anymore, so remove it.
v2: Remove unneeded fields from struct intel_memory_region
Cc: Chris Wilson
Cc: Matthew
== Series Details ==
Series: Improve anti-pre-emption w/a for compute workloads
URL : https://patchwork.freedesktop.org/series/100428/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11254 -> Patchwork_22337
Summary
---
== Series Details ==
Series: drm/i915/gt: use get_reset_domain() helper
URL : https://patchwork.freedesktop.org/series/100326/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11242_full -> Patchwork_22314_full
Summary
On 2022-02-17 at 21:39:16 -0800, Lucas De Marchi wrote:
> On Tue, Feb 01, 2022 at 04:11:22PM +0530, Ramalingam C wrote:
> > Details of the 64k pagesize support added as part of DG2 enabling and its
> > implicit impact on the uAPI.
> >
> > v2: improvised the Flat-CCS documentation [Danvet & CQ]
>
On Thu, 17 Feb 2022, "Navare, Manasi" wrote:
> Hi Jani,
>
> This addresses the review comments, could you please take a look at thsi
> patch?
Sorry for the delay,
Reviewed-by: Jani Nikula
>
> Manasi
>
> On Tue, Feb 15, 2022 at 12:26:01PM -0800, Manasi Navare wrote:
>> With some VRR panels,
On Thu, 17 Feb 2022, Lucas De Marchi wrote:
> On Thu, Feb 17, 2022 at 10:39:38AM +0200, Jani Nikula wrote:
>>The variable should obviously be local, not static.
>>
>>Fixes: a421d8a99216 ("drm/i915/dp: rewrite DP 2.0 128b/132b link training
>>based on errata")
>>Cc: Ville Syrjälä
On 17/02/2022 15:53, Andi Shyti wrote:
Hi Tvrtko,
Now tiles have their own sysfs interfaces under the gt/
directory. Because RC6 is a property that can be configured on a
tile basis, then each tile should have its own interface
The new sysfs structure will have a similar layout for the 4
From: Ville Syrjälä
struct drm_display_mode embeds a list head, so overwriting
the full struct with another one will corrupt the list
(if the destination mode is on a list). Use drm_mode_copy()
instead which explicitly preserves the list head of
the destination mode.
Even if we know the
From: Ville Syrjälä
struct drm_display_mode embeds a list head, so overwriting
the full struct with another one will corrupt the list
(if the destination mode is on a list). Use drm_mode_copy()
instead which explicitly preserves the list head of
the destination mode.
Even if we know the
From: Ville Syrjälä
Initialize on-stack modes with drm_mode_init() to guarantee
no stack garbage in the list head, or that we aren't copying
over another mode's list head.
Based on the following cocci script, with manual fixups:
@decl@
identifier M;
expression E;
@@
- struct drm_display_mode M
From: Ville Syrjälä
struct drm_display_mode embeds a list head, so overwriting
the full struct with another one will corrupt the list
(if the destination mode is on a list). Use drm_mode_copy()
instead which explicitly preserves the list head of
the destination mode.
Even if we know the
From: Ville Syrjälä
Initialize on-stack modes with drm_mode_init() to guarantee
no stack garbage in the list head, or that we aren't copying
over another mode's list head.
Based on the following cocci script, with manual fixups:
@decl@
identifier M;
expression E;
@@
- struct drm_display_mode M
From: Ville Syrjälä
struct drm_display_mode embeds a list head, so overwriting
the full struct with another one will corrupt the list
(if the destination mode is on a list). Use drm_mode_copy()
instead which explicitly preserves the list head of
the destination mode.
Even if we know the
From: Ville Syrjälä
Replace the hand rolled drm_mode_duplicate() with the
real thing.
@is_dup@
@@
drm_mode_duplicate(...)
{ ... }
@depends on !is_dup@
expression dev, oldmode;
identifier newmode;
@@
- newmode = drm_mode_create(dev);
+ newmode = drm_mode_duplicate(dev, oldmode);
...
-
== Series Details ==
Series: Add driver for GSC controller (rev9)
URL : https://patchwork.freedesktop.org/series/98066/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11243_full -> Patchwork_22318_full
Summary
---
On Fri, 2022-02-18 at 12:03 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Replace the hand rolled drm_mode_duplicate() with the
> real thing.
>
> @is_dup@
> @@
> drm_mode_duplicate(...)
> { ... }
>
> @depends on !is_dup@
> expression dev, oldmode;
> identifier newmode;
> @@
> - newmode
Hi Ville,
On Fri, Feb 18, 2022 at 12:04:01PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Replace the hand rolled drm_mode_duplicate() with the
> real thing.
>
> @is_dup@
> @@
> drm_mode_duplicate(...)
> { ... }
>
> @depends on !is_dup@
> expression dev, oldmode;
> identifier
On Fri, Feb 18, 2022 at 12:22:44PM +0100, Andrzej Hajda wrote:
>
>
> On 18.02.2022 11:03, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Add a variant of drm_mode_copy() that explicitly clears out
> > the list head of the destination mode. Helpful to guarantee
> > we don't have stack
On Fri, Feb 18, 2022 at 02:08:18AM -0800, Lucas De Marchi wrote:
On Tue, Feb 01, 2022 at 04:11:24PM +0530, Ramalingam C wrote:
From: Abdiel Janulgue
A portion of device memory is reserved for Flat CCS so usable
device memory will be reduced by size of Flat CCS. Size of
Flat CCS is specified
On 18.02.2022 11:03, Ville Syrjala wrote:
From: Ville Syrjälä
Add a variant of drm_mode_copy() that explicitly clears out
the list head of the destination mode. Helpful to guarantee
we don't have stack garbage left in there for on-stack modes.
Signed-off-by: Ville Syrjälä
---
On Tue, Feb 15, 2022 at 05:08:18PM +0530, Tejas Upadhyay wrote:
> The VT-d spec requires (10.4.4 Global Command Register, TE
> field) that:
>
> Hardware implementations supporting DMA draining must drain
> any in-flight DMA read/write requests queued within the
> Root-Complex before completing
Hi,
On 2/18/22 12:39, Simon Ser wrote:
> On Friday, February 18th, 2022 at 11:38, Hans de Goede
> wrote:
>
>> What I'm reading in the above is that it is being considered to allow
>> changing the panel-orientation value after the connector has been made
>> available to userspace; and let
Hi Tvrtko,
> > > > Now tiles have their own sysfs interfaces under the gt/
> > > > directory. Because RC6 is a property that can be configured on a
> > > > tile basis, then each tile should have its own interface
> > > >
> > > > The new sysfs structure will have a similar layout for the 4 tile
>
From: Ville Syrjälä
Initialize on-stack modes with drm_mode_init() to guarantee
no stack garbage in the list head, or that we aren't copying
over another mode's list head.
Based on the following cocci script, with manual fixups:
@decl@
identifier M;
expression E;
@@
- struct drm_display_mode M
From: Ville Syrjälä
struct drm_display_mode embeds a list head, so overwriting
the full struct with another one will corrupt the list
(if the destination mode is on a list). Use drm_mode_copy()
instead which explicitly preserves the list head of
the destination mode.
Even if we know the
From: Ville Syrjälä
struct drm_display_mode embeds a list head, so overwriting
the full struct with another one will corrupt the list
(if the destination mode is on a list). Use drm_mode_copy()
instead which explicitly preserves the list head of
the destination mode.
Even if we know the
From: Ville Syrjälä
Initialize on-stack modes with drm_mode_init() to guarantee
no stack garbage in the list head.
Based on the following cocci script, with manual fixups:
@decl@
identifier M;
expression E;
@@
- struct drm_display_mode M = E;
+ struct drm_display_mode M;
@@
identifier decl.M;
From: Ville Syrjälä
struct drm_display_mode embeds a list head, so overwriting
the full struct with another one will corrupt the list
(if the destination mode is on a list). Use drm_mode_copy()
instead which explicitly preserves the list head of
the destination mode.
Even if we know the
From: Ville Syrjälä
Initialize on-stack modes with drm_mode_init() to guarantee
no stack garbage in the list head.
Cc: Xinliang Liu
Cc: Tian Tao
Cc: John Stultz
Cc: Xinwei Kong
Cc: Chen Feng
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c | 2 +-
1 file
From: Ville Syrjälä
Replace the hand rolled drm_mode_duplicate() with the
real thing.
@is_dup@
@@
drm_mode_duplicate(...)
{ ... }
@depends on !is_dup@
expression dev, oldmode;
identifier newmode;
@@
- newmode = drm_mode_create(dev);
+ newmode = drm_mode_duplicate(dev, oldmode);
...
-
From: Ville Syrjälä
This on stack middle man mode looks entirely pointless.
Just duplicate the original mode directly.
Cc: Rob Clark
Cc: Sean Paul
Cc: Abhinav Kumar
Cc: linux-arm-...@vger.kernel.org
Cc: freedr...@lists.freedesktop.org
Signed-off-by: Ville Syrjälä
---
From: Ville Syrjälä
struct drm_display_mode embeds a list head, so overwriting
the full struct with another one will corrupt the list
(if the destination mode is on a list). Use drm_mode_copy()
instead which explicitly preserves the list head of
the destination mode.
Even if we know the
From: Ville Syrjälä
struct drm_display_mode embeds a list head, so overwriting
the full struct with another one will corrupt the list
(if the destination mode is on a list). Use drm_mode_copy()
instead which explicitly preserves the list head of
the destination mode.
Even if we know the
From: Ville Syrjälä
struct drm_display_mode embeds a list head, so overwriting
the full struct with another one will corrupt the list
(if the destination mode is on a list). Use drm_mode_copy()
instead which explicitly preserves the list head of
the destination mode.
Even if we know the
From: Ville Syrjälä
struct drm_display_mode embeds a list head, so overwriting
the full struct with another one will corrupt the list
(if the destination mode is on a list). Use drm_mode_copy()
instead which explicitly preserves the list head of
the destination mode.
Even if we know the
On 17.02.2022 16:38, Eric Dumazet wrote:
On Thu, Feb 17, 2022 at 6:05 AM Andrzej Hajda wrote:
To improve readibility of ref_tracker printing following changes
have been performed:
- added display name for ref_tracker_dir,
- stack trace is printed indented, in the same printk call,
- total
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